1 /*
2 * Copyright (C) 2010 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm970-baseboard.c which is :
5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22 #include <linux/types.h>
23 #include <linux/init.h>
24
25 #include <linux/gpio.h>
26 #include <linux/interrupt.h>
27 #include <linux/leds.h>
28 #include <linux/platform_device.h>
29 #include <linux/input.h>
30 #include <video/platform_lcd.h>
31 #include <linux/i2c.h>
32
33 #include <asm/mach-types.h>
34 #include <asm/mach/arch.h>
35 #include <asm/mach/time.h>
36 #include <asm/mach/map.h>
37
38 #include <mach/hardware.h>
39 #include <mach/common.h>
40 #include <mach/iomux-mx35.h>
41
42 #include "devices-imx35.h"
43
44 static const struct fb_videomode fb_modedb[] = {
45 {
46 .name = "CMO-QVGA",
47 .refresh = 60,
48 .xres = 320,
49 .yres = 240,
50 .pixclock = KHZ2PICOS(6500),
51 .left_margin = 68,
52 .right_margin = 20,
53 .upper_margin = 15,
54 .lower_margin = 4,
55 .hsync_len = 30,
56 .vsync_len = 3,
57 .sync = 0,
58 .vmode = FB_VMODE_NONINTERLACED,
59 .flag = 0,
60 },
61 {
62 .name = "DVI-VGA",
63 .refresh = 60,
64 .xres = 640,
65 .yres = 480,
66 .pixclock = 32000,
67 .left_margin = 100,
68 .right_margin = 100,
69 .upper_margin = 7,
70 .lower_margin = 100,
71 .hsync_len = 7,
72 .vsync_len = 7,
73 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
74 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
75 .vmode = FB_VMODE_NONINTERLACED,
76 .flag = 0,
77 },
78 {
79 .name = "DVI-SVGA",
80 .refresh = 60,
81 .xres = 800,
82 .yres = 600,
83 .pixclock = 25000,
84 .left_margin = 75,
85 .right_margin = 75,
86 .upper_margin = 7,
87 .lower_margin = 75,
88 .hsync_len = 7,
89 .vsync_len = 7,
90 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
91 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
92 .vmode = FB_VMODE_NONINTERLACED,
93 .flag = 0,
94 },
95 };
96
97 static const struct ipu_platform_data mx3_ipu_data __initconst = {
98 .irq_base = MXC_IPU_IRQ_START,
99 };
100
101 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
102 .name = "CMO-QVGA",
103 .mode = fb_modedb,
104 .num_modes = ARRAY_SIZE(fb_modedb),
105 };
106
107 static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
108 /* LCD */
109 MX35_PAD_LD0__IPU_DISPB_DAT_0,
110 MX35_PAD_LD1__IPU_DISPB_DAT_1,
111 MX35_PAD_LD2__IPU_DISPB_DAT_2,
112 MX35_PAD_LD3__IPU_DISPB_DAT_3,
113 MX35_PAD_LD4__IPU_DISPB_DAT_4,
114 MX35_PAD_LD5__IPU_DISPB_DAT_5,
115 MX35_PAD_LD6__IPU_DISPB_DAT_6,
116 MX35_PAD_LD7__IPU_DISPB_DAT_7,
117 MX35_PAD_LD8__IPU_DISPB_DAT_8,
118 MX35_PAD_LD9__IPU_DISPB_DAT_9,
119 MX35_PAD_LD10__IPU_DISPB_DAT_10,
120 MX35_PAD_LD11__IPU_DISPB_DAT_11,
121 MX35_PAD_LD12__IPU_DISPB_DAT_12,
122 MX35_PAD_LD13__IPU_DISPB_DAT_13,
123 MX35_PAD_LD14__IPU_DISPB_DAT_14,
124 MX35_PAD_LD15__IPU_DISPB_DAT_15,
125 MX35_PAD_LD16__IPU_DISPB_DAT_16,
126 MX35_PAD_LD17__IPU_DISPB_DAT_17,
127 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
128 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
129 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
130 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
131 /* Backlight */
132 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
133 /* LCD_PWR */
134 MX35_PAD_D3_CLS__GPIO1_4,
135 /* LED */
136 MX35_PAD_LD23__GPIO3_29,
137 /* SWITCH */
138 MX35_PAD_LD19__GPIO3_25,
139 /* UART2 */
140 MX35_PAD_CTS2__UART2_CTS,
141 MX35_PAD_RTS2__UART2_RTS,
142 MX35_PAD_TXD2__UART2_TXD_MUX,
143 MX35_PAD_RXD2__UART2_RXD_MUX,
144 /* I2S */
145 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
146 MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
147 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
148 MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
149 /* CAN2 */
150 MX35_PAD_TX5_RX0__CAN2_TXCAN,
151 MX35_PAD_TX4_RX1__CAN2_RXCAN,
152 /* SDCARD */
153 MX35_PAD_SD1_CMD__ESDHC1_CMD,
154 MX35_PAD_SD1_CLK__ESDHC1_CLK,
155 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
156 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
157 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
158 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
159 /* SD1 CD */
160 MX35_PAD_LD18__GPIO3_24,
161 };
162
163 #define GPIO_LED1 IMX_GPIO_NR(3, 29)
164 #define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
165 #define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
166 #define GPIO_SD1CD IMX_GPIO_NR(3, 24)
167
eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data * pd,unsigned int power)168 static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
169 unsigned int power)
170 {
171 if (power)
172 gpio_direction_output(GPIO_LCDPWR, 1);
173 else
174 gpio_direction_output(GPIO_LCDPWR, 0);
175 }
176
177 static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
178 .set_power = eukrea_mbimxsd_lcd_power_set,
179 };
180
181 static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
182 .name = "platform-lcd",
183 .dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
184 };
185
186 static struct gpio_led eukrea_mbimxsd_leds[] = {
187 {
188 .name = "led1",
189 .default_trigger = "heartbeat",
190 .active_low = 1,
191 .gpio = GPIO_LED1,
192 },
193 };
194
195 static const struct gpio_led_platform_data
196 eukrea_mbimxsd_led_info __initconst = {
197 .leds = eukrea_mbimxsd_leds,
198 .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
199 };
200
201 static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
202 {
203 .gpio = GPIO_SWITCH1,
204 .code = BTN_0,
205 .desc = "BP1",
206 .active_low = 1,
207 .wakeup = 1,
208 },
209 };
210
211 static const struct gpio_keys_platform_data
212 eukrea_mbimxsd_button_data __initconst = {
213 .buttons = eukrea_mbimxsd_gpio_buttons,
214 .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
215 };
216
217 static struct platform_device *platform_devices[] __initdata = {
218 &eukrea_mbimxsd_lcd_powerdev,
219 };
220
221 static const struct imxuart_platform_data uart_pdata __initconst = {
222 .flags = IMXUART_HAVE_RTSCTS,
223 };
224
225 static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
226 {
227 I2C_BOARD_INFO("tlv320aic23", 0x1a),
228 },
229 };
230
231 static const
232 struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
233 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
234 };
235
236 static struct esdhc_platform_data sd1_pdata = {
237 .cd_gpio = GPIO_SD1CD,
238 .cd_type = ESDHC_CD_GPIO,
239 .wp_type = ESDHC_WP_NONE,
240 };
241
242 /*
243 * system init for baseboard usage. Will be called by cpuimx35 init.
244 *
245 * Add platform devices present on this baseboard and init
246 * them from CPU side as far as required to use them later on
247 */
eukrea_mbimxsd35_baseboard_init(void)248 void __init eukrea_mbimxsd35_baseboard_init(void)
249 {
250 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
251 ARRAY_SIZE(eukrea_mbimxsd_pads)))
252 printk(KERN_ERR "error setting mbimxsd pads !\n");
253
254 imx35_add_imx_uart1(&uart_pdata);
255 imx35_add_ipu_core(&mx3_ipu_data);
256 imx35_add_mx3_sdc_fb(&mx3fb_pdata);
257
258 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
259
260 imx35_add_flexcan1(NULL);
261 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
262
263 gpio_request(GPIO_LED1, "LED1");
264 gpio_direction_output(GPIO_LED1, 1);
265 gpio_free(GPIO_LED1);
266
267 gpio_request(GPIO_SWITCH1, "SWITCH1");
268 gpio_direction_input(GPIO_SWITCH1);
269 gpio_free(GPIO_SWITCH1);
270
271 gpio_request(GPIO_LCDPWR, "LCDPWR");
272 gpio_direction_output(GPIO_LCDPWR, 1);
273
274 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
275 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
276
277 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
278 gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
279 imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
280 }
281