1 /***************************************************************************** 2 * Copyright 2003 - 2008 Broadcom Corporation. All rights reserved. 3 * 4 * Unless you and Broadcom execute a separate written software license 5 * agreement governing use of this software, this software is licensed to you 6 * under the terms of the GNU General Public License version 2, available at 7 * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). 8 * 9 * Notwithstanding the above, under no circumstances may you combine this 10 * software in any way with any other Broadcom software provided under a 11 * license other than the GPL, without Broadcom's express prior written 12 * consent. 13 *****************************************************************************/ 14 15 /****************************************************************************/ 16 /** 17 * @file mm_addr.h 18 * 19 * @brief Memory Map address definitions 20 * 21 * @note 22 * None 23 */ 24 /****************************************************************************/ 25 26 #ifndef _MM_ADDR_H 27 #define _MM_ADDR_H 28 29 /* ---- Include Files ---------------------------------------------------- */ 30 31 #if !defined(CSP_SIMULATION) 32 #include <cfg_global.h> 33 #endif 34 35 /* ---- Public Constants and Types --------------------------------------- */ 36 37 /* Memory Map address definitions */ 38 39 #define MM_ADDR_DDR 0x00000000 40 41 #define MM_ADDR_IO_VPM_EXTMEM_RSVD 0x0F000000 /* 16 MB - Reserved external memory for VPM use */ 42 43 #define MM_ADDR_IO_FLASHC 0x20000000 44 #define MM_ADDR_IO_BROM 0x30000000 45 #define MM_ADDR_IO_ARAM 0x30100000 /* 64 KB - extra cycle latency - WS switch */ 46 #define MM_ADDR_IO_DMA0 0x30200000 47 #define MM_ADDR_IO_DMA1 0x30300000 48 #define MM_ADDR_IO_ESW 0x30400000 49 #define MM_ADDR_IO_CLCD 0x30500000 50 #define MM_ADDR_IO_PIF 0x30580000 51 #define MM_ADDR_IO_APM 0x30600000 52 #define MM_ADDR_IO_SPUM 0x30700000 53 #define MM_ADDR_IO_VPM_PROG 0x30800000 54 #define MM_ADDR_IO_VPM_DATA 0x30A00000 55 #define MM_ADDR_IO_VRAM 0x40000000 /* 64 KB - security block in front of it */ 56 #define MM_ADDR_IO_CHIPC 0x80000000 57 #define MM_ADDR_IO_UMI 0x80001000 58 #define MM_ADDR_IO_NAND 0x80001800 59 #define MM_ADDR_IO_LEDM 0x80002000 60 #define MM_ADDR_IO_PWM 0x80002040 61 #define MM_ADDR_IO_VINTC 0x80003000 62 #define MM_ADDR_IO_GPIO0 0x80004000 63 #define MM_ADDR_IO_GPIO1 0x80004800 64 #define MM_ADDR_IO_I2CS 0x80005000 65 #define MM_ADDR_IO_SPIS 0x80006000 66 #define MM_ADDR_IO_HPM 0x80007400 67 #define MM_ADDR_IO_HPM_REMAP 0x80007800 68 #define MM_ADDR_IO_TZPC 0x80008000 69 #define MM_ADDR_IO_MPU 0x80009000 70 #define MM_ADDR_IO_SPUMP 0x8000a000 71 #define MM_ADDR_IO_PKA 0x8000b000 72 #define MM_ADDR_IO_RNG 0x8000c000 73 #define MM_ADDR_IO_KEYC 0x8000d000 74 #define MM_ADDR_IO_BBL 0x8000e000 75 #define MM_ADDR_IO_OTP 0x8000f000 76 #define MM_ADDR_IO_I2S0 0x80010000 77 #define MM_ADDR_IO_I2S1 0x80011000 78 #define MM_ADDR_IO_UARTA 0x80012000 79 #define MM_ADDR_IO_UARTB 0x80013000 80 #define MM_ADDR_IO_I2CH 0x80014020 81 #define MM_ADDR_IO_SPIH 0x80015000 82 #define MM_ADDR_IO_TSC 0x80016000 83 #define MM_ADDR_IO_TMR 0x80017000 84 #define MM_ADDR_IO_WATCHDOG 0x80017800 85 #define MM_ADDR_IO_ETM 0x80018000 86 #define MM_ADDR_IO_DDRC 0x80019000 87 #define MM_ADDR_IO_SINTC 0x80100000 88 #define MM_ADDR_IO_INTC0 0x80200000 89 #define MM_ADDR_IO_INTC1 0x80201000 90 #define MM_ADDR_IO_GE 0x80300000 91 #define MM_ADDR_IO_USB_CTLR0 0x80400000 92 #define MM_ADDR_IO_USB_CTLR1 0x80410000 93 #define MM_ADDR_IO_USB_PHY 0x80420000 94 #define MM_ADDR_IO_SDIOH0 0x80500000 95 #define MM_ADDR_IO_SDIOH1 0x80600000 96 #define MM_ADDR_IO_VDEC 0x80700000 97 98 /* ---- Public Variable Externs ------------------------------------------ */ 99 /* ---- Public Function Prototypes --------------------------------------- */ 100 101 #endif /* _MM_ADDR_H */ 102