1/* 2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC 3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, 4 * AT91SAM9X25, AT91SAM9X35 SoC 5 * 6 * Copyright (C) 2012 Atmel, 7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com> 8 * 9 * Licensed under GPLv2 or later. 10 */ 11 12/include/ "skeleton.dtsi" 13 14/ { 15 model = "Atmel AT91SAM9x5 family SoC"; 16 compatible = "atmel,at91sam9x5"; 17 interrupt-parent = <&aic>; 18 19 aliases { 20 serial0 = &dbgu; 21 serial1 = &usart0; 22 serial2 = &usart1; 23 serial3 = &usart2; 24 gpio0 = &pioA; 25 gpio1 = &pioB; 26 gpio2 = &pioC; 27 gpio3 = &pioD; 28 tcb0 = &tcb0; 29 tcb1 = &tcb1; 30 }; 31 cpus { 32 cpu@0 { 33 compatible = "arm,arm926ejs"; 34 }; 35 }; 36 37 memory { 38 reg = <0x20000000 0x10000000>; 39 }; 40 41 ahb { 42 compatible = "simple-bus"; 43 #address-cells = <1>; 44 #size-cells = <1>; 45 ranges; 46 47 apb { 48 compatible = "simple-bus"; 49 #address-cells = <1>; 50 #size-cells = <1>; 51 ranges; 52 53 aic: interrupt-controller@fffff000 { 54 #interrupt-cells = <2>; 55 compatible = "atmel,at91rm9200-aic"; 56 interrupt-controller; 57 reg = <0xfffff000 0x200>; 58 }; 59 60 ramc0: ramc@ffffe800 { 61 compatible = "atmel,at91sam9g45-ddramc"; 62 reg = <0xffffe800 0x200>; 63 }; 64 65 pmc: pmc@fffffc00 { 66 compatible = "atmel,at91rm9200-pmc"; 67 reg = <0xfffffc00 0x100>; 68 }; 69 70 rstc@fffffe00 { 71 compatible = "atmel,at91sam9g45-rstc"; 72 reg = <0xfffffe00 0x10>; 73 }; 74 75 shdwc@fffffe10 { 76 compatible = "atmel,at91sam9x5-shdwc"; 77 reg = <0xfffffe10 0x10>; 78 }; 79 80 pit: timer@fffffe30 { 81 compatible = "atmel,at91sam9260-pit"; 82 reg = <0xfffffe30 0xf>; 83 interrupts = <1 4>; 84 }; 85 86 tcb0: timer@f8008000 { 87 compatible = "atmel,at91sam9x5-tcb"; 88 reg = <0xf8008000 0x100>; 89 interrupts = <17 4>; 90 }; 91 92 tcb1: timer@f800c000 { 93 compatible = "atmel,at91sam9x5-tcb"; 94 reg = <0xf800c000 0x100>; 95 interrupts = <17 4>; 96 }; 97 98 dma0: dma-controller@ffffec00 { 99 compatible = "atmel,at91sam9g45-dma"; 100 reg = <0xffffec00 0x200>; 101 interrupts = <20 4>; 102 }; 103 104 dma1: dma-controller@ffffee00 { 105 compatible = "atmel,at91sam9g45-dma"; 106 reg = <0xffffee00 0x200>; 107 interrupts = <21 4>; 108 }; 109 110 pioA: gpio@fffff400 { 111 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 112 reg = <0xfffff400 0x100>; 113 interrupts = <2 4>; 114 #gpio-cells = <2>; 115 gpio-controller; 116 interrupt-controller; 117 }; 118 119 pioB: gpio@fffff600 { 120 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 121 reg = <0xfffff600 0x100>; 122 interrupts = <2 4>; 123 #gpio-cells = <2>; 124 gpio-controller; 125 interrupt-controller; 126 }; 127 128 pioC: gpio@fffff800 { 129 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 130 reg = <0xfffff800 0x100>; 131 interrupts = <3 4>; 132 #gpio-cells = <2>; 133 gpio-controller; 134 interrupt-controller; 135 }; 136 137 pioD: gpio@fffffa00 { 138 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 139 reg = <0xfffffa00 0x100>; 140 interrupts = <3 4>; 141 #gpio-cells = <2>; 142 gpio-controller; 143 interrupt-controller; 144 }; 145 146 dbgu: serial@fffff200 { 147 compatible = "atmel,at91sam9260-usart"; 148 reg = <0xfffff200 0x200>; 149 interrupts = <1 4>; 150 status = "disabled"; 151 }; 152 153 usart0: serial@f801c000 { 154 compatible = "atmel,at91sam9260-usart"; 155 reg = <0xf801c000 0x200>; 156 interrupts = <5 4>; 157 atmel,use-dma-rx; 158 atmel,use-dma-tx; 159 status = "disabled"; 160 }; 161 162 usart1: serial@f8020000 { 163 compatible = "atmel,at91sam9260-usart"; 164 reg = <0xf8020000 0x200>; 165 interrupts = <6 4>; 166 atmel,use-dma-rx; 167 atmel,use-dma-tx; 168 status = "disabled"; 169 }; 170 171 usart2: serial@f8024000 { 172 compatible = "atmel,at91sam9260-usart"; 173 reg = <0xf8024000 0x200>; 174 interrupts = <7 4>; 175 atmel,use-dma-rx; 176 atmel,use-dma-tx; 177 status = "disabled"; 178 }; 179 180 macb0: ethernet@f802c000 { 181 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 182 reg = <0xf802c000 0x100>; 183 interrupts = <24 4>; 184 status = "disabled"; 185 }; 186 187 macb1: ethernet@f8030000 { 188 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 189 reg = <0xf8030000 0x100>; 190 interrupts = <27 4>; 191 status = "disabled"; 192 }; 193 }; 194 195 nand0: nand@40000000 { 196 compatible = "atmel,at91rm9200-nand"; 197 #address-cells = <1>; 198 #size-cells = <1>; 199 reg = <0x40000000 0x10000000 200 >; 201 atmel,nand-addr-offset = <21>; 202 atmel,nand-cmd-offset = <22>; 203 gpios = <&pioD 5 0 204 &pioD 4 0 205 0 206 >; 207 status = "disabled"; 208 }; 209 210 usb0: ohci@00600000 { 211 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 212 reg = <0x00600000 0x100000>; 213 interrupts = <22 4>; 214 status = "disabled"; 215 }; 216 217 usb1: ehci@00700000 { 218 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 219 reg = <0x00700000 0x100000>; 220 interrupts = <22 4>; 221 status = "disabled"; 222 }; 223 }; 224 225 i2c@0 { 226 compatible = "i2c-gpio"; 227 gpios = <&pioA 30 0 /* sda */ 228 &pioA 31 0 /* scl */ 229 >; 230 i2c-gpio,sda-open-drain; 231 i2c-gpio,scl-open-drain; 232 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 233 #address-cells = <1>; 234 #size-cells = <0>; 235 status = "disabled"; 236 }; 237 238 i2c@1 { 239 compatible = "i2c-gpio"; 240 gpios = <&pioC 0 0 /* sda */ 241 &pioC 1 0 /* scl */ 242 >; 243 i2c-gpio,sda-open-drain; 244 i2c-gpio,scl-open-drain; 245 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 246 #address-cells = <1>; 247 #size-cells = <0>; 248 status = "disabled"; 249 }; 250 251 i2c@2 { 252 compatible = "i2c-gpio"; 253 gpios = <&pioB 4 0 /* sda */ 254 &pioB 5 0 /* scl */ 255 >; 256 i2c-gpio,sda-open-drain; 257 i2c-gpio,scl-open-drain; 258 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 259 #address-cells = <1>; 260 #size-cells = <0>; 261 status = "disabled"; 262 }; 263}; 264