1 /**
2 * @file arch/alpha/oprofile/op_model_ev4.c
3 *
4 * @remark Copyright 2002 OProfile authors
5 * @remark Read the file COPYING
6 *
7 * @author Richard Henderson <rth@twiddle.net>
8 */
9
10 #include <linux/oprofile.h>
11 #include <linux/init.h>
12 #include <linux/smp.h>
13 #include <asm/ptrace.h>
14
15 #include "op_impl.h"
16
17
18 /* Compute all of the registers in preparation for enabling profiling. */
19
20 static void
ev4_reg_setup(struct op_register_config * reg,struct op_counter_config * ctr,struct op_system_config * sys)21 ev4_reg_setup(struct op_register_config *reg,
22 struct op_counter_config *ctr,
23 struct op_system_config *sys)
24 {
25 unsigned long ctl = 0, count, hilo;
26
27 /* Select desired events. We've mapped the event numbers
28 such that they fit directly into the event selection fields.
29
30 Note that there is no "off" setting. In both cases we select
31 the EXTERNAL event source, hoping that it'll be the lowest
32 frequency, and set the frequency counter to LOW. The interrupts
33 for these "disabled" counter overflows are ignored by the
34 interrupt handler.
35
36 This is most irritating, because the hardware *can* enable and
37 disable the interrupts for these counters independently, but the
38 wrperfmon interface doesn't allow it. */
39
40 ctl |= (ctr[0].enabled ? ctr[0].event << 8 : 14 << 8);
41 ctl |= (ctr[1].enabled ? (ctr[1].event - 16) << 32 : 7ul << 32);
42
43 /* EV4 can not read or write its counter registers. The only
44 thing one can do at all is see if you overflow and get an
45 interrupt. We can set the width of the counters, to some
46 extent. Take the interrupt count selected by the user,
47 map it onto one of the possible values, and write it back. */
48
49 count = ctr[0].count;
50 if (count <= 4096)
51 count = 4096, hilo = 1;
52 else
53 count = 65536, hilo = 0;
54 ctr[0].count = count;
55 ctl |= (ctr[0].enabled && hilo) << 3;
56
57 count = ctr[1].count;
58 if (count <= 256)
59 count = 256, hilo = 1;
60 else
61 count = 4096, hilo = 0;
62 ctr[1].count = count;
63 ctl |= (ctr[1].enabled && hilo);
64
65 reg->mux_select = ctl;
66
67 /* Select performance monitoring options. */
68 /* ??? Need to come up with some mechanism to trace only
69 selected processes. EV4 does not have a mechanism to
70 select kernel or user mode only. For now, enable always. */
71 reg->proc_mode = 0;
72
73 /* Frequency is folded into mux_select for EV4. */
74 reg->freq = 0;
75
76 /* See above regarding no writes. */
77 reg->reset_values = 0;
78 reg->need_reset = 0;
79
80 }
81
82 /* Program all of the registers in preparation for enabling profiling. */
83
84 static void
ev4_cpu_setup(void * x)85 ev4_cpu_setup(void *x)
86 {
87 struct op_register_config *reg = x;
88
89 wrperfmon(2, reg->mux_select);
90 wrperfmon(3, reg->proc_mode);
91 }
92
93 static void
ev4_handle_interrupt(unsigned long which,struct pt_regs * regs,struct op_counter_config * ctr)94 ev4_handle_interrupt(unsigned long which, struct pt_regs *regs,
95 struct op_counter_config *ctr)
96 {
97 /* EV4 can't properly disable counters individually.
98 Discard "disabled" events now. */
99 if (!ctr[which].enabled)
100 return;
101
102 /* Record the sample. */
103 oprofile_add_sample(regs, which);
104 }
105
106
107 struct op_axp_model op_model_ev4 = {
108 .reg_setup = ev4_reg_setup,
109 .cpu_setup = ev4_cpu_setup,
110 .reset_ctr = NULL,
111 .handle_interrupt = ev4_handle_interrupt,
112 .cpu_type = "alpha/ev4",
113 .num_counters = 2,
114 .can_set_proc_mode = 0,
115 };
116