1 /**************************************************************************
2 * Copyright (c) 2009, Intel Corporation.
3 * All Rights Reserved.
4
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Benjamin Defnet <benjamin.r.defnet@intel.com>
26 * Rajesh Poornachandran <rajesh.poornachandran@intel.com>
27 *
28 */
29 #include "psb_powermgmt.h"
30 #include "psb_drv.h"
31 #include "psb_intel_reg.h"
32 #include <linux/mutex.h>
33 #include <linux/pm_runtime.h>
34
35 #undef OSPM_GFX_DPK
36
37 extern u32 gui32SGXDeviceID;
38 extern u32 gui32MRSTDisplayDeviceID;
39 extern u32 gui32MRSTMSVDXDeviceID;
40 extern u32 gui32MRSTTOPAZDeviceID;
41
42 struct drm_device *gpDrmDevice = NULL;
43 static struct mutex power_mutex;
44 static bool gbSuspendInProgress = false;
45 static bool gbResumeInProgress = false;
46 static int g_hw_power_status_mask;
47 static atomic_t g_display_access_count;
48 static atomic_t g_graphics_access_count;
49 static atomic_t g_videoenc_access_count;
50 static atomic_t g_videodec_access_count;
51 int allow_runtime_pm = 0;
52
53 void ospm_power_island_up(int hw_islands);
54 void ospm_power_island_down(int hw_islands);
55 static bool gbSuspended = false;
56 bool gbgfxsuspended = false;
57
58 /*
59 * ospm_power_init
60 *
61 * Description: Initialize this ospm power management module
62 */
ospm_power_init(struct drm_device * dev)63 void ospm_power_init(struct drm_device *dev)
64 {
65 struct drm_psb_private *dev_priv = (struct drm_psb_private *)dev->dev_private;
66
67 gpDrmDevice = dev;
68
69 dev_priv->apm_base = dev_priv->apm_reg & 0xffff;
70 dev_priv->ospm_base &= 0xffff;
71
72 mutex_init(&power_mutex);
73 g_hw_power_status_mask = OSPM_ALL_ISLANDS;
74 atomic_set(&g_display_access_count, 0);
75 atomic_set(&g_graphics_access_count, 0);
76 atomic_set(&g_videoenc_access_count, 0);
77 atomic_set(&g_videodec_access_count, 0);
78 }
79
80 /*
81 * ospm_power_uninit
82 *
83 * Description: Uninitialize this ospm power management module
84 */
ospm_power_uninit(void)85 void ospm_power_uninit(void)
86 {
87 mutex_destroy(&power_mutex);
88 pm_runtime_disable(&gpDrmDevice->pdev->dev);
89 pm_runtime_set_suspended(&gpDrmDevice->pdev->dev);
90 }
91
92
93 /*
94 * save_display_registers
95 *
96 * Description: We are going to suspend so save current display
97 * register state.
98 */
save_display_registers(struct drm_device * dev)99 static int save_display_registers(struct drm_device *dev)
100 {
101 struct drm_psb_private *dev_priv = dev->dev_private;
102 struct drm_crtc * crtc;
103 struct drm_connector * connector;
104
105 /* Display arbitration control + watermarks */
106 dev_priv->saveDSPARB = PSB_RVDC32(DSPARB);
107 dev_priv->saveDSPFW1 = PSB_RVDC32(DSPFW1);
108 dev_priv->saveDSPFW2 = PSB_RVDC32(DSPFW2);
109 dev_priv->saveDSPFW3 = PSB_RVDC32(DSPFW3);
110 dev_priv->saveDSPFW4 = PSB_RVDC32(DSPFW4);
111 dev_priv->saveDSPFW5 = PSB_RVDC32(DSPFW5);
112 dev_priv->saveDSPFW6 = PSB_RVDC32(DSPFW6);
113 dev_priv->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
114
115 /*save crtc and output state*/
116 mutex_lock(&dev->mode_config.mutex);
117 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
118 if(drm_helper_crtc_in_use(crtc)) {
119 crtc->funcs->save(crtc);
120 }
121 }
122
123 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
124 connector->funcs->save(connector);
125 }
126 mutex_unlock(&dev->mode_config.mutex);
127
128 /* Interrupt state */
129 /*
130 * Handled in psb_irq.c
131 */
132
133 return 0;
134 }
135
136 /*
137 * restore_display_registers
138 *
139 * Description: We are going to resume so restore display register state.
140 */
restore_display_registers(struct drm_device * dev)141 static int restore_display_registers(struct drm_device *dev)
142 {
143 struct drm_psb_private *dev_priv = dev->dev_private;
144 struct drm_crtc * crtc;
145 struct drm_connector * connector;
146
147 /* Display arbitration + watermarks */
148 PSB_WVDC32(dev_priv->saveDSPARB, DSPARB);
149 PSB_WVDC32(dev_priv->saveDSPFW1, DSPFW1);
150 PSB_WVDC32(dev_priv->saveDSPFW2, DSPFW2);
151 PSB_WVDC32(dev_priv->saveDSPFW3, DSPFW3);
152 PSB_WVDC32(dev_priv->saveDSPFW4, DSPFW4);
153 PSB_WVDC32(dev_priv->saveDSPFW5, DSPFW5);
154 PSB_WVDC32(dev_priv->saveDSPFW6, DSPFW6);
155 PSB_WVDC32(dev_priv->saveCHICKENBIT, DSPCHICKENBIT);
156
157 /*make sure VGA plane is off. it initializes to on after reset!*/
158 PSB_WVDC32(0x80000000, VGACNTRL);
159
160 mutex_lock(&dev->mode_config.mutex);
161 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
162 if(drm_helper_crtc_in_use(crtc))
163 crtc->funcs->restore(crtc);
164 }
165 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
166 connector->funcs->restore(connector);
167 }
168 mutex_unlock(&dev->mode_config.mutex);
169
170 /*Interrupt state*/
171 /*
172 * Handled in psb_irq.c
173 */
174
175 return 0;
176 }
177 /*
178 * powermgmt_suspend_display
179 *
180 * Description: Suspend the display hardware saving state and disabling
181 * as necessary.
182 */
ospm_suspend_display(struct drm_device * dev)183 void ospm_suspend_display(struct drm_device *dev)
184 {
185 struct drm_psb_private *dev_priv = dev->dev_private;
186 int pp_stat, ret=0;
187
188 printk(KERN_ALERT "%s \n", __func__);
189
190 #ifdef OSPM_GFX_DPK
191 printk(KERN_ALERT "%s \n", __func__);
192 #endif
193 if (!(g_hw_power_status_mask & OSPM_DISPLAY_ISLAND))
194 return;
195
196 save_display_registers(dev);
197
198 if (dev_priv->iLVDS_enable) {
199 /*shutdown the panel*/
200 PSB_WVDC32(0, PP_CONTROL);
201
202 do {
203 pp_stat = PSB_RVDC32(PP_STATUS);
204 } while (pp_stat & 0x80000000);
205
206 /*turn off the plane*/
207 PSB_WVDC32(0x58000000, DSPACNTR);
208 PSB_WVDC32(0, DSPASURF);/*trigger the plane disable*/
209 /*wait ~4 ticks*/
210 msleep(4);
211
212 /*turn off pipe*/
213 PSB_WVDC32(0x0, PIPEACONF);
214 /*wait ~8 ticks*/
215 msleep(8);
216
217 /*turn off PLLs*/
218 PSB_WVDC32(0, MRST_DPLL_A);
219 } else {
220 PSB_WVDC32(DPI_SHUT_DOWN, DPI_CONTROL_REG);
221 PSB_WVDC32(0x0, PIPEACONF);
222 PSB_WVDC32(0x2faf0000, BLC_PWM_CTL);
223 while (REG_READ(0x70008) & 0x40000000);
224 while ((PSB_RVDC32(GEN_FIFO_STAT_REG) & DPI_FIFO_EMPTY)
225 != DPI_FIFO_EMPTY);
226 PSB_WVDC32(0, DEVICE_READY_REG);
227 /* turn off panel power */
228 ret = 0;
229 }
230 ospm_power_island_down(OSPM_DISPLAY_ISLAND);
231 }
232
233 /*
234 * ospm_resume_display
235 *
236 * Description: Resume the display hardware restoring state and enabling
237 * as necessary.
238 */
ospm_resume_display(struct pci_dev * pdev)239 void ospm_resume_display(struct pci_dev *pdev)
240 {
241 struct drm_device *dev = pci_get_drvdata(pdev);
242 struct drm_psb_private *dev_priv = dev->dev_private;
243 struct psb_gtt *pg = dev_priv->pg;
244
245 printk(KERN_ALERT "%s \n", __func__);
246
247 #ifdef OSPM_GFX_DPK
248 printk(KERN_ALERT "%s \n", __func__);
249 #endif
250 if (g_hw_power_status_mask & OSPM_DISPLAY_ISLAND)
251 return;
252
253 /* turn on the display power island */
254 ospm_power_island_up(OSPM_DISPLAY_ISLAND);
255
256 PSB_WVDC32(pg->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL);
257 pci_write_config_word(pdev, PSB_GMCH_CTRL,
258 pg->gmch_ctrl | _PSB_GMCH_ENABLED);
259
260 /* Don't reinitialize the GTT as it is unnecessary. The gtt is
261 * stored in memory so it will automatically be restored. All
262 * we need to do is restore the PGETBL_CTL which we already do
263 * above.
264 */
265 /*psb_gtt_init(dev_priv->pg, 1);*/
266
267 restore_display_registers(dev);
268 }
269
270 #if 1
271 /*
272 * ospm_suspend_pci
273 *
274 * Description: Suspend the pci device saving state and disabling
275 * as necessary.
276 */
ospm_suspend_pci(struct pci_dev * pdev)277 static void ospm_suspend_pci(struct pci_dev *pdev)
278 {
279 struct drm_device *dev = pci_get_drvdata(pdev);
280 struct drm_psb_private *dev_priv = dev->dev_private;
281 int bsm, vbt;
282
283 if (gbSuspended)
284 return;
285
286 #ifdef OSPM_GFX_DPK
287 printk(KERN_ALERT "ospm_suspend_pci\n");
288 #endif
289
290 pci_save_state(pdev);
291 pci_read_config_dword(pdev, 0x5C, &bsm);
292 dev_priv->saveBSM = bsm;
293 pci_read_config_dword(pdev, 0xFC, &vbt);
294 dev_priv->saveVBT = vbt;
295 pci_read_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, &dev_priv->msi_addr);
296 pci_read_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, &dev_priv->msi_data);
297
298 pci_disable_device(pdev);
299 pci_set_power_state(pdev, PCI_D3hot);
300
301 gbSuspended = true;
302 gbgfxsuspended = true;
303 }
304
305 /*
306 * ospm_resume_pci
307 *
308 * Description: Resume the pci device restoring state and enabling
309 * as necessary.
310 */
ospm_resume_pci(struct pci_dev * pdev)311 static bool ospm_resume_pci(struct pci_dev *pdev)
312 {
313 struct drm_device *dev = pci_get_drvdata(pdev);
314 struct drm_psb_private *dev_priv = dev->dev_private;
315 int ret = 0;
316
317 if (!gbSuspended)
318 return true;
319
320 #ifdef OSPM_GFX_DPK
321 printk(KERN_ALERT "ospm_resume_pci\n");
322 #endif
323
324 pci_set_power_state(pdev, PCI_D0);
325 pci_restore_state(pdev);
326 pci_write_config_dword(pdev, 0x5c, dev_priv->saveBSM);
327 pci_write_config_dword(pdev, 0xFC, dev_priv->saveVBT);
328 /* retoring MSI address and data in PCIx space */
329 pci_write_config_dword(pdev, PSB_PCIx_MSI_ADDR_LOC, dev_priv->msi_addr);
330 pci_write_config_dword(pdev, PSB_PCIx_MSI_DATA_LOC, dev_priv->msi_data);
331 ret = pci_enable_device(pdev);
332
333 if (ret != 0)
334 printk(KERN_ALERT "ospm_resume_pci: pci_enable_device failed: %d\n", ret);
335 else
336 gbSuspended = false;
337
338 return !gbSuspended;
339 }
340 #endif
341 /*
342 * ospm_power_suspend
343 *
344 * Description: OSPM is telling our driver to suspend so save state
345 * and power down all hardware.
346 */
ospm_power_suspend(struct pci_dev * pdev,pm_message_t state)347 int ospm_power_suspend(struct pci_dev *pdev, pm_message_t state)
348 {
349 int ret = 0;
350 int graphics_access_count;
351 int videoenc_access_count;
352 int videodec_access_count;
353 int display_access_count;
354 bool suspend_pci = true;
355
356 if(gbSuspendInProgress || gbResumeInProgress)
357 {
358 #ifdef OSPM_GFX_DPK
359 printk(KERN_ALERT "OSPM_GFX_DPK: %s system BUSY \n", __func__);
360 #endif
361 return -EBUSY;
362 }
363
364 mutex_lock(&power_mutex);
365
366 if (!gbSuspended) {
367 graphics_access_count = atomic_read(&g_graphics_access_count);
368 videoenc_access_count = atomic_read(&g_videoenc_access_count);
369 videodec_access_count = atomic_read(&g_videodec_access_count);
370 display_access_count = atomic_read(&g_display_access_count);
371
372 if (graphics_access_count ||
373 videoenc_access_count ||
374 videodec_access_count ||
375 display_access_count)
376 ret = -EBUSY;
377
378 if (!ret) {
379 gbSuspendInProgress = true;
380
381 psb_irq_uninstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
382 ospm_suspend_display(gpDrmDevice);
383 if (suspend_pci == true) {
384 ospm_suspend_pci(pdev);
385 }
386 gbSuspendInProgress = false;
387 } else {
388 printk(KERN_ALERT "ospm_power_suspend: device busy: graphics %d videoenc %d videodec %d display %d\n", graphics_access_count, videoenc_access_count, videodec_access_count, display_access_count);
389 }
390 }
391
392
393 mutex_unlock(&power_mutex);
394 return ret;
395 }
396
397 /*
398 * ospm_power_island_up
399 *
400 * Description: Restore power to the specified island(s) (powergating)
401 */
ospm_power_island_up(int hw_islands)402 void ospm_power_island_up(int hw_islands)
403 {
404 u32 pwr_cnt = 0;
405 u32 pwr_sts = 0;
406 u32 pwr_mask = 0;
407
408 struct drm_psb_private *dev_priv =
409 (struct drm_psb_private *) gpDrmDevice->dev_private;
410
411
412 if (hw_islands & OSPM_DISPLAY_ISLAND) {
413 pwr_mask = PSB_PWRGT_DISPLAY_MASK;
414
415 pwr_cnt = inl(dev_priv->ospm_base + PSB_PM_SSC);
416 pwr_cnt &= ~pwr_mask;
417 outl(pwr_cnt, (dev_priv->ospm_base + PSB_PM_SSC));
418
419 while (true) {
420 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
421 if ((pwr_sts & pwr_mask) == 0)
422 break;
423 else
424 udelay(10);
425 }
426 }
427
428 g_hw_power_status_mask |= hw_islands;
429 }
430
431 /*
432 * ospm_power_resume
433 */
ospm_power_resume(struct pci_dev * pdev)434 int ospm_power_resume(struct pci_dev *pdev)
435 {
436 if(gbSuspendInProgress || gbResumeInProgress)
437 {
438 #ifdef OSPM_GFX_DPK
439 printk(KERN_ALERT "OSPM_GFX_DPK: %s hw_island: Suspend || gbResumeInProgress!!!! \n", __func__);
440 #endif
441 return 0;
442 }
443
444 mutex_lock(&power_mutex);
445
446 #ifdef OSPM_GFX_DPK
447 printk(KERN_ALERT "OSPM_GFX_DPK: ospm_power_resume \n");
448 #endif
449
450 gbResumeInProgress = true;
451
452 ospm_resume_pci(pdev);
453
454 ospm_resume_display(gpDrmDevice->pdev);
455 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
456 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
457
458 gbResumeInProgress = false;
459
460 mutex_unlock(&power_mutex);
461
462 return 0;
463 }
464
465
466 /*
467 * ospm_power_island_down
468 *
469 * Description: Cut power to the specified island(s) (powergating)
470 */
ospm_power_island_down(int islands)471 void ospm_power_island_down(int islands)
472 {
473 #if 0
474 u32 pwr_cnt = 0;
475 u32 pwr_mask = 0;
476 u32 pwr_sts = 0;
477
478 struct drm_psb_private *dev_priv =
479 (struct drm_psb_private *) gpDrmDevice->dev_private;
480
481 g_hw_power_status_mask &= ~islands;
482
483 if (islands & OSPM_GRAPHICS_ISLAND) {
484 pwr_cnt |= PSB_PWRGT_GFX_MASK;
485 pwr_mask |= PSB_PWRGT_GFX_MASK;
486 if (dev_priv->graphics_state == PSB_PWR_STATE_ON) {
487 dev_priv->gfx_on_time += (jiffies - dev_priv->gfx_last_mode_change) * 1000 / HZ;
488 dev_priv->gfx_last_mode_change = jiffies;
489 dev_priv->graphics_state = PSB_PWR_STATE_OFF;
490 dev_priv->gfx_off_cnt++;
491 }
492 }
493 if (islands & OSPM_VIDEO_ENC_ISLAND) {
494 pwr_cnt |= PSB_PWRGT_VID_ENC_MASK;
495 pwr_mask |= PSB_PWRGT_VID_ENC_MASK;
496 }
497 if (islands & OSPM_VIDEO_DEC_ISLAND) {
498 pwr_cnt |= PSB_PWRGT_VID_DEC_MASK;
499 pwr_mask |= PSB_PWRGT_VID_DEC_MASK;
500 }
501 if (pwr_cnt) {
502 pwr_cnt |= inl(dev_priv->apm_base);
503 outl(pwr_cnt, dev_priv->apm_base + PSB_APM_CMD);
504 while (true) {
505 pwr_sts = inl(dev_priv->apm_base + PSB_APM_STS);
506
507 if ((pwr_sts & pwr_mask) == pwr_mask)
508 break;
509 else
510 udelay(10);
511 }
512 }
513
514 if (islands & OSPM_DISPLAY_ISLAND) {
515 pwr_mask = PSB_PWRGT_DISPLAY_MASK;
516
517 outl(pwr_mask, (dev_priv->ospm_base + PSB_PM_SSC));
518
519 while (true) {
520 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
521 if ((pwr_sts & pwr_mask) == pwr_mask)
522 break;
523 else
524 udelay(10);
525 }
526 }
527 #endif
528 }
529
530
531 /*
532 * ospm_power_is_hw_on
533 *
534 * Description: do an instantaneous check for if the specified islands
535 * are on. Only use this in cases where you know the g_state_change_mutex
536 * is already held such as in irq install/uninstall. Otherwise, use
537 * ospm_power_using_hw_begin().
538 */
ospm_power_is_hw_on(int hw_islands)539 bool ospm_power_is_hw_on(int hw_islands)
540 {
541 return ((g_hw_power_status_mask & hw_islands) == hw_islands) ? true:false;
542 }
543
544 /*
545 * ospm_power_using_hw_begin
546 *
547 * Description: Notify PowerMgmt module that you will be accessing the
548 * specified island's hw so don't power it off. If force_on is true,
549 * this will power on the specified island if it is off.
550 * Otherwise, this will return false and the caller is expected to not
551 * access the hw.
552 *
553 * NOTE *** If this is called from and interrupt handler or other atomic
554 * context, then it will return false if we are in the middle of a
555 * power state transition and the caller will be expected to handle that
556 * even if force_on is set to true.
557 */
ospm_power_using_hw_begin(int hw_island,UHBUsage usage)558 bool ospm_power_using_hw_begin(int hw_island, UHBUsage usage)
559 {
560 return 1; /*FIXMEAC */
561 #if 0
562 bool ret = true;
563 bool island_is_off = false;
564 bool b_atomic = (in_interrupt() || in_atomic());
565 bool locked = true;
566 struct pci_dev *pdev = gpDrmDevice->pdev;
567 u32 deviceID = 0;
568 bool force_on = usage ? true: false;
569 /*quick path, not 100% race safe, but should be enough comapre to current other code in this file */
570 if (!force_on) {
571 if (hw_island & (OSPM_ALL_ISLANDS & ~g_hw_power_status_mask))
572 return false;
573 else {
574 locked = false;
575 #ifdef CONFIG_PM_RUNTIME
576 /* increment pm_runtime_refcount */
577 pm_runtime_get(&pdev->dev);
578 #endif
579 goto increase_count;
580 }
581 }
582
583
584 if (!b_atomic)
585 mutex_lock(&power_mutex);
586
587 island_is_off = hw_island & (OSPM_ALL_ISLANDS & ~g_hw_power_status_mask);
588
589 if (b_atomic && (gbSuspendInProgress || gbResumeInProgress || gbSuspended) && force_on && island_is_off)
590 ret = false;
591
592 if (ret && island_is_off && !force_on)
593 ret = false;
594
595 if (ret && island_is_off && force_on) {
596 gbResumeInProgress = true;
597
598 ret = ospm_resume_pci(pdev);
599
600 if (ret) {
601 switch(hw_island)
602 {
603 case OSPM_DISPLAY_ISLAND:
604 deviceID = gui32MRSTDisplayDeviceID;
605 ospm_resume_display(pdev);
606 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
607 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
608 break;
609 case OSPM_GRAPHICS_ISLAND:
610 deviceID = gui32SGXDeviceID;
611 ospm_power_island_up(OSPM_GRAPHICS_ISLAND);
612 psb_irq_preinstall_islands(gpDrmDevice, OSPM_GRAPHICS_ISLAND);
613 psb_irq_postinstall_islands(gpDrmDevice, OSPM_GRAPHICS_ISLAND);
614 break;
615 #if 1
616 case OSPM_VIDEO_DEC_ISLAND:
617 if(!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
618 //printk(KERN_ALERT "%s power on display for video decode use\n", __func__);
619 deviceID = gui32MRSTDisplayDeviceID;
620 ospm_resume_display(pdev);
621 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
622 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
623 }
624 else{
625 //printk(KERN_ALERT "%s display is already on for video decode use\n", __func__);
626 }
627
628 if(!ospm_power_is_hw_on(OSPM_VIDEO_DEC_ISLAND)) {
629 //printk(KERN_ALERT "%s power on video decode\n", __func__);
630 deviceID = gui32MRSTMSVDXDeviceID;
631 ospm_power_island_up(OSPM_VIDEO_DEC_ISLAND);
632 psb_irq_preinstall_islands(gpDrmDevice, OSPM_VIDEO_DEC_ISLAND);
633 psb_irq_postinstall_islands(gpDrmDevice, OSPM_VIDEO_DEC_ISLAND);
634 }
635 else{
636 //printk(KERN_ALERT "%s video decode is already on\n", __func__);
637 }
638
639 break;
640 case OSPM_VIDEO_ENC_ISLAND:
641 if(!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
642 //printk(KERN_ALERT "%s power on display for video encode\n", __func__);
643 deviceID = gui32MRSTDisplayDeviceID;
644 ospm_resume_display(pdev);
645 psb_irq_preinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
646 psb_irq_postinstall_islands(gpDrmDevice, OSPM_DISPLAY_ISLAND);
647 }
648 else{
649 //printk(KERN_ALERT "%s display is already on for video encode use\n", __func__);
650 }
651
652 if(!ospm_power_is_hw_on(OSPM_VIDEO_ENC_ISLAND)) {
653 //printk(KERN_ALERT "%s power on video encode\n", __func__);
654 deviceID = gui32MRSTTOPAZDeviceID;
655 ospm_power_island_up(OSPM_VIDEO_ENC_ISLAND);
656 psb_irq_preinstall_islands(gpDrmDevice, OSPM_VIDEO_ENC_ISLAND);
657 psb_irq_postinstall_islands(gpDrmDevice, OSPM_VIDEO_ENC_ISLAND);
658 }
659 else{
660 //printk(KERN_ALERT "%s video decode is already on\n", __func__);
661 }
662 #endif
663 break;
664
665 default:
666 printk(KERN_ALERT "%s unknown island !!!! \n", __func__);
667 break;
668 }
669
670 }
671
672 if (!ret)
673 printk(KERN_ALERT "ospm_power_using_hw_begin: forcing on %d failed\n", hw_island);
674
675 gbResumeInProgress = false;
676 }
677 increase_count:
678 if (ret) {
679 switch(hw_island)
680 {
681 case OSPM_GRAPHICS_ISLAND:
682 atomic_inc(&g_graphics_access_count);
683 break;
684 case OSPM_VIDEO_ENC_ISLAND:
685 atomic_inc(&g_videoenc_access_count);
686 break;
687 case OSPM_VIDEO_DEC_ISLAND:
688 atomic_inc(&g_videodec_access_count);
689 break;
690 case OSPM_DISPLAY_ISLAND:
691 atomic_inc(&g_display_access_count);
692 break;
693 }
694 }
695
696 if (!b_atomic && locked)
697 mutex_unlock(&power_mutex);
698
699 return ret;
700 #endif
701 }
702
703
704 /*
705 * ospm_power_using_hw_end
706 *
707 * Description: Notify PowerMgmt module that you are done accessing the
708 * specified island's hw so feel free to power it off. Note that this
709 * function doesn't actually power off the islands.
710 */
ospm_power_using_hw_end(int hw_island)711 void ospm_power_using_hw_end(int hw_island)
712 {
713 #if 0 /* FIXMEAC */
714 switch(hw_island)
715 {
716 case OSPM_GRAPHICS_ISLAND:
717 atomic_dec(&g_graphics_access_count);
718 break;
719 case OSPM_VIDEO_ENC_ISLAND:
720 atomic_dec(&g_videoenc_access_count);
721 break;
722 case OSPM_VIDEO_DEC_ISLAND:
723 atomic_dec(&g_videodec_access_count);
724 break;
725 case OSPM_DISPLAY_ISLAND:
726 atomic_dec(&g_display_access_count);
727 break;
728 }
729
730 //decrement runtime pm ref count
731 pm_runtime_put(&gpDrmDevice->pdev->dev);
732
733 WARN_ON(atomic_read(&g_graphics_access_count) < 0);
734 WARN_ON(atomic_read(&g_videoenc_access_count) < 0);
735 WARN_ON(atomic_read(&g_videodec_access_count) < 0);
736 WARN_ON(atomic_read(&g_display_access_count) < 0);
737 #endif
738 }
739
ospm_runtime_pm_allow(struct drm_device * dev)740 int ospm_runtime_pm_allow(struct drm_device * dev)
741 {
742 return 0;
743 }
744
ospm_runtime_pm_forbid(struct drm_device * dev)745 void ospm_runtime_pm_forbid(struct drm_device * dev)
746 {
747 struct drm_psb_private * dev_priv = dev->dev_private;
748
749 DRM_INFO("%s\n", __FUNCTION__);
750
751 pm_runtime_forbid(&dev->pdev->dev);
752 dev_priv->rpm_enabled = 0;
753 }
754
psb_runtime_suspend(struct device * dev)755 int psb_runtime_suspend(struct device *dev)
756 {
757 pm_message_t state;
758 int ret = 0;
759 state.event = 0;
760
761 #ifdef OSPM_GFX_DPK
762 printk(KERN_ALERT "OSPM_GFX_DPK: %s \n", __func__);
763 #endif
764 if (atomic_read(&g_graphics_access_count) || atomic_read(&g_videoenc_access_count)
765 || atomic_read(&g_videodec_access_count) || atomic_read(&g_display_access_count)){
766 #ifdef OSPM_GFX_DPK
767 printk(KERN_ALERT "OSPM_GFX_DPK: GFX: %d VEC: %d VED: %d DC: %d DSR: %d \n", atomic_read(&g_graphics_access_count),
768 atomic_read(&g_videoenc_access_count), atomic_read(&g_videodec_access_count), atomic_read(&g_display_access_count));
769 #endif
770 return -EBUSY;
771 }
772 else
773 ret = ospm_power_suspend(gpDrmDevice->pdev, state);
774
775 return ret;
776 }
777
psb_runtime_resume(struct device * dev)778 int psb_runtime_resume(struct device *dev)
779 {
780 return 0;
781 }
782
psb_runtime_idle(struct device * dev)783 int psb_runtime_idle(struct device *dev)
784 {
785 /*printk (KERN_ALERT "lvds:%d,mipi:%d\n", dev_priv->is_lvds_on, dev_priv->is_mipi_on);*/
786 if (atomic_read(&g_graphics_access_count) || atomic_read(&g_videoenc_access_count)
787 || atomic_read(&g_videodec_access_count) || atomic_read(&g_display_access_count))
788 return 1;
789 else
790 return 0;
791 }
792
793