1 /*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
7 * Author: Johan Palsson <johan.palsson@stericsson.com>
8 */
9 #include <linux/init.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/completion.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/err.h>
19 #include <linux/slab.h>
20 #include <linux/list.h>
21 #include <linux/mfd/ab8500.h>
22 #include <linux/mfd/abx500.h>
23 #include <linux/mfd/ab8500/gpadc.h>
24
25 /*
26 * GPADC register offsets
27 * Bank : 0x0A
28 */
29 #define AB8500_GPADC_CTRL1_REG 0x00
30 #define AB8500_GPADC_CTRL2_REG 0x01
31 #define AB8500_GPADC_CTRL3_REG 0x02
32 #define AB8500_GPADC_AUTO_TIMER_REG 0x03
33 #define AB8500_GPADC_STAT_REG 0x04
34 #define AB8500_GPADC_MANDATAL_REG 0x05
35 #define AB8500_GPADC_MANDATAH_REG 0x06
36 #define AB8500_GPADC_AUTODATAL_REG 0x07
37 #define AB8500_GPADC_AUTODATAH_REG 0x08
38 #define AB8500_GPADC_MUX_CTRL_REG 0x09
39
40 /*
41 * OTP register offsets
42 * Bank : 0x15
43 */
44 #define AB8500_GPADC_CAL_1 0x0F
45 #define AB8500_GPADC_CAL_2 0x10
46 #define AB8500_GPADC_CAL_3 0x11
47 #define AB8500_GPADC_CAL_4 0x12
48 #define AB8500_GPADC_CAL_5 0x13
49 #define AB8500_GPADC_CAL_6 0x14
50 #define AB8500_GPADC_CAL_7 0x15
51
52 /* gpadc constants */
53 #define EN_VINTCORE12 0x04
54 #define EN_VTVOUT 0x02
55 #define EN_GPADC 0x01
56 #define DIS_GPADC 0x00
57 #define SW_AVG_16 0x60
58 #define ADC_SW_CONV 0x04
59 #define EN_ICHAR 0x80
60 #define EN_BUF 0x40
61 #define DIS_ZERO 0x00
62 #define GPADC_BUSY 0x01
63
64 /* GPADC constants from AB8500 spec, UM0836 */
65 #define ADC_RESOLUTION 1024
66 #define ADC_CH_BTEMP_MIN 0
67 #define ADC_CH_BTEMP_MAX 1350
68 #define ADC_CH_DIETEMP_MIN 0
69 #define ADC_CH_DIETEMP_MAX 1350
70 #define ADC_CH_CHG_V_MIN 0
71 #define ADC_CH_CHG_V_MAX 20030
72 #define ADC_CH_ACCDET2_MIN 0
73 #define ADC_CH_ACCDET2_MAX 2500
74 #define ADC_CH_VBAT_MIN 2300
75 #define ADC_CH_VBAT_MAX 4800
76 #define ADC_CH_CHG_I_MIN 0
77 #define ADC_CH_CHG_I_MAX 1500
78 #define ADC_CH_BKBAT_MIN 0
79 #define ADC_CH_BKBAT_MAX 3200
80
81 /* This is used to not lose precision when dividing to get gain and offset */
82 #define CALIB_SCALE 1000
83
84 enum cal_channels {
85 ADC_INPUT_VMAIN = 0,
86 ADC_INPUT_BTEMP,
87 ADC_INPUT_VBAT,
88 NBR_CAL_INPUTS,
89 };
90
91 /**
92 * struct adc_cal_data - Table for storing gain and offset for the calibrated
93 * ADC channels
94 * @gain: Gain of the ADC channel
95 * @offset: Offset of the ADC channel
96 */
97 struct adc_cal_data {
98 u64 gain;
99 u64 offset;
100 };
101
102 /**
103 * struct ab8500_gpadc - AB8500 GPADC device information
104 * @dev: pointer to the struct device
105 * @node: a list of AB8500 GPADCs, hence prepared for
106 reentrance
107 * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
108 * the completion of gpadc conversion
109 * @ab8500_gpadc_lock: structure of type mutex
110 * @regu: pointer to the struct regulator
111 * @irq: interrupt number that is used by gpadc
112 * @cal_data array of ADC calibration data structs
113 */
114 struct ab8500_gpadc {
115 struct device *dev;
116 struct list_head node;
117 struct completion ab8500_gpadc_complete;
118 struct mutex ab8500_gpadc_lock;
119 struct regulator *regu;
120 int irq;
121 struct adc_cal_data cal_data[NBR_CAL_INPUTS];
122 };
123
124 static LIST_HEAD(ab8500_gpadc_list);
125
126 /**
127 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
128 * (i.e. the first GPADC in the instance list)
129 */
ab8500_gpadc_get(char * name)130 struct ab8500_gpadc *ab8500_gpadc_get(char *name)
131 {
132 struct ab8500_gpadc *gpadc;
133
134 list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
135 if (!strcmp(name, dev_name(gpadc->dev)))
136 return gpadc;
137 }
138
139 return ERR_PTR(-ENOENT);
140 }
141 EXPORT_SYMBOL(ab8500_gpadc_get);
142
ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc * gpadc,u8 input,int ad_value)143 static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 input,
144 int ad_value)
145 {
146 int res;
147
148 switch (input) {
149 case MAIN_CHARGER_V:
150 /* For some reason we don't have calibrated data */
151 if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
152 res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
153 ADC_CH_CHG_V_MIN) * ad_value /
154 ADC_RESOLUTION;
155 break;
156 }
157 /* Here we can use the calibrated data */
158 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
159 gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
160 break;
161
162 case BAT_CTRL:
163 case BTEMP_BALL:
164 case ACC_DETECT1:
165 case ADC_AUX1:
166 case ADC_AUX2:
167 /* For some reason we don't have calibrated data */
168 if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
169 res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
170 ADC_CH_BTEMP_MIN) * ad_value /
171 ADC_RESOLUTION;
172 break;
173 }
174 /* Here we can use the calibrated data */
175 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
176 gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
177 break;
178
179 case MAIN_BAT_V:
180 /* For some reason we don't have calibrated data */
181 if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
182 res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
183 ADC_CH_VBAT_MIN) * ad_value /
184 ADC_RESOLUTION;
185 break;
186 }
187 /* Here we can use the calibrated data */
188 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
189 gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
190 break;
191
192 case DIE_TEMP:
193 res = ADC_CH_DIETEMP_MIN +
194 (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
195 ADC_RESOLUTION;
196 break;
197
198 case ACC_DETECT2:
199 res = ADC_CH_ACCDET2_MIN +
200 (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
201 ADC_RESOLUTION;
202 break;
203
204 case VBUS_V:
205 res = ADC_CH_CHG_V_MIN +
206 (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
207 ADC_RESOLUTION;
208 break;
209
210 case MAIN_CHARGER_C:
211 case USB_CHARGER_C:
212 res = ADC_CH_CHG_I_MIN +
213 (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
214 ADC_RESOLUTION;
215 break;
216
217 case BK_BAT_V:
218 res = ADC_CH_BKBAT_MIN +
219 (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
220 ADC_RESOLUTION;
221 break;
222
223 default:
224 dev_err(gpadc->dev,
225 "unknown channel, not possible to convert\n");
226 res = -EINVAL;
227 break;
228
229 }
230 return res;
231 }
232
233 /**
234 * ab8500_gpadc_convert() - gpadc conversion
235 * @input: analog input to be converted to digital data
236 *
237 * This function converts the selected analog i/p to digital
238 * data.
239 */
ab8500_gpadc_convert(struct ab8500_gpadc * gpadc,u8 input)240 int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input)
241 {
242 int ret;
243 u16 data = 0;
244 int looplimit = 0;
245 u8 val, low_data, high_data;
246
247 if (!gpadc)
248 return -ENODEV;
249
250 mutex_lock(&gpadc->ab8500_gpadc_lock);
251 /* Enable VTVout LDO this is required for GPADC */
252 regulator_enable(gpadc->regu);
253
254 /* Check if ADC is not busy, lock and proceed */
255 do {
256 ret = abx500_get_register_interruptible(gpadc->dev,
257 AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
258 if (ret < 0)
259 goto out;
260 if (!(val & GPADC_BUSY))
261 break;
262 msleep(10);
263 } while (++looplimit < 10);
264 if (looplimit >= 10 && (val & GPADC_BUSY)) {
265 dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
266 ret = -EINVAL;
267 goto out;
268 }
269
270 /* Enable GPADC */
271 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
272 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
273 if (ret < 0) {
274 dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
275 goto out;
276 }
277 /* Select the input source and set average samples to 16 */
278 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
279 AB8500_GPADC_CTRL2_REG, (input | SW_AVG_16));
280 if (ret < 0) {
281 dev_err(gpadc->dev,
282 "gpadc_conversion: set avg samples failed\n");
283 goto out;
284 }
285 /*
286 * Enable ADC, buffering, select rising edge and enable ADC path
287 * charging current sense if it needed
288 */
289 switch (input) {
290 case MAIN_CHARGER_C:
291 case USB_CHARGER_C:
292 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
293 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
294 EN_BUF | EN_ICHAR,
295 EN_BUF | EN_ICHAR);
296 break;
297 default:
298 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
299 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
300 break;
301 }
302 if (ret < 0) {
303 dev_err(gpadc->dev,
304 "gpadc_conversion: select falling edge failed\n");
305 goto out;
306 }
307 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
308 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
309 if (ret < 0) {
310 dev_err(gpadc->dev,
311 "gpadc_conversion: start s/w conversion failed\n");
312 goto out;
313 }
314 /* wait for completion of conversion */
315 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
316 dev_err(gpadc->dev,
317 "timeout: didn't receive GPADC conversion interrupt\n");
318 ret = -EINVAL;
319 goto out;
320 }
321
322 /* Read the converted RAW data */
323 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
324 AB8500_GPADC_MANDATAL_REG, &low_data);
325 if (ret < 0) {
326 dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
327 goto out;
328 }
329
330 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
331 AB8500_GPADC_MANDATAH_REG, &high_data);
332 if (ret < 0) {
333 dev_err(gpadc->dev,
334 "gpadc_conversion: read high data failed\n");
335 goto out;
336 }
337
338 data = (high_data << 8) | low_data;
339 /* Disable GPADC */
340 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
341 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
342 if (ret < 0) {
343 dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
344 goto out;
345 }
346 /* Disable VTVout LDO this is required for GPADC */
347 regulator_disable(gpadc->regu);
348 mutex_unlock(&gpadc->ab8500_gpadc_lock);
349 ret = ab8500_gpadc_ad_to_voltage(gpadc, input, data);
350 return ret;
351
352 out:
353 /*
354 * It has shown to be needed to turn off the GPADC if an error occurs,
355 * otherwise we might have problem when waiting for the busy bit in the
356 * GPADC status register to go low. In V1.1 there wait_for_completion
357 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
358 */
359 (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
360 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
361 regulator_disable(gpadc->regu);
362 mutex_unlock(&gpadc->ab8500_gpadc_lock);
363 dev_err(gpadc->dev,
364 "gpadc_conversion: Failed to AD convert channel %d\n", input);
365 return ret;
366 }
367 EXPORT_SYMBOL(ab8500_gpadc_convert);
368
369 /**
370 * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
371 * @irq: irq number
372 * @data: pointer to the data passed during request irq
373 *
374 * This is a interrupt service routine for s/w gpadc conversion completion.
375 * Notifies the gpadc completion is completed and the converted raw value
376 * can be read from the registers.
377 * Returns IRQ status(IRQ_HANDLED)
378 */
ab8500_bm_gpswadcconvend_handler(int irq,void * _gpadc)379 static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
380 {
381 struct ab8500_gpadc *gpadc = _gpadc;
382
383 complete(&gpadc->ab8500_gpadc_complete);
384
385 return IRQ_HANDLED;
386 }
387
388 static int otp_cal_regs[] = {
389 AB8500_GPADC_CAL_1,
390 AB8500_GPADC_CAL_2,
391 AB8500_GPADC_CAL_3,
392 AB8500_GPADC_CAL_4,
393 AB8500_GPADC_CAL_5,
394 AB8500_GPADC_CAL_6,
395 AB8500_GPADC_CAL_7,
396 };
397
ab8500_gpadc_read_calibration_data(struct ab8500_gpadc * gpadc)398 static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
399 {
400 int i;
401 int ret[ARRAY_SIZE(otp_cal_regs)];
402 u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
403
404 int vmain_high, vmain_low;
405 int btemp_high, btemp_low;
406 int vbat_high, vbat_low;
407
408 /* First we read all OTP registers and store the error code */
409 for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
410 ret[i] = abx500_get_register_interruptible(gpadc->dev,
411 AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
412 if (ret[i] < 0)
413 dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
414 __func__, otp_cal_regs[i]);
415 }
416
417 /*
418 * The ADC calibration data is stored in OTP registers.
419 * The layout of the calibration data is outlined below and a more
420 * detailed description can be found in UM0836
421 *
422 * vm_h/l = vmain_high/low
423 * bt_h/l = btemp_high/low
424 * vb_h/l = vbat_high/low
425 *
426 * Data bits:
427 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
428 * |.......|.......|.......|.......|.......|.......|.......|.......
429 * | | vm_h9 | vm_h8
430 * |.......|.......|.......|.......|.......|.......|.......|.......
431 * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
432 * |.......|.......|.......|.......|.......|.......|.......|.......
433 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
434 * |.......|.......|.......|.......|.......|.......|.......|.......
435 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
436 * |.......|.......|.......|.......|.......|.......|.......|.......
437 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
438 * |.......|.......|.......|.......|.......|.......|.......|.......
439 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
440 * |.......|.......|.......|.......|.......|.......|.......|.......
441 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
442 * |.......|.......|.......|.......|.......|.......|.......|.......
443 *
444 *
445 * Ideal output ADC codes corresponding to injected input voltages
446 * during manufacturing is:
447 *
448 * vmain_high: Vin = 19500mV / ADC ideal code = 997
449 * vmain_low: Vin = 315mV / ADC ideal code = 16
450 * btemp_high: Vin = 1300mV / ADC ideal code = 985
451 * btemp_low: Vin = 21mV / ADC ideal code = 16
452 * vbat_high: Vin = 4700mV / ADC ideal code = 982
453 * vbat_low: Vin = 2380mV / ADC ideal code = 33
454 */
455
456 /* Calculate gain and offset for VMAIN if all reads succeeded */
457 if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
458 vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
459 ((gpadc_cal[1] & 0x3F) << 2) |
460 ((gpadc_cal[2] & 0xC0) >> 6));
461
462 vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
463
464 gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
465 (19500 - 315) / (vmain_high - vmain_low);
466
467 gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
468 (CALIB_SCALE * (19500 - 315) /
469 (vmain_high - vmain_low)) * vmain_high;
470 } else {
471 gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
472 }
473
474 /* Calculate gain and offset for BTEMP if all reads succeeded */
475 if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
476 btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
477 (gpadc_cal[3] << 1) |
478 ((gpadc_cal[4] & 0x80) >> 7));
479
480 btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
481
482 gpadc->cal_data[ADC_INPUT_BTEMP].gain =
483 CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
484
485 gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
486 (CALIB_SCALE * (1300 - 21) /
487 (btemp_high - btemp_low)) * btemp_high;
488 } else {
489 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
490 }
491
492 /* Calculate gain and offset for VBAT if all reads succeeded */
493 if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
494 vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
495 vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
496
497 gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
498 (4700 - 2380) / (vbat_high - vbat_low);
499
500 gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
501 (CALIB_SCALE * (4700 - 2380) /
502 (vbat_high - vbat_low)) * vbat_high;
503 } else {
504 gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
505 }
506
507 dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
508 gpadc->cal_data[ADC_INPUT_VMAIN].gain,
509 gpadc->cal_data[ADC_INPUT_VMAIN].offset);
510
511 dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
512 gpadc->cal_data[ADC_INPUT_BTEMP].gain,
513 gpadc->cal_data[ADC_INPUT_BTEMP].offset);
514
515 dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
516 gpadc->cal_data[ADC_INPUT_VBAT].gain,
517 gpadc->cal_data[ADC_INPUT_VBAT].offset);
518 }
519
ab8500_gpadc_probe(struct platform_device * pdev)520 static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
521 {
522 int ret = 0;
523 struct ab8500_gpadc *gpadc;
524
525 gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
526 if (!gpadc) {
527 dev_err(&pdev->dev, "Error: No memory\n");
528 return -ENOMEM;
529 }
530
531 gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
532 if (gpadc->irq < 0) {
533 dev_err(gpadc->dev, "failed to get platform irq-%d\n",
534 gpadc->irq);
535 ret = gpadc->irq;
536 goto fail;
537 }
538
539 gpadc->dev = &pdev->dev;
540 mutex_init(&gpadc->ab8500_gpadc_lock);
541
542 /* Initialize completion used to notify completion of conversion */
543 init_completion(&gpadc->ab8500_gpadc_complete);
544
545 /* Register interrupt - SwAdcComplete */
546 ret = request_threaded_irq(gpadc->irq, NULL,
547 ab8500_bm_gpswadcconvend_handler,
548 IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc", gpadc);
549 if (ret < 0) {
550 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
551 gpadc->irq);
552 goto fail;
553 }
554
555 /* VTVout LDO used to power up ab8500-GPADC */
556 gpadc->regu = regulator_get(&pdev->dev, "vddadc");
557 if (IS_ERR(gpadc->regu)) {
558 ret = PTR_ERR(gpadc->regu);
559 dev_err(gpadc->dev, "failed to get vtvout LDO\n");
560 goto fail_irq;
561 }
562 ab8500_gpadc_read_calibration_data(gpadc);
563 list_add_tail(&gpadc->node, &ab8500_gpadc_list);
564 dev_dbg(gpadc->dev, "probe success\n");
565 return 0;
566 fail_irq:
567 free_irq(gpadc->irq, gpadc);
568 fail:
569 kfree(gpadc);
570 gpadc = NULL;
571 return ret;
572 }
573
ab8500_gpadc_remove(struct platform_device * pdev)574 static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
575 {
576 struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
577
578 /* remove this gpadc entry from the list */
579 list_del(&gpadc->node);
580 /* remove interrupt - completion of Sw ADC conversion */
581 free_irq(gpadc->irq, gpadc);
582 /* disable VTVout LDO that is being used by GPADC */
583 regulator_put(gpadc->regu);
584 kfree(gpadc);
585 gpadc = NULL;
586 return 0;
587 }
588
589 static struct platform_driver ab8500_gpadc_driver = {
590 .probe = ab8500_gpadc_probe,
591 .remove = __devexit_p(ab8500_gpadc_remove),
592 .driver = {
593 .name = "ab8500-gpadc",
594 .owner = THIS_MODULE,
595 },
596 };
597
ab8500_gpadc_init(void)598 static int __init ab8500_gpadc_init(void)
599 {
600 return platform_driver_register(&ab8500_gpadc_driver);
601 }
602
ab8500_gpadc_exit(void)603 static void __exit ab8500_gpadc_exit(void)
604 {
605 platform_driver_unregister(&ab8500_gpadc_driver);
606 }
607
608 subsys_initcall_sync(ab8500_gpadc_init);
609 module_exit(ab8500_gpadc_exit);
610
611 MODULE_LICENSE("GPL v2");
612 MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
613 MODULE_ALIAS("platform:ab8500_gpadc");
614 MODULE_DESCRIPTION("AB8500 GPADC driver");
615