1 /*
2 * Copyright 2010 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25 #include "drmP.h"
26 #include "nouveau_drv.h"
27 #include "nouveau_hw.h"
28 #include "nouveau_pm.h"
29
30 struct nv04_pm_state {
31 struct pll_lims pll;
32 struct nouveau_pll_vals calc;
33 };
34
35 int
nv04_pm_clock_get(struct drm_device * dev,u32 id)36 nv04_pm_clock_get(struct drm_device *dev, u32 id)
37 {
38 return nouveau_hw_get_clock(dev, id);
39 }
40
41 void *
nv04_pm_clock_pre(struct drm_device * dev,struct nouveau_pm_level * perflvl,u32 id,int khz)42 nv04_pm_clock_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl,
43 u32 id, int khz)
44 {
45 struct nv04_pm_state *state;
46 int ret;
47
48 state = kzalloc(sizeof(*state), GFP_KERNEL);
49 if (!state)
50 return ERR_PTR(-ENOMEM);
51
52 ret = get_pll_limits(dev, id, &state->pll);
53 if (ret) {
54 kfree(state);
55 return (ret == -ENOENT) ? NULL : ERR_PTR(ret);
56 }
57
58 ret = nouveau_calc_pll_mnp(dev, &state->pll, khz, &state->calc);
59 if (!ret) {
60 kfree(state);
61 return ERR_PTR(-EINVAL);
62 }
63
64 return state;
65 }
66
67 void
nv04_pm_clock_set(struct drm_device * dev,void * pre_state)68 nv04_pm_clock_set(struct drm_device *dev, void *pre_state)
69 {
70 struct drm_nouveau_private *dev_priv = dev->dev_private;
71 struct nv04_pm_state *state = pre_state;
72 u32 reg = state->pll.reg;
73
74 /* thank the insane nouveau_hw_setpll() interface for this */
75 if (dev_priv->card_type >= NV_40)
76 reg += 4;
77
78 nouveau_hw_setpll(dev, reg, &state->calc);
79
80 if (dev_priv->card_type < NV_30 && reg == NV_PRAMDAC_MPLL_COEFF) {
81 if (dev_priv->card_type == NV_20)
82 nv_mask(dev, 0x1002c4, 0, 1 << 20);
83
84 /* Reset the DLLs */
85 nv_mask(dev, 0x1002c0, 0, 1 << 8);
86 }
87
88 kfree(state);
89 }
90
91