1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2009 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Jesse Barnes <jesse.barnes@intel.com>
27 */
28
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/delay.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39
40 struct intel_hdmi {
41 struct intel_encoder base;
42 u32 sdvox_reg;
43 int ddc_bus;
44 uint32_t color_range;
45 bool has_hdmi_sink;
46 bool has_audio;
47 int force_audio;
48 struct drm_property *force_audio_property;
49 };
50
enc_to_intel_hdmi(struct drm_encoder * encoder)51 static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
52 {
53 return container_of(encoder, struct intel_hdmi, base.base);
54 }
55
intel_attached_hdmi(struct drm_connector * connector)56 static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
57 {
58 return container_of(intel_attached_encoder(connector),
59 struct intel_hdmi, base);
60 }
61
intel_dip_infoframe_csum(struct dip_infoframe * avi_if)62 void intel_dip_infoframe_csum(struct dip_infoframe *avi_if)
63 {
64 uint8_t *data = (uint8_t *)avi_if;
65 uint8_t sum = 0;
66 unsigned i;
67
68 avi_if->checksum = 0;
69 avi_if->ecc = 0;
70
71 for (i = 0; i < sizeof(*avi_if); i++)
72 sum += data[i];
73
74 avi_if->checksum = 0x100 - sum;
75 }
76
intel_hdmi_set_avi_infoframe(struct drm_encoder * encoder)77 static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
78 {
79 struct dip_infoframe avi_if = {
80 .type = DIP_TYPE_AVI,
81 .ver = DIP_VERSION_AVI,
82 .len = DIP_LEN_AVI,
83 };
84 uint32_t *data = (uint32_t *)&avi_if;
85 struct drm_device *dev = encoder->dev;
86 struct drm_i915_private *dev_priv = dev->dev_private;
87 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
88 u32 port;
89 unsigned i;
90
91 if (!intel_hdmi->has_hdmi_sink)
92 return;
93
94 /* XXX first guess at handling video port, is this corrent? */
95 if (intel_hdmi->sdvox_reg == SDVOB)
96 port = VIDEO_DIP_PORT_B;
97 else if (intel_hdmi->sdvox_reg == SDVOC)
98 port = VIDEO_DIP_PORT_C;
99 else
100 return;
101
102 I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
103 VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC);
104
105 intel_dip_infoframe_csum(&avi_if);
106 for (i = 0; i < sizeof(avi_if); i += 4) {
107 I915_WRITE(VIDEO_DIP_DATA, *data);
108 data++;
109 }
110
111 I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
112 VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC |
113 VIDEO_DIP_ENABLE_AVI);
114 }
115
intel_hdmi_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)116 static void intel_hdmi_mode_set(struct drm_encoder *encoder,
117 struct drm_display_mode *mode,
118 struct drm_display_mode *adjusted_mode)
119 {
120 struct drm_device *dev = encoder->dev;
121 struct drm_i915_private *dev_priv = dev->dev_private;
122 struct drm_crtc *crtc = encoder->crtc;
123 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
124 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
125 u32 sdvox;
126
127 sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
128 sdvox |= intel_hdmi->color_range;
129 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
130 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
131 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
132 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
133
134 /* Required on CPT */
135 if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
136 sdvox |= HDMI_MODE_SELECT;
137
138 if (intel_hdmi->has_audio) {
139 sdvox |= SDVO_AUDIO_ENABLE;
140 sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
141 }
142
143 if (intel_crtc->pipe == 1) {
144 if (HAS_PCH_CPT(dev))
145 sdvox |= PORT_TRANS_B_SEL_CPT;
146 else
147 sdvox |= SDVO_PIPE_B_SELECT;
148 }
149
150 I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
151 POSTING_READ(intel_hdmi->sdvox_reg);
152
153 intel_hdmi_set_avi_infoframe(encoder);
154 }
155
intel_hdmi_dpms(struct drm_encoder * encoder,int mode)156 static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
157 {
158 struct drm_device *dev = encoder->dev;
159 struct drm_i915_private *dev_priv = dev->dev_private;
160 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
161 u32 temp;
162
163 temp = I915_READ(intel_hdmi->sdvox_reg);
164
165 /* HW workaround, need to toggle enable bit off and on for 12bpc, but
166 * we do this anyway which shows more stable in testing.
167 */
168 if (HAS_PCH_SPLIT(dev)) {
169 I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
170 POSTING_READ(intel_hdmi->sdvox_reg);
171 }
172
173 if (mode != DRM_MODE_DPMS_ON) {
174 temp &= ~SDVO_ENABLE;
175 } else {
176 temp |= SDVO_ENABLE;
177 }
178
179 I915_WRITE(intel_hdmi->sdvox_reg, temp);
180 POSTING_READ(intel_hdmi->sdvox_reg);
181
182 /* HW workaround, need to write this twice for issue that may result
183 * in first write getting masked.
184 */
185 if (HAS_PCH_SPLIT(dev)) {
186 I915_WRITE(intel_hdmi->sdvox_reg, temp);
187 POSTING_READ(intel_hdmi->sdvox_reg);
188 }
189 }
190
intel_hdmi_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)191 static int intel_hdmi_mode_valid(struct drm_connector *connector,
192 struct drm_display_mode *mode)
193 {
194 if (mode->clock > 165000)
195 return MODE_CLOCK_HIGH;
196 if (mode->clock < 20000)
197 return MODE_CLOCK_HIGH;
198
199 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
200 return MODE_NO_DBLESCAN;
201
202 return MODE_OK;
203 }
204
intel_hdmi_mode_fixup(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)205 static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
206 struct drm_display_mode *mode,
207 struct drm_display_mode *adjusted_mode)
208 {
209 return true;
210 }
211
212 static enum drm_connector_status
intel_hdmi_detect(struct drm_connector * connector,bool force)213 intel_hdmi_detect(struct drm_connector *connector, bool force)
214 {
215 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
216 struct drm_i915_private *dev_priv = connector->dev->dev_private;
217 struct edid *edid;
218 enum drm_connector_status status = connector_status_disconnected;
219
220 intel_hdmi->has_hdmi_sink = false;
221 intel_hdmi->has_audio = false;
222 edid = drm_get_edid(connector,
223 &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
224
225 if (edid) {
226 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
227 status = connector_status_connected;
228 intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
229 intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
230 }
231 connector->display_info.raw_edid = NULL;
232 kfree(edid);
233 }
234
235 if (status == connector_status_connected) {
236 if (intel_hdmi->force_audio)
237 intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
238 }
239
240 return status;
241 }
242
intel_hdmi_get_modes(struct drm_connector * connector)243 static int intel_hdmi_get_modes(struct drm_connector *connector)
244 {
245 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
246 struct drm_i915_private *dev_priv = connector->dev->dev_private;
247
248 /* We should parse the EDID data and find out if it's an HDMI sink so
249 * we can send audio to it.
250 */
251
252 return intel_ddc_get_modes(connector,
253 &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
254 }
255
256 static bool
intel_hdmi_detect_audio(struct drm_connector * connector)257 intel_hdmi_detect_audio(struct drm_connector *connector)
258 {
259 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
260 struct drm_i915_private *dev_priv = connector->dev->dev_private;
261 struct edid *edid;
262 bool has_audio = false;
263
264 edid = drm_get_edid(connector,
265 &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
266 if (edid) {
267 if (edid->input & DRM_EDID_INPUT_DIGITAL)
268 has_audio = drm_detect_monitor_audio(edid);
269
270 connector->display_info.raw_edid = NULL;
271 kfree(edid);
272 }
273
274 return has_audio;
275 }
276
277 static int
intel_hdmi_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t val)278 intel_hdmi_set_property(struct drm_connector *connector,
279 struct drm_property *property,
280 uint64_t val)
281 {
282 struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
283 struct drm_i915_private *dev_priv = connector->dev->dev_private;
284 int ret;
285
286 ret = drm_connector_property_set_value(connector, property, val);
287 if (ret)
288 return ret;
289
290 if (property == intel_hdmi->force_audio_property) {
291 int i = val;
292 bool has_audio;
293
294 if (i == intel_hdmi->force_audio)
295 return 0;
296
297 intel_hdmi->force_audio = i;
298
299 if (i == 0)
300 has_audio = intel_hdmi_detect_audio(connector);
301 else
302 has_audio = i > 0;
303
304 if (has_audio == intel_hdmi->has_audio)
305 return 0;
306
307 intel_hdmi->has_audio = has_audio;
308 goto done;
309 }
310
311 if (property == dev_priv->broadcast_rgb_property) {
312 if (val == !!intel_hdmi->color_range)
313 return 0;
314
315 intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
316 goto done;
317 }
318
319 return -EINVAL;
320
321 done:
322 if (intel_hdmi->base.base.crtc) {
323 struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
324 drm_crtc_helper_set_mode(crtc, &crtc->mode,
325 crtc->x, crtc->y,
326 crtc->fb);
327 }
328
329 return 0;
330 }
331
intel_hdmi_destroy(struct drm_connector * connector)332 static void intel_hdmi_destroy(struct drm_connector *connector)
333 {
334 drm_sysfs_connector_remove(connector);
335 drm_connector_cleanup(connector);
336 kfree(connector);
337 }
338
339 static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
340 .dpms = intel_hdmi_dpms,
341 .mode_fixup = intel_hdmi_mode_fixup,
342 .prepare = intel_encoder_prepare,
343 .mode_set = intel_hdmi_mode_set,
344 .commit = intel_encoder_commit,
345 };
346
347 static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
348 .dpms = drm_helper_connector_dpms,
349 .detect = intel_hdmi_detect,
350 .fill_modes = drm_helper_probe_single_connector_modes,
351 .set_property = intel_hdmi_set_property,
352 .destroy = intel_hdmi_destroy,
353 };
354
355 static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
356 .get_modes = intel_hdmi_get_modes,
357 .mode_valid = intel_hdmi_mode_valid,
358 .best_encoder = intel_best_encoder,
359 };
360
361 static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
362 .destroy = intel_encoder_destroy,
363 };
364
365 static void
intel_hdmi_add_properties(struct intel_hdmi * intel_hdmi,struct drm_connector * connector)366 intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
367 {
368 struct drm_device *dev = connector->dev;
369
370 intel_hdmi->force_audio_property =
371 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
372 if (intel_hdmi->force_audio_property) {
373 intel_hdmi->force_audio_property->values[0] = -1;
374 intel_hdmi->force_audio_property->values[1] = 1;
375 drm_connector_attach_property(connector, intel_hdmi->force_audio_property, 0);
376 }
377
378 intel_attach_broadcast_rgb_property(connector);
379 }
380
intel_hdmi_init(struct drm_device * dev,int sdvox_reg)381 void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
382 {
383 struct drm_i915_private *dev_priv = dev->dev_private;
384 struct drm_connector *connector;
385 struct intel_encoder *intel_encoder;
386 struct intel_connector *intel_connector;
387 struct intel_hdmi *intel_hdmi;
388
389 intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
390 if (!intel_hdmi)
391 return;
392
393 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
394 if (!intel_connector) {
395 kfree(intel_hdmi);
396 return;
397 }
398
399 intel_encoder = &intel_hdmi->base;
400 drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
401 DRM_MODE_ENCODER_TMDS);
402
403 connector = &intel_connector->base;
404 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
405 DRM_MODE_CONNECTOR_HDMIA);
406 drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
407
408 intel_encoder->type = INTEL_OUTPUT_HDMI;
409
410 connector->polled = DRM_CONNECTOR_POLL_HPD;
411 connector->interlace_allowed = 0;
412 connector->doublescan_allowed = 0;
413 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
414
415 /* Set up the DDC bus. */
416 if (sdvox_reg == SDVOB) {
417 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
418 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
419 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
420 } else if (sdvox_reg == SDVOC) {
421 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
422 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
423 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
424 } else if (sdvox_reg == HDMIB) {
425 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
426 intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
427 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
428 } else if (sdvox_reg == HDMIC) {
429 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
430 intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
431 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
432 } else if (sdvox_reg == HDMID) {
433 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
434 intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
435 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
436 }
437
438 intel_hdmi->sdvox_reg = sdvox_reg;
439
440 drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
441
442 intel_hdmi_add_properties(intel_hdmi, connector);
443
444 intel_connector_attach_encoder(intel_connector, intel_encoder);
445 drm_sysfs_connector_add(connector);
446
447 /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
448 * 0xd. Failure to do so will result in spurious interrupts being
449 * generated on the port when a cable is not attached.
450 */
451 if (IS_G4X(dev) && !IS_GM45(dev)) {
452 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
453 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
454 }
455 }
456