1 /*
2 * SH7705 Setup
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 * Copyright (C) 2007 Nobuhiro Iwamatsu
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11 #include <linux/platform_device.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/serial.h>
15 #include <linux/serial_sci.h>
16 #include <linux/sh_timer.h>
17 #include <asm/rtc.h>
18
19 enum {
20 UNUSED = 0,
21
22 /* interrupt sources */
23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
24 PINT07, PINT815,
25
26 DMAC, SCIF0, SCIF2, ADC_ADI, USB,
27
28 TPU0, TPU1, TPU2, TPU3,
29 TMU0, TMU1, TMU2,
30
31 RTC, WDT, REF_RCMI,
32 };
33
34 static struct intc_vect vectors[] __initdata = {
35 /* IRQ0->5 are handled in setup-sh3.c */
36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
40 INTC_VECT(SCIF0, 0x8e0),
41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
42 INTC_VECT(SCIF2, 0x960),
43 INTC_VECT(ADC_ADI, 0x980),
44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
45 INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
46 INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
47 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
48 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
49 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
50 INTC_VECT(RTC, 0x4c0),
51 INTC_VECT(WDT, 0x560),
52 INTC_VECT(REF_RCMI, 0x580),
53 };
54
55 static struct intc_prio_reg prio_registers[] __initdata = {
56 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
57 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
58 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
59 { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ5, IRQ4 } },
60 { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } },
61 { 0xa4080000, 0, 16, 4, /* IPRF */ { 0, 0, USB } },
62 { 0xa4080002, 0, 16, 4, /* IPRG */ { TPU0, TPU1 } },
63 { 0xa4080004, 0, 16, 4, /* IPRH */ { TPU2, TPU3 } },
64
65 };
66
67 static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
68 NULL, prio_registers, NULL);
69
70 static struct plat_sci_port scif0_platform_data = {
71 .mapbase = 0xa4410000,
72 .flags = UPF_BOOT_AUTOCONF,
73 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
74 SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
75 .scbrr_algo_id = SCBRR_ALGO_4,
76 .type = PORT_SCIF,
77 .irqs = { 56, 56, 56 },
78 };
79
80 static struct platform_device scif0_device = {
81 .name = "sh-sci",
82 .id = 0,
83 .dev = {
84 .platform_data = &scif0_platform_data,
85 },
86 };
87
88 static struct plat_sci_port scif1_platform_data = {
89 .mapbase = 0xa4400000,
90 .flags = UPF_BOOT_AUTOCONF,
91 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
92 .scbrr_algo_id = SCBRR_ALGO_4,
93 .type = PORT_SCIF,
94 .irqs = { 52, 52, 52 },
95 };
96
97 static struct platform_device scif1_device = {
98 .name = "sh-sci",
99 .id = 1,
100 .dev = {
101 .platform_data = &scif1_platform_data,
102 },
103 };
104
105 static struct resource rtc_resources[] = {
106 [0] = {
107 .start = 0xfffffec0,
108 .end = 0xfffffec0 + 0x1e,
109 .flags = IORESOURCE_IO,
110 },
111 [1] = {
112 .start = 20,
113 .flags = IORESOURCE_IRQ,
114 },
115 };
116
117 static struct sh_rtc_platform_info rtc_info = {
118 .capabilities = RTC_CAP_4_DIGIT_YEAR,
119 };
120
121 static struct platform_device rtc_device = {
122 .name = "sh-rtc",
123 .id = -1,
124 .num_resources = ARRAY_SIZE(rtc_resources),
125 .resource = rtc_resources,
126 .dev = {
127 .platform_data = &rtc_info,
128 },
129 };
130
131 static struct sh_timer_config tmu0_platform_data = {
132 .channel_offset = 0x02,
133 .timer_bit = 0,
134 .clockevent_rating = 200,
135 };
136
137 static struct resource tmu0_resources[] = {
138 [0] = {
139 .start = 0xfffffe94,
140 .end = 0xfffffe9f,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
144 .start = 16,
145 .flags = IORESOURCE_IRQ,
146 },
147 };
148
149 static struct platform_device tmu0_device = {
150 .name = "sh_tmu",
151 .id = 0,
152 .dev = {
153 .platform_data = &tmu0_platform_data,
154 },
155 .resource = tmu0_resources,
156 .num_resources = ARRAY_SIZE(tmu0_resources),
157 };
158
159 static struct sh_timer_config tmu1_platform_data = {
160 .channel_offset = 0xe,
161 .timer_bit = 1,
162 .clocksource_rating = 200,
163 };
164
165 static struct resource tmu1_resources[] = {
166 [0] = {
167 .start = 0xfffffea0,
168 .end = 0xfffffeab,
169 .flags = IORESOURCE_MEM,
170 },
171 [1] = {
172 .start = 17,
173 .flags = IORESOURCE_IRQ,
174 },
175 };
176
177 static struct platform_device tmu1_device = {
178 .name = "sh_tmu",
179 .id = 1,
180 .dev = {
181 .platform_data = &tmu1_platform_data,
182 },
183 .resource = tmu1_resources,
184 .num_resources = ARRAY_SIZE(tmu1_resources),
185 };
186
187 static struct sh_timer_config tmu2_platform_data = {
188 .channel_offset = 0x1a,
189 .timer_bit = 2,
190 };
191
192 static struct resource tmu2_resources[] = {
193 [0] = {
194 .start = 0xfffffeac,
195 .end = 0xfffffebb,
196 .flags = IORESOURCE_MEM,
197 },
198 [1] = {
199 .start = 18,
200 .flags = IORESOURCE_IRQ,
201 },
202 };
203
204 static struct platform_device tmu2_device = {
205 .name = "sh_tmu",
206 .id = 2,
207 .dev = {
208 .platform_data = &tmu2_platform_data,
209 },
210 .resource = tmu2_resources,
211 .num_resources = ARRAY_SIZE(tmu2_resources),
212 };
213
214 static struct platform_device *sh7705_devices[] __initdata = {
215 &scif0_device,
216 &scif1_device,
217 &tmu0_device,
218 &tmu1_device,
219 &tmu2_device,
220 &rtc_device,
221 };
222
sh7705_devices_setup(void)223 static int __init sh7705_devices_setup(void)
224 {
225 return platform_add_devices(sh7705_devices,
226 ARRAY_SIZE(sh7705_devices));
227 }
228 arch_initcall(sh7705_devices_setup);
229
230 static struct platform_device *sh7705_early_devices[] __initdata = {
231 &scif0_device,
232 &scif1_device,
233 &tmu0_device,
234 &tmu1_device,
235 &tmu2_device,
236 };
237
plat_early_device_setup(void)238 void __init plat_early_device_setup(void)
239 {
240 early_platform_add_devices(sh7705_early_devices,
241 ARRAY_SIZE(sh7705_early_devices));
242 }
243
plat_irq_setup(void)244 void __init plat_irq_setup(void)
245 {
246 register_intc_controller(&intc_desc);
247 plat_irq_setup_sh3();
248 }
249