1 /*
2 * This module supports the iSeries PCI bus interrupt handling
3 * Copyright (C) 20yy <Robert L Holtorf> <IBM Corp>
4 * Copyright (C) 2004-2005 IBM Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the:
18 * Free Software Foundation, Inc.,
19 * 59 Temple Place, Suite 330,
20 * Boston, MA 02111-1307 USA
21 *
22 * Change Activity:
23 * Created, December 13, 2000 by Wayne Holm
24 * End Change Activity
25 */
26 #include <linux/pci.h>
27 #include <linux/init.h>
28 #include <linux/threads.h>
29 #include <linux/smp.h>
30 #include <linux/param.h>
31 #include <linux/string.h>
32 #include <linux/bootmem.h>
33 #include <linux/irq.h>
34 #include <linux/spinlock.h>
35
36 #include <asm/paca.h>
37 #include <asm/iseries/hv_types.h>
38 #include <asm/iseries/hv_lp_event.h>
39 #include <asm/iseries/hv_call_xm.h>
40 #include <asm/iseries/it_lp_queue.h>
41
42 #include "irq.h"
43 #include "pci.h"
44 #include "call_pci.h"
45 #include "smp.h"
46
47 #ifdef CONFIG_PCI
48
49 enum pci_event_type {
50 pe_bus_created = 0, /* PHB has been created */
51 pe_bus_error = 1, /* PHB has failed */
52 pe_bus_failed = 2, /* Msg to Secondary, Primary failed bus */
53 pe_node_failed = 4, /* Multi-adapter bridge has failed */
54 pe_node_recovered = 5, /* Multi-adapter bridge has recovered */
55 pe_bus_recovered = 12, /* PHB has been recovered */
56 pe_unquiese_bus = 18, /* Secondary bus unqiescing */
57 pe_bridge_error = 21, /* Bridge Error */
58 pe_slot_interrupt = 22 /* Slot interrupt */
59 };
60
61 struct pci_event {
62 struct HvLpEvent event;
63 union {
64 u64 __align; /* Align on an 8-byte boundary */
65 struct {
66 u32 fisr;
67 HvBusNumber bus_number;
68 HvSubBusNumber sub_bus_number;
69 HvAgentId dev_id;
70 } slot;
71 struct {
72 HvBusNumber bus_number;
73 HvSubBusNumber sub_bus_number;
74 } bus;
75 struct {
76 HvBusNumber bus_number;
77 HvSubBusNumber sub_bus_number;
78 HvAgentId dev_id;
79 } node;
80 } data;
81 };
82
83 static DEFINE_SPINLOCK(pending_irqs_lock);
84 static int num_pending_irqs;
85 static int pending_irqs[NR_IRQS];
86
int_received(struct pci_event * event)87 static void int_received(struct pci_event *event)
88 {
89 int irq;
90
91 switch (event->event.xSubtype) {
92 case pe_slot_interrupt:
93 irq = event->event.xCorrelationToken;
94 if (irq < NR_IRQS) {
95 spin_lock(&pending_irqs_lock);
96 pending_irqs[irq]++;
97 num_pending_irqs++;
98 spin_unlock(&pending_irqs_lock);
99 } else {
100 printk(KERN_WARNING "int_received: bad irq number %d\n",
101 irq);
102 HvCallPci_eoi(event->data.slot.bus_number,
103 event->data.slot.sub_bus_number,
104 event->data.slot.dev_id);
105 }
106 break;
107 /* Ignore error recovery events for now */
108 case pe_bus_created:
109 printk(KERN_INFO "int_received: system bus %d created\n",
110 event->data.bus.bus_number);
111 break;
112 case pe_bus_error:
113 case pe_bus_failed:
114 printk(KERN_INFO "int_received: system bus %d failed\n",
115 event->data.bus.bus_number);
116 break;
117 case pe_bus_recovered:
118 case pe_unquiese_bus:
119 printk(KERN_INFO "int_received: system bus %d recovered\n",
120 event->data.bus.bus_number);
121 break;
122 case pe_node_failed:
123 case pe_bridge_error:
124 printk(KERN_INFO
125 "int_received: multi-adapter bridge %d/%d/%d failed\n",
126 event->data.node.bus_number,
127 event->data.node.sub_bus_number,
128 event->data.node.dev_id);
129 break;
130 case pe_node_recovered:
131 printk(KERN_INFO
132 "int_received: multi-adapter bridge %d/%d/%d recovered\n",
133 event->data.node.bus_number,
134 event->data.node.sub_bus_number,
135 event->data.node.dev_id);
136 break;
137 default:
138 printk(KERN_ERR
139 "int_received: unrecognized event subtype 0x%x\n",
140 event->event.xSubtype);
141 break;
142 }
143 }
144
pci_event_handler(struct HvLpEvent * event)145 static void pci_event_handler(struct HvLpEvent *event)
146 {
147 if (event && (event->xType == HvLpEvent_Type_PciIo)) {
148 if (hvlpevent_is_int(event))
149 int_received((struct pci_event *)event);
150 else
151 printk(KERN_ERR
152 "pci_event_handler: unexpected ack received\n");
153 } else if (event)
154 printk(KERN_ERR
155 "pci_event_handler: Unrecognized PCI event type 0x%x\n",
156 (int)event->xType);
157 else
158 printk(KERN_ERR "pci_event_handler: NULL event received\n");
159 }
160
161 #define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff)
162 #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
163 #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
164 #define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
165
166 /*
167 * This will be called by device drivers (via enable_IRQ)
168 * to enable INTA in the bridge interrupt status register.
169 */
iseries_enable_IRQ(struct irq_data * d)170 static void iseries_enable_IRQ(struct irq_data *d)
171 {
172 u32 bus, dev_id, function, mask;
173 const u32 sub_bus = 0;
174 unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
175
176 /* The IRQ has already been locked by the caller */
177 bus = REAL_IRQ_TO_BUS(rirq);
178 function = REAL_IRQ_TO_FUNC(rirq);
179 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
180
181 /* Unmask secondary INTA */
182 mask = 0x80000000;
183 HvCallPci_unmaskInterrupts(bus, sub_bus, dev_id, mask);
184 }
185
186 /* This is called by iseries_activate_IRQs */
iseries_startup_IRQ(struct irq_data * d)187 static unsigned int iseries_startup_IRQ(struct irq_data *d)
188 {
189 u32 bus, dev_id, function, mask;
190 const u32 sub_bus = 0;
191 unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
192
193 bus = REAL_IRQ_TO_BUS(rirq);
194 function = REAL_IRQ_TO_FUNC(rirq);
195 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
196
197 /* Link the IRQ number to the bridge */
198 HvCallXm_connectBusUnit(bus, sub_bus, dev_id, d->irq);
199
200 /* Unmask bridge interrupts in the FISR */
201 mask = 0x01010000 << function;
202 HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask);
203 iseries_enable_IRQ(d);
204 return 0;
205 }
206
207 /*
208 * This is called out of iSeries_fixup to activate interrupt
209 * generation for usable slots
210 */
iSeries_activate_IRQs()211 void __init iSeries_activate_IRQs()
212 {
213 int irq;
214 unsigned long flags;
215
216 for_each_irq (irq) {
217 struct irq_desc *desc = irq_to_desc(irq);
218 struct irq_chip *chip;
219
220 if (!desc)
221 continue;
222
223 chip = irq_desc_get_chip(desc);
224 if (chip && chip->irq_startup) {
225 raw_spin_lock_irqsave(&desc->lock, flags);
226 chip->irq_startup(&desc->irq_data);
227 raw_spin_unlock_irqrestore(&desc->lock, flags);
228 }
229 }
230 }
231
232 /* this is not called anywhere currently */
iseries_shutdown_IRQ(struct irq_data * d)233 static void iseries_shutdown_IRQ(struct irq_data *d)
234 {
235 u32 bus, dev_id, function, mask;
236 const u32 sub_bus = 0;
237 unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
238
239 /* irq should be locked by the caller */
240 bus = REAL_IRQ_TO_BUS(rirq);
241 function = REAL_IRQ_TO_FUNC(rirq);
242 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
243
244 /* Invalidate the IRQ number in the bridge */
245 HvCallXm_connectBusUnit(bus, sub_bus, dev_id, 0);
246
247 /* Mask bridge interrupts in the FISR */
248 mask = 0x01010000 << function;
249 HvCallPci_maskFisr(bus, sub_bus, dev_id, mask);
250 }
251
252 /*
253 * This will be called by device drivers (via disable_IRQ)
254 * to disable INTA in the bridge interrupt status register.
255 */
iseries_disable_IRQ(struct irq_data * d)256 static void iseries_disable_IRQ(struct irq_data *d)
257 {
258 u32 bus, dev_id, function, mask;
259 const u32 sub_bus = 0;
260 unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
261
262 /* The IRQ has already been locked by the caller */
263 bus = REAL_IRQ_TO_BUS(rirq);
264 function = REAL_IRQ_TO_FUNC(rirq);
265 dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
266
267 /* Mask secondary INTA */
268 mask = 0x80000000;
269 HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask);
270 }
271
iseries_end_IRQ(struct irq_data * d)272 static void iseries_end_IRQ(struct irq_data *d)
273 {
274 unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq;
275
276 HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
277 (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq));
278 }
279
280 static struct irq_chip iseries_pic = {
281 .name = "iSeries",
282 .irq_startup = iseries_startup_IRQ,
283 .irq_shutdown = iseries_shutdown_IRQ,
284 .irq_unmask = iseries_enable_IRQ,
285 .irq_mask = iseries_disable_IRQ,
286 .irq_eoi = iseries_end_IRQ
287 };
288
289 /*
290 * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
291 * It calculates the irq value for the slot.
292 * Note that sub_bus is always 0 (at the moment at least).
293 */
iSeries_allocate_IRQ(HvBusNumber bus,HvSubBusNumber sub_bus,u32 bsubbus)294 int __init iSeries_allocate_IRQ(HvBusNumber bus,
295 HvSubBusNumber sub_bus, u32 bsubbus)
296 {
297 unsigned int realirq;
298 u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus);
299 u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus);
300
301 realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3)
302 + function;
303
304 return irq_create_mapping(NULL, realirq);
305 }
306
307 #endif /* CONFIG_PCI */
308
309 /*
310 * Get the next pending IRQ.
311 */
iSeries_get_irq(void)312 unsigned int iSeries_get_irq(void)
313 {
314 int irq = NO_IRQ_IGNORE;
315
316 #ifdef CONFIG_SMP
317 if (get_lppaca()->int_dword.fields.ipi_cnt) {
318 get_lppaca()->int_dword.fields.ipi_cnt = 0;
319 iSeries_smp_message_recv();
320 }
321 #endif /* CONFIG_SMP */
322 if (hvlpevent_is_pending())
323 process_hvlpevents();
324
325 #ifdef CONFIG_PCI
326 if (num_pending_irqs) {
327 spin_lock(&pending_irqs_lock);
328 for (irq = 0; irq < NR_IRQS; irq++) {
329 if (pending_irqs[irq]) {
330 pending_irqs[irq]--;
331 num_pending_irqs--;
332 break;
333 }
334 }
335 spin_unlock(&pending_irqs_lock);
336 if (irq >= NR_IRQS)
337 irq = NO_IRQ_IGNORE;
338 }
339 #endif
340
341 return irq;
342 }
343
344 #ifdef CONFIG_PCI
345
iseries_irq_host_map(struct irq_host * h,unsigned int virq,irq_hw_number_t hw)346 static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
347 irq_hw_number_t hw)
348 {
349 irq_set_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
350
351 return 0;
352 }
353
iseries_irq_host_match(struct irq_host * h,struct device_node * np)354 static int iseries_irq_host_match(struct irq_host *h, struct device_node *np)
355 {
356 /* Match all */
357 return 1;
358 }
359
360 static struct irq_host_ops iseries_irq_host_ops = {
361 .map = iseries_irq_host_map,
362 .match = iseries_irq_host_match,
363 };
364
365 /*
366 * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
367 * It must be called before the bus walk.
368 */
iSeries_init_IRQ(void)369 void __init iSeries_init_IRQ(void)
370 {
371 /* Register PCI event handler and open an event path */
372 struct irq_host *host;
373 int ret;
374
375 /*
376 * The Hypervisor only allows us up to 256 interrupt
377 * sources (the irq number is passed in a u8).
378 */
379 irq_set_virq_count(256);
380
381 /* Create irq host. No need for a revmap since HV will give us
382 * back our virtual irq number
383 */
384 host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
385 &iseries_irq_host_ops, 0);
386 BUG_ON(host == NULL);
387 irq_set_default_host(host);
388
389 ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
390 &pci_event_handler);
391 if (ret == 0) {
392 ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
393 if (ret != 0)
394 printk(KERN_ERR "iseries_init_IRQ: open event path "
395 "failed with rc 0x%x\n", ret);
396 } else
397 printk(KERN_ERR "iseries_init_IRQ: register handler "
398 "failed with rc 0x%x\n", ret);
399 }
400
401 #endif /* CONFIG_PCI */
402