1 /*
2 * Common time prototypes and such for all ppc machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
5 * Paul Mackerras' version and mine for PReP and Pmac.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #ifndef __POWERPC_TIME_H
14 #define __POWERPC_TIME_H
15
16 #ifdef __KERNEL__
17 #include <linux/types.h>
18 #include <linux/percpu.h>
19
20 #include <asm/processor.h>
21 #ifdef CONFIG_PPC_ISERIES
22 #include <asm/paca.h>
23 #include <asm/firmware.h>
24 #include <asm/iseries/hv_call.h>
25 #endif
26
27 /* time.c */
28 extern unsigned long tb_ticks_per_jiffy;
29 extern unsigned long tb_ticks_per_usec;
30 extern unsigned long tb_ticks_per_sec;
31
32 struct rtc_time;
33 extern void to_tm(int tim, struct rtc_time * tm);
34 extern void GregorianDay(struct rtc_time *tm);
35
36 extern void generic_calibrate_decr(void);
37
38 extern void set_dec_cpu6(unsigned int val);
39
40 /* Some sane defaults: 125 MHz timebase, 1GHz processor */
41 extern unsigned long ppc_proc_freq;
42 #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8)
43 extern unsigned long ppc_tb_freq;
44 #define DEFAULT_TB_FREQ 125000000UL
45
46 struct div_result {
47 u64 result_high;
48 u64 result_low;
49 };
50
51 /* Accessor functions for the timebase (RTC on 601) registers. */
52 /* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
53 #ifdef CONFIG_6xx
54 #define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB))
55 #else
56 #define __USE_RTC() 0
57 #endif
58
59 #ifdef CONFIG_PPC64
60
61 /* For compatibility, get_tbl() is defined as get_tb() on ppc64 */
62 #define get_tbl get_tb
63
64 #else
65
get_tbl(void)66 static inline unsigned long get_tbl(void)
67 {
68 #if defined(CONFIG_403GCX)
69 unsigned long tbl;
70 asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
71 return tbl;
72 #else
73 return mftbl();
74 #endif
75 }
76
get_tbu(void)77 static inline unsigned int get_tbu(void)
78 {
79 #ifdef CONFIG_403GCX
80 unsigned int tbu;
81 asm volatile("mfspr %0, 0x3dc" : "=r" (tbu));
82 return tbu;
83 #else
84 return mftbu();
85 #endif
86 }
87 #endif /* !CONFIG_PPC64 */
88
get_rtcl(void)89 static inline unsigned int get_rtcl(void)
90 {
91 unsigned int rtcl;
92
93 asm volatile("mfrtcl %0" : "=r" (rtcl));
94 return rtcl;
95 }
96
get_rtc(void)97 static inline u64 get_rtc(void)
98 {
99 unsigned int hi, lo, hi2;
100
101 do {
102 asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2"
103 : "=r" (hi), "=r" (lo), "=r" (hi2));
104 } while (hi2 != hi);
105 return (u64)hi * 1000000000 + lo;
106 }
107
108 #ifdef CONFIG_PPC64
get_tb(void)109 static inline u64 get_tb(void)
110 {
111 return mftb();
112 }
113 #else /* CONFIG_PPC64 */
get_tb(void)114 static inline u64 get_tb(void)
115 {
116 unsigned int tbhi, tblo, tbhi2;
117
118 do {
119 tbhi = get_tbu();
120 tblo = get_tbl();
121 tbhi2 = get_tbu();
122 } while (tbhi != tbhi2);
123
124 return ((u64)tbhi << 32) | tblo;
125 }
126 #endif /* !CONFIG_PPC64 */
127
get_tb_or_rtc(void)128 static inline u64 get_tb_or_rtc(void)
129 {
130 return __USE_RTC() ? get_rtc() : get_tb();
131 }
132
set_tb(unsigned int upper,unsigned int lower)133 static inline void set_tb(unsigned int upper, unsigned int lower)
134 {
135 mtspr(SPRN_TBWL, 0);
136 mtspr(SPRN_TBWU, upper);
137 mtspr(SPRN_TBWL, lower);
138 }
139
140 /* Accessor functions for the decrementer register.
141 * The 4xx doesn't even have a decrementer. I tried to use the
142 * generic timer interrupt code, which seems OK, with the 4xx PIT
143 * in auto-reload mode. The problem is PIT stops counting when it
144 * hits zero. If it would wrap, we could use it just like a decrementer.
145 */
get_dec(void)146 static inline unsigned int get_dec(void)
147 {
148 #if defined(CONFIG_40x)
149 return (mfspr(SPRN_PIT));
150 #else
151 return (mfspr(SPRN_DEC));
152 #endif
153 }
154
155 /*
156 * Note: Book E and 4xx processors differ from other PowerPC processors
157 * in when the decrementer generates its interrupt: on the 1 to 0
158 * transition for Book E/4xx, but on the 0 to -1 transition for others.
159 */
set_dec(int val)160 static inline void set_dec(int val)
161 {
162 #if defined(CONFIG_40x)
163 mtspr(SPRN_PIT, val);
164 #elif defined(CONFIG_8xx_CPU6)
165 set_dec_cpu6(val - 1);
166 #else
167 #ifndef CONFIG_BOOKE
168 --val;
169 #endif
170 #ifdef CONFIG_PPC_ISERIES
171 if (firmware_has_feature(FW_FEATURE_ISERIES) &&
172 get_lppaca()->shared_proc) {
173 get_lppaca()->virtual_decr = val;
174 if (get_dec() > val)
175 HvCall_setVirtualDecr();
176 return;
177 }
178 #endif
179 mtspr(SPRN_DEC, val);
180 #endif /* not 40x or 8xx_CPU6 */
181 }
182
tb_ticks_since(unsigned long tstamp)183 static inline unsigned long tb_ticks_since(unsigned long tstamp)
184 {
185 if (__USE_RTC()) {
186 int delta = get_rtcl() - (unsigned int) tstamp;
187 return delta < 0 ? delta + 1000000000 : delta;
188 }
189 return get_tbl() - tstamp;
190 }
191
192 #define mulhwu(x,y) \
193 ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
194
195 #ifdef CONFIG_PPC64
196 #define mulhdu(x,y) \
197 ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
198 #else
199 extern u64 mulhdu(u64, u64);
200 #endif
201
202 extern void div128_by_32(u64 dividend_high, u64 dividend_low,
203 unsigned divisor, struct div_result *dr);
204
205 /* Used to store Processor Utilization register (purr) values */
206
207 struct cpu_usage {
208 u64 current_tb; /* Holds the current purr register values */
209 };
210
211 DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
212
213 #if defined(CONFIG_VIRT_CPU_ACCOUNTING)
214 #define account_process_vtime(tsk) account_process_tick(tsk, 0)
215 #else
216 #define account_process_vtime(tsk) do { } while (0)
217 #endif
218
219 extern void secondary_cpu_time_init(void);
220 extern void iSeries_time_init_early(void);
221
222 #endif /* __KERNEL__ */
223 #endif /* __POWERPC_TIME_H */
224