1 /*
2  *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3  *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4  *  Copyright (C) 2006 Michael Buesch <mb@bu3sch.de>
5  *  Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6  *
7  *  This program is free software; you can redistribute  it and/or modify it
8  *  under  the terms of  the GNU General  Public License as published by the
9  *  Free Software Foundation;  either version 2 of the  License, or (at your
10  *  option) any later version.
11  *
12  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
13  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
14  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
15  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
16  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
18  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
20  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22  *
23  *  You should have received a copy of the  GNU General Public License along
24  *  with this program; if not, write  to the Free Software Foundation, Inc.,
25  *  675 Mass Ave, Cambridge, MA 02139, USA.
26  */
27 
28 #include <linux/types.h>
29 #include <linux/ssb/ssb.h>
30 #include <linux/ssb/ssb_embedded.h>
31 #include <asm/bootinfo.h>
32 #include <asm/reboot.h>
33 #include <asm/time.h>
34 #include <bcm47xx.h>
35 #include <asm/mach-bcm47xx/nvram.h>
36 
37 struct ssb_bus ssb_bcm47xx;
38 EXPORT_SYMBOL(ssb_bcm47xx);
39 
bcm47xx_machine_restart(char * command)40 static void bcm47xx_machine_restart(char *command)
41 {
42 	printk(KERN_ALERT "Please stand by while rebooting the system...\n");
43 	local_irq_disable();
44 	/* Set the watchdog timer to reset immediately */
45 	ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
46 	while (1)
47 		cpu_relax();
48 }
49 
bcm47xx_machine_halt(void)50 static void bcm47xx_machine_halt(void)
51 {
52 	/* Disable interrupts and watchdog and spin forever */
53 	local_irq_disable();
54 	ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
55 	while (1)
56 		cpu_relax();
57 }
58 
59 #define READ_FROM_NVRAM(_outvar, name, buf) \
60 	if (nvram_getenv(name, buf, sizeof(buf)) >= 0)\
61 		sprom->_outvar = simple_strtoul(buf, NULL, 0);
62 
bcm47xx_fill_sprom(struct ssb_sprom * sprom)63 static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
64 {
65 	char buf[100];
66 	u32 boardflags;
67 
68 	memset(sprom, 0, sizeof(struct ssb_sprom));
69 
70 	sprom->revision = 1; /* Fallback: Old hardware does not define this. */
71 	READ_FROM_NVRAM(revision, "sromrev", buf);
72 	if (nvram_getenv("il0macaddr", buf, sizeof(buf)) >= 0)
73 		nvram_parse_macaddr(buf, sprom->il0mac);
74 	if (nvram_getenv("et0macaddr", buf, sizeof(buf)) >= 0)
75 		nvram_parse_macaddr(buf, sprom->et0mac);
76 	if (nvram_getenv("et1macaddr", buf, sizeof(buf)) >= 0)
77 		nvram_parse_macaddr(buf, sprom->et1mac);
78 	READ_FROM_NVRAM(et0phyaddr, "et0phyaddr", buf);
79 	READ_FROM_NVRAM(et1phyaddr, "et1phyaddr", buf);
80 	READ_FROM_NVRAM(et0mdcport, "et0mdcport", buf);
81 	READ_FROM_NVRAM(et1mdcport, "et1mdcport", buf);
82 	READ_FROM_NVRAM(board_rev, "boardrev", buf);
83 	READ_FROM_NVRAM(country_code, "ccode", buf);
84 	READ_FROM_NVRAM(ant_available_a, "aa5g", buf);
85 	READ_FROM_NVRAM(ant_available_bg, "aa2g", buf);
86 	READ_FROM_NVRAM(pa0b0, "pa0b0", buf);
87 	READ_FROM_NVRAM(pa0b1, "pa0b1", buf);
88 	READ_FROM_NVRAM(pa0b2, "pa0b2", buf);
89 	READ_FROM_NVRAM(pa1b0, "pa1b0", buf);
90 	READ_FROM_NVRAM(pa1b1, "pa1b1", buf);
91 	READ_FROM_NVRAM(pa1b2, "pa1b2", buf);
92 	READ_FROM_NVRAM(pa1lob0, "pa1lob0", buf);
93 	READ_FROM_NVRAM(pa1lob2, "pa1lob1", buf);
94 	READ_FROM_NVRAM(pa1lob1, "pa1lob2", buf);
95 	READ_FROM_NVRAM(pa1hib0, "pa1hib0", buf);
96 	READ_FROM_NVRAM(pa1hib2, "pa1hib1", buf);
97 	READ_FROM_NVRAM(pa1hib1, "pa1hib2", buf);
98 	READ_FROM_NVRAM(gpio0, "wl0gpio0", buf);
99 	READ_FROM_NVRAM(gpio1, "wl0gpio1", buf);
100 	READ_FROM_NVRAM(gpio2, "wl0gpio2", buf);
101 	READ_FROM_NVRAM(gpio3, "wl0gpio3", buf);
102 	READ_FROM_NVRAM(maxpwr_bg, "pa0maxpwr", buf);
103 	READ_FROM_NVRAM(maxpwr_al, "pa1lomaxpwr", buf);
104 	READ_FROM_NVRAM(maxpwr_a, "pa1maxpwr", buf);
105 	READ_FROM_NVRAM(maxpwr_ah, "pa1himaxpwr", buf);
106 	READ_FROM_NVRAM(itssi_a, "pa1itssit", buf);
107 	READ_FROM_NVRAM(itssi_bg, "pa0itssit", buf);
108 	READ_FROM_NVRAM(tri2g, "tri2g", buf);
109 	READ_FROM_NVRAM(tri5gl, "tri5gl", buf);
110 	READ_FROM_NVRAM(tri5g, "tri5g", buf);
111 	READ_FROM_NVRAM(tri5gh, "tri5gh", buf);
112 	READ_FROM_NVRAM(rxpo2g, "rxpo2g", buf);
113 	READ_FROM_NVRAM(rxpo5g, "rxpo5g", buf);
114 	READ_FROM_NVRAM(rssisav2g, "rssisav2g", buf);
115 	READ_FROM_NVRAM(rssismc2g, "rssismc2g", buf);
116 	READ_FROM_NVRAM(rssismf2g, "rssismf2g", buf);
117 	READ_FROM_NVRAM(bxa2g, "bxa2g", buf);
118 	READ_FROM_NVRAM(rssisav5g, "rssisav5g", buf);
119 	READ_FROM_NVRAM(rssismc5g, "rssismc5g", buf);
120 	READ_FROM_NVRAM(rssismf5g, "rssismf5g", buf);
121 	READ_FROM_NVRAM(bxa5g, "bxa5g", buf);
122 	READ_FROM_NVRAM(cck2gpo, "cck2gpo", buf);
123 	READ_FROM_NVRAM(ofdm2gpo, "ofdm2gpo", buf);
124 	READ_FROM_NVRAM(ofdm5glpo, "ofdm5glpo", buf);
125 	READ_FROM_NVRAM(ofdm5gpo, "ofdm5gpo", buf);
126 	READ_FROM_NVRAM(ofdm5ghpo, "ofdm5ghpo", buf);
127 
128 	if (nvram_getenv("boardflags", buf, sizeof(buf)) >= 0) {
129 		boardflags = simple_strtoul(buf, NULL, 0);
130 		if (boardflags) {
131 			sprom->boardflags_lo = (boardflags & 0x0000FFFFU);
132 			sprom->boardflags_hi = (boardflags & 0xFFFF0000U) >> 16;
133 		}
134 	}
135 	if (nvram_getenv("boardflags2", buf, sizeof(buf)) >= 0) {
136 		boardflags = simple_strtoul(buf, NULL, 0);
137 		if (boardflags) {
138 			sprom->boardflags2_lo = (boardflags & 0x0000FFFFU);
139 			sprom->boardflags2_hi = (boardflags & 0xFFFF0000U) >> 16;
140 		}
141 	}
142 }
143 
bcm47xx_get_invariants(struct ssb_bus * bus,struct ssb_init_invariants * iv)144 static int bcm47xx_get_invariants(struct ssb_bus *bus,
145 				   struct ssb_init_invariants *iv)
146 {
147 	char buf[20];
148 
149 	/* Fill boardinfo structure */
150 	memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo));
151 
152 	if (nvram_getenv("boardvendor", buf, sizeof(buf)) >= 0)
153 		iv->boardinfo.vendor = (u16)simple_strtoul(buf, NULL, 0);
154 	else
155 		iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM;
156 	if (nvram_getenv("boardtype", buf, sizeof(buf)) >= 0)
157 		iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0);
158 	if (nvram_getenv("boardrev", buf, sizeof(buf)) >= 0)
159 		iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0);
160 
161 	bcm47xx_fill_sprom(&iv->sprom);
162 
163 	if (nvram_getenv("cardbus", buf, sizeof(buf)) >= 0)
164 		iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10);
165 
166 	return 0;
167 }
168 
plat_mem_setup(void)169 void __init plat_mem_setup(void)
170 {
171 	int err;
172 	char buf[100];
173 	struct ssb_mipscore *mcore;
174 
175 	err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
176 				      bcm47xx_get_invariants);
177 	if (err)
178 		panic("Failed to initialize SSB bus (err %d)\n", err);
179 
180 	mcore = &ssb_bcm47xx.mipscore;
181 	if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
182 		if (strstr(buf, "console=ttyS1")) {
183 			struct ssb_serial_port port;
184 
185 			printk(KERN_DEBUG "Swapping serial ports!\n");
186 			/* swap serial ports */
187 			memcpy(&port, &mcore->serial_ports[0], sizeof(port));
188 			memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
189 			       sizeof(port));
190 			memcpy(&mcore->serial_ports[1], &port, sizeof(port));
191 		}
192 	}
193 
194 	_machine_restart = bcm47xx_machine_restart;
195 	_machine_halt = bcm47xx_machine_halt;
196 	pm_power_off = bcm47xx_machine_halt;
197 }
198