1 /*!***************************************************************************
2 *!
3 *! FILE NAME : ds1302.c
4 *!
5 *! DESCRIPTION: Implements an interface for the DS1302 RTC through Etrax I/O
6 *!
7 *! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init
8 *!
9 *! ---------------------------------------------------------------------------
10 *!
11 *! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
12 *!
13 *!***************************************************************************/
14
15
16 #include <linux/fs.h>
17 #include <linux/init.h>
18 #include <linux/mm.h>
19 #include <linux/module.h>
20 #include <linux/miscdevice.h>
21 #include <linux/delay.h>
22 #include <linux/mutex.h>
23 #include <linux/bcd.h>
24 #include <linux/capability.h>
25
26 #include <asm/uaccess.h>
27 #include <asm/system.h>
28 #include <arch/svinto.h>
29 #include <asm/io.h>
30 #include <asm/rtc.h>
31 #include <arch/io_interface_mux.h>
32
33 #include "i2c.h"
34
35 #define RTC_MAJOR_NR 121 /* local major, change later */
36
37 static DEFINE_MUTEX(ds1302_mutex);
38 static const char ds1302_name[] = "ds1302";
39
40 /* The DS1302 might be connected to different bits on different products.
41 * It has three signals - SDA, SCL and RST. RST and SCL are always outputs,
42 * but SDA can have a selected direction.
43 * For now, only PORT_PB is hardcoded.
44 */
45
46 /* The RST bit may be on either the Generic Port or Port PB. */
47 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
48 #define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
49 #define TK_RST_DIR(x)
50 #else
51 #define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
52 #define TK_RST_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
53 #endif
54
55
56 #define TK_SDA_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
57 #define TK_SCL_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
58
59 #define TK_SDA_IN() ((*R_PORT_PB_READ >> CONFIG_ETRAX_DS1302_SDABIT) & 1)
60 /* 1 is out, 0 is in */
61 #define TK_SDA_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
62 #define TK_SCL_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
63
64
65 /*
66 * The reason for tempudelay and not udelay is that loops_per_usec
67 * (used in udelay) is not set when functions here are called from time.c
68 */
69
tempudelay(int usecs)70 static void tempudelay(int usecs)
71 {
72 volatile int loops;
73
74 for(loops = usecs * 12; loops > 0; loops--)
75 /* nothing */;
76 }
77
78
79 /* Send 8 bits. */
80 static void
out_byte(unsigned char x)81 out_byte(unsigned char x)
82 {
83 int i;
84 TK_SDA_DIR(1);
85 for (i = 8; i--;) {
86 /* The chip latches incoming bits on the rising edge of SCL. */
87 TK_SCL_OUT(0);
88 TK_SDA_OUT(x & 1);
89 tempudelay(1);
90 TK_SCL_OUT(1);
91 tempudelay(1);
92 x >>= 1;
93 }
94 TK_SDA_DIR(0);
95 }
96
97 static unsigned char
in_byte(void)98 in_byte(void)
99 {
100 unsigned char x = 0;
101 int i;
102
103 /* Read byte. Bits come LSB first, on the falling edge of SCL.
104 * Assume SDA is in input direction already.
105 */
106 TK_SDA_DIR(0);
107
108 for (i = 8; i--;) {
109 TK_SCL_OUT(0);
110 tempudelay(1);
111 x >>= 1;
112 x |= (TK_SDA_IN() << 7);
113 TK_SCL_OUT(1);
114 tempudelay(1);
115 }
116
117 return x;
118 }
119
120 /* Prepares for a transaction by de-activating RST (active-low). */
121
122 static void
start(void)123 start(void)
124 {
125 TK_SCL_OUT(0);
126 tempudelay(1);
127 TK_RST_OUT(0);
128 tempudelay(5);
129 TK_RST_OUT(1);
130 }
131
132 /* Ends a transaction by taking RST active again. */
133
134 static void
stop(void)135 stop(void)
136 {
137 tempudelay(2);
138 TK_RST_OUT(0);
139 }
140
141 /* Enable writing. */
142
143 static void
ds1302_wenable(void)144 ds1302_wenable(void)
145 {
146 start();
147 out_byte(0x8e); /* Write control register */
148 out_byte(0x00); /* Disable write protect bit 7 = 0 */
149 stop();
150 }
151
152 /* Disable writing. */
153
154 static void
ds1302_wdisable(void)155 ds1302_wdisable(void)
156 {
157 start();
158 out_byte(0x8e); /* Write control register */
159 out_byte(0x80); /* Disable write protect bit 7 = 0 */
160 stop();
161 }
162
163
164
165 /* Read a byte from the selected register in the DS1302. */
166
167 unsigned char
ds1302_readreg(int reg)168 ds1302_readreg(int reg)
169 {
170 unsigned char x;
171
172 start();
173 out_byte(0x81 | (reg << 1)); /* read register */
174 x = in_byte();
175 stop();
176
177 return x;
178 }
179
180 /* Write a byte to the selected register. */
181
182 void
ds1302_writereg(int reg,unsigned char val)183 ds1302_writereg(int reg, unsigned char val)
184 {
185 #ifndef CONFIG_ETRAX_RTC_READONLY
186 int do_writereg = 1;
187 #else
188 int do_writereg = 0;
189
190 if (reg == RTC_TRICKLECHARGER)
191 do_writereg = 1;
192 #endif
193
194 if (do_writereg) {
195 ds1302_wenable();
196 start();
197 out_byte(0x80 | (reg << 1)); /* write register */
198 out_byte(val);
199 stop();
200 ds1302_wdisable();
201 }
202 }
203
204 void
get_rtc_time(struct rtc_time * rtc_tm)205 get_rtc_time(struct rtc_time *rtc_tm)
206 {
207 unsigned long flags;
208
209 local_irq_save(flags);
210
211 rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
212 rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
213 rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
214 rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
215 rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
216 rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
217
218 local_irq_restore(flags);
219
220 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
221 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
222 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
223 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
224 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
225 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
226
227 /*
228 * Account for differences between how the RTC uses the values
229 * and how they are defined in a struct rtc_time;
230 */
231
232 if (rtc_tm->tm_year <= 69)
233 rtc_tm->tm_year += 100;
234
235 rtc_tm->tm_mon--;
236 }
237
238 static unsigned char days_in_mo[] =
239 {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
240
241 /* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */
242
rtc_ioctl(struct file * file,unsigned int cmd,unsigned long arg)243 static int rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
244 {
245 unsigned long flags;
246
247 switch(cmd) {
248 case RTC_RD_TIME: /* read the time/date from RTC */
249 {
250 struct rtc_time rtc_tm;
251
252 memset(&rtc_tm, 0, sizeof (struct rtc_time));
253 get_rtc_time(&rtc_tm);
254 if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time)))
255 return -EFAULT;
256 return 0;
257 }
258
259 case RTC_SET_TIME: /* set the RTC */
260 {
261 struct rtc_time rtc_tm;
262 unsigned char mon, day, hrs, min, sec, leap_yr;
263 unsigned int yrs;
264
265 if (!capable(CAP_SYS_TIME))
266 return -EPERM;
267
268 if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time)))
269 return -EFAULT;
270
271 yrs = rtc_tm.tm_year + 1900;
272 mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
273 day = rtc_tm.tm_mday;
274 hrs = rtc_tm.tm_hour;
275 min = rtc_tm.tm_min;
276 sec = rtc_tm.tm_sec;
277
278
279 if ((yrs < 1970) || (yrs > 2069))
280 return -EINVAL;
281
282 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
283
284 if ((mon > 12) || (day == 0))
285 return -EINVAL;
286
287 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
288 return -EINVAL;
289
290 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
291 return -EINVAL;
292
293 if (yrs >= 2000)
294 yrs -= 2000; /* RTC (0, 1, ... 69) */
295 else
296 yrs -= 1900; /* RTC (70, 71, ... 99) */
297
298 sec = bin2bcd(sec);
299 min = bin2bcd(min);
300 hrs = bin2bcd(hrs);
301 day = bin2bcd(day);
302 mon = bin2bcd(mon);
303 yrs = bin2bcd(yrs);
304
305 local_irq_save(flags);
306 CMOS_WRITE(yrs, RTC_YEAR);
307 CMOS_WRITE(mon, RTC_MONTH);
308 CMOS_WRITE(day, RTC_DAY_OF_MONTH);
309 CMOS_WRITE(hrs, RTC_HOURS);
310 CMOS_WRITE(min, RTC_MINUTES);
311 CMOS_WRITE(sec, RTC_SECONDS);
312 local_irq_restore(flags);
313
314 /* Notice that at this point, the RTC is updated but
315 * the kernel is still running with the old time.
316 * You need to set that separately with settimeofday
317 * or adjtimex.
318 */
319 return 0;
320 }
321
322 case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */
323 {
324 int tcs_val;
325
326 if (!capable(CAP_SYS_TIME))
327 return -EPERM;
328
329 if(copy_from_user(&tcs_val, (int*)arg, sizeof(int)))
330 return -EFAULT;
331
332 tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F);
333 ds1302_writereg(RTC_TRICKLECHARGER, tcs_val);
334 return 0;
335 }
336 case RTC_VL_READ:
337 {
338 /* TODO:
339 * Implement voltage low detection support
340 */
341 printk(KERN_WARNING "DS1302: RTC Voltage Low detection"
342 " is not supported\n");
343 return 0;
344 }
345 case RTC_VL_CLR:
346 {
347 /* TODO:
348 * Nothing to do since Voltage Low detection is not supported
349 */
350 return 0;
351 }
352 default:
353 return -ENOIOCTLCMD;
354 }
355 }
356
rtc_unlocked_ioctl(struct file * file,unsigned int cmd,unsigned long arg)357 static long rtc_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
358 {
359 int ret;
360
361 mutex_lock(&ds1302_mutex);
362 ret = rtc_ioctl(file, cmd, arg);
363 mutex_unlock(&ds1302_mutex);
364
365 return ret;
366 }
367
368 static void
print_rtc_status(void)369 print_rtc_status(void)
370 {
371 struct rtc_time tm;
372
373 get_rtc_time(&tm);
374
375 /*
376 * There is no way to tell if the luser has the RTC set for local
377 * time or for Universal Standard Time (GMT). Probably local though.
378 */
379
380 printk(KERN_INFO "rtc_time\t: %02d:%02d:%02d\n",
381 tm.tm_hour, tm.tm_min, tm.tm_sec);
382 printk(KERN_INFO "rtc_date\t: %04d-%02d-%02d\n",
383 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday);
384 }
385
386 /* The various file operations we support. */
387
388 static const struct file_operations rtc_fops = {
389 .owner = THIS_MODULE,
390 .unlocked_ioctl = rtc_unlocked_ioctl,
391 .llseek = noop_llseek,
392 };
393
394 /* Probe for the chip by writing something to its RAM and try reading it back. */
395
396 #define MAGIC_PATTERN 0x42
397
398 static int __init
ds1302_probe(void)399 ds1302_probe(void)
400 {
401 int retval, res;
402
403 TK_RST_DIR(1);
404 TK_SCL_DIR(1);
405 TK_SDA_DIR(0);
406
407 /* Try to talk to timekeeper. */
408
409 ds1302_wenable();
410 start();
411 out_byte(0xc0); /* write RAM byte 0 */
412 out_byte(MAGIC_PATTERN); /* write something magic */
413 start();
414 out_byte(0xc1); /* read RAM byte 0 */
415
416 if((res = in_byte()) == MAGIC_PATTERN) {
417 stop();
418 ds1302_wdisable();
419 printk(KERN_INFO "%s: RTC found.\n", ds1302_name);
420 printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n",
421 ds1302_name,
422 CONFIG_ETRAX_DS1302_SDABIT,
423 CONFIG_ETRAX_DS1302_SCLBIT,
424 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
425 "GENIO",
426 #else
427 "PB",
428 #endif
429 CONFIG_ETRAX_DS1302_RSTBIT);
430 print_rtc_status();
431 retval = 1;
432 } else {
433 stop();
434 retval = 0;
435 }
436
437 return retval;
438 }
439
440
441 /* Just probe for the RTC and register the device to handle the ioctl needed. */
442
443 int __init
ds1302_init(void)444 ds1302_init(void)
445 {
446 #ifdef CONFIG_ETRAX_I2C
447 i2c_init();
448 #endif
449
450 if (!ds1302_probe()) {
451 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
452 #if CONFIG_ETRAX_DS1302_RSTBIT == 27
453 /*
454 * The only way to set g27 to output is to enable ATA.
455 *
456 * Make sure that R_GEN_CONFIG is setup correct.
457 */
458 /* Allocating the ATA interface will grab almost all
459 * pins in I/O groups a, b, c and d. A consequence of
460 * allocating the ATA interface is that the fixed
461 * interfaces shared RAM, parallel port 0, parallel
462 * port 1, parallel port W, SCSI-8 port 0, SCSI-8 port
463 * 1, SCSI-W, serial port 2, serial port 3,
464 * synchronous serial port 3 and USB port 2 and almost
465 * all GPIO pins on port g cannot be used.
466 */
467 if (cris_request_io_interface(if_ata, "ds1302/ATA")) {
468 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
469 return -1;
470 }
471
472 #elif CONFIG_ETRAX_DS1302_RSTBIT == 0
473 if (cris_io_interface_allocate_pins(if_gpio_grp_a,
474 'g',
475 CONFIG_ETRAX_DS1302_RSTBIT,
476 CONFIG_ETRAX_DS1302_RSTBIT)) {
477 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
478 return -1;
479 }
480
481 /* Set the direction of this bit to out. */
482 genconfig_shadow = ((genconfig_shadow &
483 ~IO_MASK(R_GEN_CONFIG, g0dir)) |
484 (IO_STATE(R_GEN_CONFIG, g0dir, out)));
485 *R_GEN_CONFIG = genconfig_shadow;
486 #endif
487 if (!ds1302_probe()) {
488 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
489 return -1;
490 }
491 #else
492 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
493 return -1;
494 #endif
495 }
496 /* Initialise trickle charger */
497 ds1302_writereg(RTC_TRICKLECHARGER,
498 RTC_TCR_PATTERN |(CONFIG_ETRAX_DS1302_TRICKLE_CHARGE & 0x0F));
499 /* Start clock by resetting CLOCK_HALT */
500 ds1302_writereg(RTC_SECONDS, (ds1302_readreg(RTC_SECONDS) & 0x7F));
501 return 0;
502 }
503
ds1302_register(void)504 static int __init ds1302_register(void)
505 {
506 ds1302_init();
507 if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &rtc_fops)) {
508 printk(KERN_INFO "%s: unable to get major %d for rtc\n",
509 ds1302_name, RTC_MAJOR_NR);
510 return -1;
511 }
512 return 0;
513
514 }
515
516 module_init(ds1302_register);
517