1 /*
2  * Copyright 2007-2009 Analog Devices Inc.
3  *               Graff Yang <graf.yang@analog.com>
4  *
5  * Licensed under the GPL-2 or later.
6  */
7 
8 #include <linux/smp.h>
9 #include <asm/blackfin.h>
10 #include <asm/cacheflush.h>
11 #include <mach/pll.h>
12 
13 int hotplug_coreb;
14 
platform_cpu_die(void)15 void platform_cpu_die(void)
16 {
17 	unsigned long iwr;
18 
19 	hotplug_coreb = 1;
20 
21 	/*
22 	 * When CoreB wakes up, the code in _coreb_trampoline_start cannot
23 	 * turn off the data cache. This causes the CoreB failed to boot.
24 	 * As a workaround, we invalidate all the data cache before sleep.
25 	 */
26 	blackfin_invalidate_entire_dcache();
27 
28 	/* disable core timer */
29 	bfin_write_TCNTL(0);
30 
31 	/* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */
32 	bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1)));
33 	SSYNC();
34 
35 	/* set CoreB wakeup by ipi0, iwr will be discarded */
36 	bfin_iwr_set_sup0(&iwr, &iwr, &iwr);
37 	SSYNC();
38 
39 	coreb_die();
40 }
41