1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/device.h>
11 #include <linux/etherdevice.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/mtd/physmap.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
19 #include <linux/usb/isp1362.h>
20 #endif
21 #include <linux/ata_platform.h>
22 #include <linux/irq.h>
23 #include <asm/dma.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/portmux.h>
26 #include <asm/dpmc.h>
27 #include <linux/spi/mmc_spi.h>
28
29 /*
30 * Name the Board for the /proc/cpuinfo
31 */
32 const char bfin_board_name[] = "Bluetechnix CM BF537U";
33
34 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
35 /* all SPI peripherals info goes here */
36
37 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
38 static struct mtd_partition bfin_spi_flash_partitions[] = {
39 {
40 .name = "bootloader(spi)",
41 .size = 0x00020000,
42 .offset = 0,
43 .mask_flags = MTD_CAP_ROM
44 }, {
45 .name = "linux kernel(spi)",
46 .size = 0xe0000,
47 .offset = 0x20000
48 }, {
49 .name = "file system(spi)",
50 .size = 0x700000,
51 .offset = 0x00100000,
52 }
53 };
54
55 static struct flash_platform_data bfin_spi_flash_data = {
56 .name = "m25p80",
57 .parts = bfin_spi_flash_partitions,
58 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
59 .type = "m25p64",
60 };
61
62 /* SPI flash chip (m25p64) */
63 static struct bfin5xx_spi_chip spi_flash_chip_info = {
64 .enable_dma = 0, /* use dma transfer with this chip*/
65 .bits_per_word = 8,
66 };
67 #endif
68
69 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
70 /* SPI ADC chip */
71 static struct bfin5xx_spi_chip spi_adc_chip_info = {
72 .enable_dma = 1, /* use dma transfer with this chip*/
73 .bits_per_word = 16,
74 };
75 #endif
76
77 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
78 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
79 .enable_dma = 0,
80 .bits_per_word = 16,
81 };
82 #endif
83
84 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
85 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
86 .enable_dma = 0,
87 .bits_per_word = 8,
88 };
89 #endif
90
91 static struct spi_board_info bfin_spi_board_info[] __initdata = {
92 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
93 {
94 /* the modalias must be the same as spi device driver name */
95 .modalias = "m25p80", /* Name of spi_driver for this device */
96 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
97 .bus_num = 0, /* Framework bus number */
98 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
99 .platform_data = &bfin_spi_flash_data,
100 .controller_data = &spi_flash_chip_info,
101 .mode = SPI_MODE_3,
102 },
103 #endif
104
105 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
106 {
107 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
108 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
109 .bus_num = 0, /* Framework bus number */
110 .chip_select = 1, /* Framework chip select. */
111 .platform_data = NULL, /* No spi_driver specific config */
112 .controller_data = &spi_adc_chip_info,
113 },
114 #endif
115
116 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
117 {
118 .modalias = "ad183x",
119 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
120 .bus_num = 0,
121 .chip_select = 4,
122 .controller_data = &ad1836_spi_chip_info,
123 },
124 #endif
125
126 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
127 {
128 .modalias = "mmc_spi",
129 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
130 .bus_num = 0,
131 .chip_select = 1,
132 .controller_data = &mmc_spi_chip_info,
133 .mode = SPI_MODE_3,
134 },
135 #endif
136 };
137
138 /* SPI (0) */
139 static struct resource bfin_spi0_resource[] = {
140 [0] = {
141 .start = SPI0_REGBASE,
142 .end = SPI0_REGBASE + 0xFF,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = CH_SPI,
147 .end = CH_SPI,
148 .flags = IORESOURCE_DMA,
149 },
150 [2] = {
151 .start = IRQ_SPI,
152 .end = IRQ_SPI,
153 .flags = IORESOURCE_IRQ,
154 },
155 };
156
157 /* SPI controller data */
158 static struct bfin5xx_spi_master bfin_spi0_info = {
159 .num_chipselect = 8,
160 .enable_dma = 1, /* master has the ability to do dma transfer */
161 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
162 };
163
164 static struct platform_device bfin_spi0_device = {
165 .name = "bfin-spi",
166 .id = 0, /* Bus number */
167 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
168 .resource = bfin_spi0_resource,
169 .dev = {
170 .platform_data = &bfin_spi0_info, /* Passed to driver */
171 },
172 };
173 #endif /* spi master and devices */
174
175 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
176 static struct platform_device rtc_device = {
177 .name = "rtc-bfin",
178 .id = -1,
179 };
180 #endif
181
182 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
183 static struct platform_device hitachi_fb_device = {
184 .name = "hitachi-tx09",
185 };
186 #endif
187
188 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
189 #include <linux/smc91x.h>
190
191 static struct smc91x_platdata smc91x_info = {
192 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
193 .leda = RPC_LED_100_10,
194 .ledb = RPC_LED_TX_RX,
195 };
196
197 static struct resource smc91x_resources[] = {
198 {
199 .start = 0x20200300,
200 .end = 0x20200300 + 16,
201 .flags = IORESOURCE_MEM,
202 }, {
203 .start = IRQ_PF14,
204 .end = IRQ_PF14,
205 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
206 },
207 };
208
209 static struct platform_device smc91x_device = {
210 .name = "smc91x",
211 .id = 0,
212 .num_resources = ARRAY_SIZE(smc91x_resources),
213 .resource = smc91x_resources,
214 .dev = {
215 .platform_data = &smc91x_info,
216 },
217 };
218 #endif
219
220 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
221 static struct resource isp1362_hcd_resources[] = {
222 {
223 .start = 0x20308000,
224 .end = 0x20308000,
225 .flags = IORESOURCE_MEM,
226 }, {
227 .start = 0x20308004,
228 .end = 0x20308004,
229 .flags = IORESOURCE_MEM,
230 }, {
231 .start = IRQ_PG15,
232 .end = IRQ_PG15,
233 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
234 },
235 };
236
237 static struct isp1362_platform_data isp1362_priv = {
238 .sel15Kres = 1,
239 .clknotstop = 0,
240 .oc_enable = 0,
241 .int_act_high = 0,
242 .int_edge_triggered = 0,
243 .remote_wakeup_connected = 0,
244 .no_power_switching = 1,
245 .power_switching_mode = 0,
246 };
247
248 static struct platform_device isp1362_hcd_device = {
249 .name = "isp1362-hcd",
250 .id = 0,
251 .dev = {
252 .platform_data = &isp1362_priv,
253 },
254 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
255 .resource = isp1362_hcd_resources,
256 };
257 #endif
258
259 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
260 static struct resource net2272_bfin_resources[] = {
261 {
262 .start = 0x20200000,
263 .end = 0x20200000 + 0x100,
264 .flags = IORESOURCE_MEM,
265 }, {
266 .start = IRQ_PH14,
267 .end = IRQ_PH14,
268 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
269 },
270 };
271
272 static struct platform_device net2272_bfin_device = {
273 .name = "net2272",
274 .id = -1,
275 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
276 .resource = net2272_bfin_resources,
277 };
278 #endif
279
280 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
281 static struct mtd_partition cm_partitions[] = {
282 {
283 .name = "bootloader(nor)",
284 .size = 0x40000,
285 .offset = 0,
286 }, {
287 .name = "linux kernel(nor)",
288 .size = 0x100000,
289 .offset = MTDPART_OFS_APPEND,
290 }, {
291 .name = "file system(nor)",
292 .size = MTDPART_SIZ_FULL,
293 .offset = MTDPART_OFS_APPEND,
294 }
295 };
296
297 static struct physmap_flash_data cm_flash_data = {
298 .width = 2,
299 .parts = cm_partitions,
300 .nr_parts = ARRAY_SIZE(cm_partitions),
301 };
302
303 static unsigned cm_flash_gpios[] = { GPIO_PH0 };
304
305 static struct resource cm_flash_resource[] = {
306 {
307 .name = "cfi_probe",
308 .start = 0x20000000,
309 .end = 0x201fffff,
310 .flags = IORESOURCE_MEM,
311 }, {
312 .start = (unsigned long)cm_flash_gpios,
313 .end = ARRAY_SIZE(cm_flash_gpios),
314 .flags = IORESOURCE_IRQ,
315 }
316 };
317
318 static struct platform_device cm_flash_device = {
319 .name = "gpio-addr-flash",
320 .id = 0,
321 .dev = {
322 .platform_data = &cm_flash_data,
323 },
324 .num_resources = ARRAY_SIZE(cm_flash_resource),
325 .resource = cm_flash_resource,
326 };
327 #endif
328
329 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
330 #ifdef CONFIG_SERIAL_BFIN_UART0
331 static struct resource bfin_uart0_resources[] = {
332 {
333 .start = UART0_THR,
334 .end = UART0_GCTL+2,
335 .flags = IORESOURCE_MEM,
336 },
337 {
338 .start = IRQ_UART0_RX,
339 .end = IRQ_UART0_RX+1,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .start = IRQ_UART0_ERROR,
344 .end = IRQ_UART0_ERROR,
345 .flags = IORESOURCE_IRQ,
346 },
347 {
348 .start = CH_UART0_TX,
349 .end = CH_UART0_TX,
350 .flags = IORESOURCE_DMA,
351 },
352 {
353 .start = CH_UART0_RX,
354 .end = CH_UART0_RX,
355 .flags = IORESOURCE_DMA,
356 },
357 };
358
359 static unsigned short bfin_uart0_peripherals[] = {
360 P_UART0_TX, P_UART0_RX, 0
361 };
362
363 static struct platform_device bfin_uart0_device = {
364 .name = "bfin-uart",
365 .id = 0,
366 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
367 .resource = bfin_uart0_resources,
368 .dev = {
369 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
370 },
371 };
372 #endif
373 #ifdef CONFIG_SERIAL_BFIN_UART1
374 static struct resource bfin_uart1_resources[] = {
375 {
376 .start = UART1_THR,
377 .end = UART1_GCTL+2,
378 .flags = IORESOURCE_MEM,
379 },
380 {
381 .start = IRQ_UART1_RX,
382 .end = IRQ_UART1_RX+1,
383 .flags = IORESOURCE_IRQ,
384 },
385 {
386 .start = IRQ_UART1_ERROR,
387 .end = IRQ_UART1_ERROR,
388 .flags = IORESOURCE_IRQ,
389 },
390 {
391 .start = CH_UART1_TX,
392 .end = CH_UART1_TX,
393 .flags = IORESOURCE_DMA,
394 },
395 {
396 .start = CH_UART1_RX,
397 .end = CH_UART1_RX,
398 .flags = IORESOURCE_DMA,
399 },
400 };
401
402 static unsigned short bfin_uart1_peripherals[] = {
403 P_UART1_TX, P_UART1_RX, 0
404 };
405
406 static struct platform_device bfin_uart1_device = {
407 .name = "bfin-uart",
408 .id = 1,
409 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
410 .resource = bfin_uart1_resources,
411 .dev = {
412 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
413 },
414 };
415 #endif
416 #endif
417
418 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
419 #ifdef CONFIG_BFIN_SIR0
420 static struct resource bfin_sir0_resources[] = {
421 {
422 .start = 0xFFC00400,
423 .end = 0xFFC004FF,
424 .flags = IORESOURCE_MEM,
425 },
426 {
427 .start = IRQ_UART0_RX,
428 .end = IRQ_UART0_RX+1,
429 .flags = IORESOURCE_IRQ,
430 },
431 {
432 .start = CH_UART0_RX,
433 .end = CH_UART0_RX+1,
434 .flags = IORESOURCE_DMA,
435 },
436 };
437 static struct platform_device bfin_sir0_device = {
438 .name = "bfin_sir",
439 .id = 0,
440 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
441 .resource = bfin_sir0_resources,
442 };
443 #endif
444 #ifdef CONFIG_BFIN_SIR1
445 static struct resource bfin_sir1_resources[] = {
446 {
447 .start = 0xFFC02000,
448 .end = 0xFFC020FF,
449 .flags = IORESOURCE_MEM,
450 },
451 {
452 .start = IRQ_UART1_RX,
453 .end = IRQ_UART1_RX+1,
454 .flags = IORESOURCE_IRQ,
455 },
456 {
457 .start = CH_UART1_RX,
458 .end = CH_UART1_RX+1,
459 .flags = IORESOURCE_DMA,
460 },
461 };
462 static struct platform_device bfin_sir1_device = {
463 .name = "bfin_sir",
464 .id = 1,
465 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
466 .resource = bfin_sir1_resources,
467 };
468 #endif
469 #endif
470
471 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
472 static struct resource bfin_twi0_resource[] = {
473 [0] = {
474 .start = TWI0_REGBASE,
475 .end = TWI0_REGBASE,
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .start = IRQ_TWI,
480 .end = IRQ_TWI,
481 .flags = IORESOURCE_IRQ,
482 },
483 };
484
485 static struct platform_device i2c_bfin_twi_device = {
486 .name = "i2c-bfin-twi",
487 .id = 0,
488 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
489 .resource = bfin_twi0_resource,
490 };
491 #endif
492
493 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
494 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
495 static struct resource bfin_sport0_uart_resources[] = {
496 {
497 .start = SPORT0_TCR1,
498 .end = SPORT0_MRCS3+4,
499 .flags = IORESOURCE_MEM,
500 },
501 {
502 .start = IRQ_SPORT0_RX,
503 .end = IRQ_SPORT0_RX+1,
504 .flags = IORESOURCE_IRQ,
505 },
506 {
507 .start = IRQ_SPORT0_ERROR,
508 .end = IRQ_SPORT0_ERROR,
509 .flags = IORESOURCE_IRQ,
510 },
511 };
512
513 static unsigned short bfin_sport0_peripherals[] = {
514 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
515 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
516 };
517
518 static struct platform_device bfin_sport0_uart_device = {
519 .name = "bfin-sport-uart",
520 .id = 0,
521 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
522 .resource = bfin_sport0_uart_resources,
523 .dev = {
524 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
525 },
526 };
527 #endif
528 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
529 static struct resource bfin_sport1_uart_resources[] = {
530 {
531 .start = SPORT1_TCR1,
532 .end = SPORT1_MRCS3+4,
533 .flags = IORESOURCE_MEM,
534 },
535 {
536 .start = IRQ_SPORT1_RX,
537 .end = IRQ_SPORT1_RX+1,
538 .flags = IORESOURCE_IRQ,
539 },
540 {
541 .start = IRQ_SPORT1_ERROR,
542 .end = IRQ_SPORT1_ERROR,
543 .flags = IORESOURCE_IRQ,
544 },
545 };
546
547 static unsigned short bfin_sport1_peripherals[] = {
548 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
549 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
550 };
551
552 static struct platform_device bfin_sport1_uart_device = {
553 .name = "bfin-sport-uart",
554 .id = 1,
555 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
556 .resource = bfin_sport1_uart_resources,
557 .dev = {
558 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
559 },
560 };
561 #endif
562 #endif
563
564 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
565 #include <linux/bfin_mac.h>
566 static const unsigned short bfin_mac_peripherals[] = P_MII0;
567
568 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
569 {
570 .addr = 1,
571 .irq = IRQ_MAC_PHYINT,
572 },
573 };
574
575 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
576 .phydev_number = 1,
577 .phydev_data = bfin_phydev_data,
578 .phy_mode = PHY_INTERFACE_MODE_MII,
579 .mac_peripherals = bfin_mac_peripherals,
580 };
581
582 static struct platform_device bfin_mii_bus = {
583 .name = "bfin_mii_bus",
584 .dev = {
585 .platform_data = &bfin_mii_bus_data,
586 }
587 };
588
589 static struct platform_device bfin_mac_device = {
590 .name = "bfin_mac",
591 .dev = {
592 .platform_data = &bfin_mii_bus,
593 }
594 };
595 #endif
596
597 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
598 #define PATA_INT IRQ_PF14
599
600 static struct pata_platform_info bfin_pata_platform_data = {
601 .ioport_shift = 2,
602 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
603 };
604
605 static struct resource bfin_pata_resources[] = {
606 {
607 .start = 0x2030C000,
608 .end = 0x2030C01F,
609 .flags = IORESOURCE_MEM,
610 },
611 {
612 .start = 0x2030D018,
613 .end = 0x2030D01B,
614 .flags = IORESOURCE_MEM,
615 },
616 {
617 .start = PATA_INT,
618 .end = PATA_INT,
619 .flags = IORESOURCE_IRQ,
620 },
621 };
622
623 static struct platform_device bfin_pata_device = {
624 .name = "pata_platform",
625 .id = -1,
626 .num_resources = ARRAY_SIZE(bfin_pata_resources),
627 .resource = bfin_pata_resources,
628 .dev = {
629 .platform_data = &bfin_pata_platform_data,
630 }
631 };
632 #endif
633
634 static const unsigned int cclk_vlev_datasheet[] =
635 {
636 VRPAIR(VLEV_085, 250000000),
637 VRPAIR(VLEV_090, 376000000),
638 VRPAIR(VLEV_095, 426000000),
639 VRPAIR(VLEV_100, 426000000),
640 VRPAIR(VLEV_105, 476000000),
641 VRPAIR(VLEV_110, 476000000),
642 VRPAIR(VLEV_115, 476000000),
643 VRPAIR(VLEV_120, 500000000),
644 VRPAIR(VLEV_125, 533000000),
645 VRPAIR(VLEV_130, 600000000),
646 };
647
648 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
649 .tuple_tab = cclk_vlev_datasheet,
650 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
651 .vr_settling_time = 25 /* us */,
652 };
653
654 static struct platform_device bfin_dpmc = {
655 .name = "bfin dpmc",
656 .dev = {
657 .platform_data = &bfin_dmpc_vreg_data,
658 },
659 };
660
661 static struct platform_device *cm_bf537u_devices[] __initdata = {
662
663 &bfin_dpmc,
664
665 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
666 &hitachi_fb_device,
667 #endif
668
669 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
670 &rtc_device,
671 #endif
672
673 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
674 #ifdef CONFIG_SERIAL_BFIN_UART0
675 &bfin_uart0_device,
676 #endif
677 #ifdef CONFIG_SERIAL_BFIN_UART1
678 &bfin_uart1_device,
679 #endif
680 #endif
681
682 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
683 #ifdef CONFIG_BFIN_SIR0
684 &bfin_sir0_device,
685 #endif
686 #ifdef CONFIG_BFIN_SIR1
687 &bfin_sir1_device,
688 #endif
689 #endif
690
691 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
692 &i2c_bfin_twi_device,
693 #endif
694
695 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
696 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
697 &bfin_sport0_uart_device,
698 #endif
699 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
700 &bfin_sport1_uart_device,
701 #endif
702 #endif
703
704 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
705 &isp1362_hcd_device,
706 #endif
707
708 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
709 &smc91x_device,
710 #endif
711
712 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
713 &bfin_mii_bus,
714 &bfin_mac_device,
715 #endif
716
717 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
718 &net2272_bfin_device,
719 #endif
720
721 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
722 &bfin_spi0_device,
723 #endif
724
725 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
726 &bfin_pata_device,
727 #endif
728
729 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
730 &cm_flash_device,
731 #endif
732 };
733
cm_bf537u_init(void)734 static int __init cm_bf537u_init(void)
735 {
736 printk(KERN_INFO "%s(): registering device resources\n", __func__);
737 platform_add_devices(cm_bf537u_devices, ARRAY_SIZE(cm_bf537u_devices));
738 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
739 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
740 #endif
741
742 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
743 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
744 #endif
745 return 0;
746 }
747
748 arch_initcall(cm_bf537u_init);
749
750 static struct platform_device *cm_bf537u_early_devices[] __initdata = {
751 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
752 #ifdef CONFIG_SERIAL_BFIN_UART0
753 &bfin_uart0_device,
754 #endif
755 #ifdef CONFIG_SERIAL_BFIN_UART1
756 &bfin_uart1_device,
757 #endif
758 #endif
759
760 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
761 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
762 &bfin_sport0_uart_device,
763 #endif
764 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
765 &bfin_sport1_uart_device,
766 #endif
767 #endif
768 };
769
native_machine_early_platform_add_devices(void)770 void __init native_machine_early_platform_add_devices(void)
771 {
772 printk(KERN_INFO "register early platform devices\n");
773 early_platform_add_devices(cm_bf537u_early_devices,
774 ARRAY_SIZE(cm_bf537u_early_devices));
775 }
776
bfin_get_ether_addr(char * addr)777 void bfin_get_ether_addr(char *addr)
778 {
779 random_ether_addr(addr);
780 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
781 }
782 EXPORT_SYMBOL(bfin_get_ether_addr);
783