1 /* linux/include/asm-arm/plat-s3c24xx/map.h 2 * 3 * Copyright (c) 2008 Simtec Electronics 4 * Ben Dooks <ben@simtec.co.uk> 5 * 6 * S3C24XX - Memory map definitions 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #ifndef __ASM_PLAT_S3C24XX_MAP_H 14 #define __ASM_PLAT_S3C24XX_MAP_H 15 16 /* interrupt controller is the first thing we put in, to make 17 * the assembly code for the irq detection easier 18 */ 19 #define S3C24XX_VA_IRQ S3C_VA_IRQ 20 #define S3C2410_PA_IRQ (0x4A000000) 21 #define S3C24XX_SZ_IRQ SZ_1M 22 23 /* memory controller registers */ 24 #define S3C24XX_VA_MEMCTRL S3C_VA_MEM 25 #define S3C2410_PA_MEMCTRL (0x48000000) 26 #define S3C24XX_SZ_MEMCTRL SZ_1M 27 28 /* UARTs */ 29 #define S3C24XX_VA_UART S3C_VA_UART 30 #define S3C2410_PA_UART (0x50000000) 31 #define S3C24XX_SZ_UART SZ_1M 32 #define S3C_UART_OFFSET (0x4000) 33 34 #define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET))) 35 36 /* Timers */ 37 #define S3C24XX_VA_TIMER S3C_VA_TIMER 38 #define S3C2410_PA_TIMER (0x51000000) 39 #define S3C24XX_SZ_TIMER SZ_1M 40 41 /* Clock and Power management */ 42 #define S3C24XX_VA_CLKPWR S3C_VA_SYS 43 #define S3C24XX_SZ_CLKPWR SZ_1M 44 45 /* USB Device port */ 46 #define S3C2410_PA_USBDEV (0x52000000) 47 #define S3C24XX_SZ_USBDEV SZ_1M 48 49 /* Watchdog */ 50 #define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG 51 #define S3C2410_PA_WATCHDOG (0x53000000) 52 #define S3C24XX_SZ_WATCHDOG SZ_1M 53 54 /* Standard size definitions for peripheral blocks. */ 55 56 #define S3C24XX_SZ_IIS SZ_1M 57 #define S3C24XX_SZ_ADC SZ_1M 58 #define S3C24XX_SZ_SPI SZ_1M 59 #define S3C24XX_SZ_SDI SZ_1M 60 #define S3C24XX_SZ_NAND SZ_1M 61 62 /* GPIO ports */ 63 64 /* the calculation for the VA of this must ensure that 65 * it is the same distance apart from the UART in the 66 * phsyical address space, as the initial mapping for the IO 67 * is done as a 1:1 mapping. This puts it (currently) at 68 * 0xFA800000, which is not in the way of any current mapping 69 * by the base system. 70 */ 71 72 #define S3C2410_PA_GPIO (0x56000000) 73 #define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) 74 #define S3C24XX_SZ_GPIO SZ_1M 75 76 77 /* ISA style IO, for each machine to sort out mappings for, if it 78 * implements it. We reserve two 16M regions for ISA. 79 */ 80 81 #define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000) 82 #define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000) 83 84 /* deal with the registers that move under the 2412/2413 */ 85 86 #if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) 87 #ifndef __ASSEMBLY__ 88 extern void __iomem *s3c24xx_va_gpio2; 89 #endif 90 #ifdef CONFIG_CPU_S3C2412_ONLY 91 #define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) 92 #else 93 #define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 94 #endif 95 #else 96 #define s3c24xx_va_gpio2 S3C24XX_VA_GPIO 97 #define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO 98 #endif 99 100 #endif /* __ASM_PLAT_S3C24XX_MAP_H */ 101