1 /*
2  * arch/arm/mach-tegra/cpu-tegra.c
3  *
4  * Copyright (C) 2010 Google, Inc.
5  *
6  * Author:
7  *	Colin Cross <ccross@google.com>
8  *	Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
9  *
10  * This software is licensed under the terms of the GNU General Public
11  * License version 2, as published by the Free Software Foundation, and
12  * may be copied, distributed, and modified under those terms.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  */
20 
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/sched.h>
25 #include <linux/cpufreq.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/err.h>
29 #include <linux/clk.h>
30 #include <linux/io.h>
31 #include <linux/suspend.h>
32 
33 #include <asm/system.h>
34 
35 #include <mach/hardware.h>
36 #include <mach/clk.h>
37 
38 /* Frequency table index must be sequential starting at 0 */
39 static struct cpufreq_frequency_table freq_table[] = {
40 	{ 0, 216000 },
41 	{ 1, 312000 },
42 	{ 2, 456000 },
43 	{ 3, 608000 },
44 	{ 4, 760000 },
45 	{ 5, 816000 },
46 	{ 6, 912000 },
47 	{ 7, 1000000 },
48 	{ 8, CPUFREQ_TABLE_END },
49 };
50 
51 #define NUM_CPUS	2
52 
53 static struct clk *cpu_clk;
54 static struct clk *emc_clk;
55 
56 static unsigned long target_cpu_speed[NUM_CPUS];
57 static DEFINE_MUTEX(tegra_cpu_lock);
58 static bool is_suspended;
59 
tegra_verify_speed(struct cpufreq_policy * policy)60 int tegra_verify_speed(struct cpufreq_policy *policy)
61 {
62 	return cpufreq_frequency_table_verify(policy, freq_table);
63 }
64 
tegra_getspeed(unsigned int cpu)65 unsigned int tegra_getspeed(unsigned int cpu)
66 {
67 	unsigned long rate;
68 
69 	if (cpu >= NUM_CPUS)
70 		return 0;
71 
72 	rate = clk_get_rate(cpu_clk) / 1000;
73 	return rate;
74 }
75 
tegra_update_cpu_speed(unsigned long rate)76 static int tegra_update_cpu_speed(unsigned long rate)
77 {
78 	int ret = 0;
79 	struct cpufreq_freqs freqs;
80 
81 	freqs.old = tegra_getspeed(0);
82 	freqs.new = rate;
83 
84 	if (freqs.old == freqs.new)
85 		return ret;
86 
87 	/*
88 	 * Vote on memory bus frequency based on cpu frequency
89 	 * This sets the minimum frequency, display or avp may request higher
90 	 */
91 	if (rate >= 816000)
92 		clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */
93 	else if (rate >= 456000)
94 		clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */
95 	else
96 		clk_set_rate(emc_clk, 100000000);  /* emc 50Mhz */
97 
98 	for_each_online_cpu(freqs.cpu)
99 		cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
100 
101 #ifdef CONFIG_CPU_FREQ_DEBUG
102 	printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n",
103 	       freqs.old, freqs.new);
104 #endif
105 
106 	ret = clk_set_rate(cpu_clk, freqs.new * 1000);
107 	if (ret) {
108 		pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n",
109 			freqs.new);
110 		return ret;
111 	}
112 
113 	for_each_online_cpu(freqs.cpu)
114 		cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
115 
116 	return 0;
117 }
118 
tegra_cpu_highest_speed(void)119 static unsigned long tegra_cpu_highest_speed(void)
120 {
121 	unsigned long rate = 0;
122 	int i;
123 
124 	for_each_online_cpu(i)
125 		rate = max(rate, target_cpu_speed[i]);
126 	return rate;
127 }
128 
tegra_target(struct cpufreq_policy * policy,unsigned int target_freq,unsigned int relation)129 static int tegra_target(struct cpufreq_policy *policy,
130 		       unsigned int target_freq,
131 		       unsigned int relation)
132 {
133 	int idx;
134 	unsigned int freq;
135 	int ret = 0;
136 
137 	mutex_lock(&tegra_cpu_lock);
138 
139 	if (is_suspended) {
140 		ret = -EBUSY;
141 		goto out;
142 	}
143 
144 	cpufreq_frequency_table_target(policy, freq_table, target_freq,
145 		relation, &idx);
146 
147 	freq = freq_table[idx].frequency;
148 
149 	target_cpu_speed[policy->cpu] = freq;
150 
151 	ret = tegra_update_cpu_speed(tegra_cpu_highest_speed());
152 
153 out:
154 	mutex_unlock(&tegra_cpu_lock);
155 	return ret;
156 }
157 
tegra_pm_notify(struct notifier_block * nb,unsigned long event,void * dummy)158 static int tegra_pm_notify(struct notifier_block *nb, unsigned long event,
159 	void *dummy)
160 {
161 	mutex_lock(&tegra_cpu_lock);
162 	if (event == PM_SUSPEND_PREPARE) {
163 		is_suspended = true;
164 		pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n",
165 			freq_table[0].frequency);
166 		tegra_update_cpu_speed(freq_table[0].frequency);
167 	} else if (event == PM_POST_SUSPEND) {
168 		is_suspended = false;
169 	}
170 	mutex_unlock(&tegra_cpu_lock);
171 
172 	return NOTIFY_OK;
173 }
174 
175 static struct notifier_block tegra_cpu_pm_notifier = {
176 	.notifier_call = tegra_pm_notify,
177 };
178 
tegra_cpu_init(struct cpufreq_policy * policy)179 static int tegra_cpu_init(struct cpufreq_policy *policy)
180 {
181 	if (policy->cpu >= NUM_CPUS)
182 		return -EINVAL;
183 
184 	cpu_clk = clk_get_sys(NULL, "cpu");
185 	if (IS_ERR(cpu_clk))
186 		return PTR_ERR(cpu_clk);
187 
188 	emc_clk = clk_get_sys("cpu", "emc");
189 	if (IS_ERR(emc_clk)) {
190 		clk_put(cpu_clk);
191 		return PTR_ERR(emc_clk);
192 	}
193 
194 	clk_enable(emc_clk);
195 	clk_enable(cpu_clk);
196 
197 	cpufreq_frequency_table_cpuinfo(policy, freq_table);
198 	cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
199 	policy->cur = tegra_getspeed(policy->cpu);
200 	target_cpu_speed[policy->cpu] = policy->cur;
201 
202 	/* FIXME: what's the actual transition time? */
203 	policy->cpuinfo.transition_latency = 300 * 1000;
204 
205 	policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
206 	cpumask_copy(policy->related_cpus, cpu_possible_mask);
207 
208 	if (policy->cpu == 0)
209 		register_pm_notifier(&tegra_cpu_pm_notifier);
210 
211 	return 0;
212 }
213 
tegra_cpu_exit(struct cpufreq_policy * policy)214 static int tegra_cpu_exit(struct cpufreq_policy *policy)
215 {
216 	cpufreq_frequency_table_cpuinfo(policy, freq_table);
217 	clk_disable(emc_clk);
218 	clk_put(emc_clk);
219 	clk_put(cpu_clk);
220 	return 0;
221 }
222 
223 static struct freq_attr *tegra_cpufreq_attr[] = {
224 	&cpufreq_freq_attr_scaling_available_freqs,
225 	NULL,
226 };
227 
228 static struct cpufreq_driver tegra_cpufreq_driver = {
229 	.verify		= tegra_verify_speed,
230 	.target		= tegra_target,
231 	.get		= tegra_getspeed,
232 	.init		= tegra_cpu_init,
233 	.exit		= tegra_cpu_exit,
234 	.name		= "tegra",
235 	.attr		= tegra_cpufreq_attr,
236 };
237 
tegra_cpufreq_init(void)238 static int __init tegra_cpufreq_init(void)
239 {
240 	return cpufreq_register_driver(&tegra_cpufreq_driver);
241 }
242 
tegra_cpufreq_exit(void)243 static void __exit tegra_cpufreq_exit(void)
244 {
245         cpufreq_unregister_driver(&tegra_cpufreq_driver);
246 }
247 
248 
249 MODULE_AUTHOR("Colin Cross <ccross@android.com>");
250 MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2");
251 MODULE_LICENSE("GPL");
252 module_init(tegra_cpufreq_init);
253 module_exit(tegra_cpufreq_exit);
254