1 /*
2 * linux/arch/arm/mach-realview/realview_pba8.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/amba/pl022.h>
29 #include <linux/io.h>
30
31 #include <asm/irq.h>
32 #include <asm/leds.h>
33 #include <asm/mach-types.h>
34 #include <asm/pmu.h>
35 #include <asm/pgtable.h>
36 #include <asm/hardware/gic.h>
37
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/time.h>
41
42 #include <mach/hardware.h>
43 #include <mach/board-pba8.h>
44 #include <mach/irqs.h>
45
46 #include "core.h"
47
48 static struct map_desc realview_pba8_io_desc[] __initdata = {
49 {
50 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
51 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
52 .length = SZ_4K,
53 .type = MT_DEVICE,
54 }, {
55 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
56 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
57 .length = SZ_4K,
58 .type = MT_DEVICE,
59 }, {
60 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
61 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
62 .length = SZ_4K,
63 .type = MT_DEVICE,
64 }, {
65 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
66 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
67 .length = SZ_4K,
68 .type = MT_DEVICE,
69 }, {
70 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
71 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
72 .length = SZ_4K,
73 .type = MT_DEVICE,
74 }, {
75 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
76 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
77 .length = SZ_4K,
78 .type = MT_DEVICE,
79 },
80 #ifdef CONFIG_PCI
81 {
82 .virtual = PCIX_UNIT_BASE,
83 .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
84 .length = REALVIEW_PBA8_PCI_BASE_SIZE,
85 .type = MT_DEVICE
86 },
87 #endif
88 #ifdef CONFIG_DEBUG_LL
89 {
90 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
91 .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
92 .length = SZ_4K,
93 .type = MT_DEVICE,
94 },
95 #endif
96 };
97
realview_pba8_map_io(void)98 static void __init realview_pba8_map_io(void)
99 {
100 iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
101 }
102
103 static struct pl061_platform_data gpio0_plat_data = {
104 .gpio_base = 0,
105 .irq_base = -1,
106 };
107
108 static struct pl061_platform_data gpio1_plat_data = {
109 .gpio_base = 8,
110 .irq_base = -1,
111 };
112
113 static struct pl061_platform_data gpio2_plat_data = {
114 .gpio_base = 16,
115 .irq_base = -1,
116 };
117
118 static struct pl022_ssp_controller ssp0_plat_data = {
119 .bus_id = 0,
120 .enable_dma = 0,
121 .num_chipselect = 1,
122 };
123
124 /*
125 * RealView PBA8Core AMBA devices
126 */
127
128 #define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
129 #define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
130 #define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
131 #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
132 #define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
133 #define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
134 #define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
135 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
136 #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
137 #define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
138 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
139 #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
140 #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
141 #define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
142 #define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
143 #define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
144 #define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
145 #define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
146 #define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
147 #define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
148 #define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
149
150 /* FPGA Primecells */
151 AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
152 AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
153 AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
154 AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
155 AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
156
157 /* DevChip Primecells */
158 AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
159 AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
160 AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
161 AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
162 AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
163 AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
164 AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
165 AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
166 AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
167 AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
168 AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
169 AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data);
170
171 /* Primecells on the NEC ISSP chip */
172 AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
173 AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL);
174
175 static struct amba_device *amba_devs[] __initdata = {
176 &dmac_device,
177 &uart0_device,
178 &uart1_device,
179 &uart2_device,
180 &uart3_device,
181 &smc_device,
182 &clcd_device,
183 &sctl_device,
184 &wdog_device,
185 &gpio0_device,
186 &gpio1_device,
187 &gpio2_device,
188 &rtc_device,
189 &sci0_device,
190 &ssp0_device,
191 &aaci_device,
192 &mmc0_device,
193 &kmi0_device,
194 &kmi1_device,
195 };
196
197 /*
198 * RealView PB-A8 platform devices
199 */
200 static struct resource realview_pba8_flash_resource[] = {
201 [0] = {
202 .start = REALVIEW_PBA8_FLASH0_BASE,
203 .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
204 .flags = IORESOURCE_MEM,
205 },
206 [1] = {
207 .start = REALVIEW_PBA8_FLASH1_BASE,
208 .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
209 .flags = IORESOURCE_MEM,
210 },
211 };
212
213 static struct resource realview_pba8_smsc911x_resources[] = {
214 [0] = {
215 .start = REALVIEW_PBA8_ETH_BASE,
216 .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
217 .flags = IORESOURCE_MEM,
218 },
219 [1] = {
220 .start = IRQ_PBA8_ETH,
221 .end = IRQ_PBA8_ETH,
222 .flags = IORESOURCE_IRQ,
223 },
224 };
225
226 static struct resource realview_pba8_isp1761_resources[] = {
227 [0] = {
228 .start = REALVIEW_PBA8_USB_BASE,
229 .end = REALVIEW_PBA8_USB_BASE + SZ_128K - 1,
230 .flags = IORESOURCE_MEM,
231 },
232 [1] = {
233 .start = IRQ_PBA8_USB,
234 .end = IRQ_PBA8_USB,
235 .flags = IORESOURCE_IRQ,
236 },
237 };
238
239 static struct resource pmu_resource = {
240 .start = IRQ_PBA8_PMU,
241 .end = IRQ_PBA8_PMU,
242 .flags = IORESOURCE_IRQ,
243 };
244
245 static struct platform_device pmu_device = {
246 .name = "arm-pmu",
247 .id = ARM_PMU_DEVICE_CPU,
248 .num_resources = 1,
249 .resource = &pmu_resource,
250 };
251
gic_init_irq(void)252 static void __init gic_init_irq(void)
253 {
254 /* ARM PB-A8 on-board GIC */
255 gic_init(0, IRQ_PBA8_GIC_START,
256 __io_address(REALVIEW_PBA8_GIC_DIST_BASE),
257 __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
258 }
259
realview_pba8_timer_init(void)260 static void __init realview_pba8_timer_init(void)
261 {
262 timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
263 timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
264 timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
265 timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
266
267 realview_timer_init(IRQ_PBA8_TIMER0_1);
268 }
269
270 static struct sys_timer realview_pba8_timer = {
271 .init = realview_pba8_timer_init,
272 };
273
realview_pba8_reset(char mode)274 static void realview_pba8_reset(char mode)
275 {
276 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
277 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
278
279 /*
280 * To reset, we hit the on-board reset register
281 * in the system FPGA
282 */
283 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
284 __raw_writel(0x0000, reset_ctrl);
285 __raw_writel(0x0004, reset_ctrl);
286 }
287
realview_pba8_init(void)288 static void __init realview_pba8_init(void)
289 {
290 int i;
291
292 realview_flash_register(realview_pba8_flash_resource,
293 ARRAY_SIZE(realview_pba8_flash_resource));
294 realview_eth_register(NULL, realview_pba8_smsc911x_resources);
295 platform_device_register(&realview_i2c_device);
296 platform_device_register(&realview_cf_device);
297 realview_usb_register(realview_pba8_isp1761_resources);
298 platform_device_register(&pmu_device);
299
300 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
301 struct amba_device *d = amba_devs[i];
302 amba_device_register(d, &iomem_resource);
303 }
304
305 #ifdef CONFIG_LEDS
306 leds_event = realview_leds_event;
307 #endif
308 realview_reset = realview_pba8_reset;
309 }
310
311 MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
312 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
313 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
314 .fixup = realview_fixup,
315 .map_io = realview_pba8_map_io,
316 .init_early = realview_init_early,
317 .init_irq = gic_init_irq,
318 .timer = &realview_pba8_timer,
319 .init_machine = realview_pba8_init,
320 MACHINE_END
321