1 /*
2 * linux/arch/arm/mach-at91/board-cap9adk.c
3 *
4 * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
5 * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
6 * Copyright (C) 2005 SAN People
7 * Copyright (C) 2007 Atmel Corporation.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
23
24 #include <linux/types.h>
25 #include <linux/init.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
29 #include <linux/spi/spi.h>
30 #include <linux/spi/ads7846.h>
31 #include <linux/fb.h>
32 #include <linux/mtd/physmap.h>
33
34 #include <video/atmel_lcdc.h>
35
36 #include <mach/hardware.h>
37 #include <asm/setup.h>
38 #include <asm/mach-types.h>
39
40 #include <asm/mach/arch.h>
41 #include <asm/mach/map.h>
42
43 #include <mach/board.h>
44 #include <mach/gpio.h>
45 #include <mach/at91cap9_matrix.h>
46 #include <mach/at91sam9_smc.h>
47
48 #include "sam9_smc.h"
49 #include "generic.h"
50
51
cap9adk_map_io(void)52 static void __init cap9adk_map_io(void)
53 {
54 /* Initialize processor: 12 MHz crystal */
55 at91cap9_initialize(12000000);
56
57 /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
58 at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
59 /* ... POWER LED always on */
60 at91_set_gpio_output(AT91_PIN_PC29, 1);
61
62 /* Setup the serial ports and console */
63 at91_register_uart(0, 0, 0); /* DBGU = ttyS0 */
64 at91_set_serial_console(0);
65 }
66
cap9adk_init_irq(void)67 static void __init cap9adk_init_irq(void)
68 {
69 at91cap9_init_interrupts(NULL);
70 }
71
72
73 /*
74 * USB Host port
75 */
76 static struct at91_usbh_data __initdata cap9adk_usbh_data = {
77 .ports = 2,
78 };
79
80 /*
81 * USB HS Device port
82 */
83 static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
84 .vbus_pin = AT91_PIN_PB31,
85 };
86
87 /*
88 * ADS7846 Touchscreen
89 */
90 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
ads7843_pendown_state(void)91 static int ads7843_pendown_state(void)
92 {
93 return !at91_get_gpio_value(AT91_PIN_PC4); /* Touchscreen PENIRQ */
94 }
95
96 static struct ads7846_platform_data ads_info = {
97 .model = 7843,
98 .x_min = 150,
99 .x_max = 3830,
100 .y_min = 190,
101 .y_max = 3830,
102 .vref_delay_usecs = 100,
103 .x_plate_ohms = 450,
104 .y_plate_ohms = 250,
105 .pressure_max = 15000,
106 .debounce_max = 1,
107 .debounce_rep = 0,
108 .debounce_tol = (~0),
109 .get_pendown_state = ads7843_pendown_state,
110 };
111
cap9adk_add_device_ts(void)112 static void __init cap9adk_add_device_ts(void)
113 {
114 at91_set_gpio_input(AT91_PIN_PC4, 1); /* Touchscreen PENIRQ */
115 at91_set_gpio_input(AT91_PIN_PC5, 1); /* Touchscreen BUSY */
116 }
117 #else
cap9adk_add_device_ts(void)118 static void __init cap9adk_add_device_ts(void) {}
119 #endif
120
121
122 /*
123 * SPI devices.
124 */
125 static struct spi_board_info cap9adk_spi_devices[] = {
126 #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
127 { /* DataFlash card */
128 .modalias = "mtd_dataflash",
129 .chip_select = 0,
130 .max_speed_hz = 15 * 1000 * 1000,
131 .bus_num = 0,
132 },
133 #endif
134 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
135 {
136 .modalias = "ads7846",
137 .chip_select = 3, /* can be 2 or 3, depending on J2 jumper */
138 .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
139 .bus_num = 0,
140 .platform_data = &ads_info,
141 .irq = AT91_PIN_PC4,
142 },
143 #endif
144 };
145
146
147 /*
148 * MCI (SD/MMC)
149 */
150 static struct at91_mmc_data __initdata cap9adk_mmc_data = {
151 .wire4 = 1,
152 // .det_pin = ... not connected
153 // .wp_pin = ... not connected
154 // .vcc_pin = ... not connected
155 };
156
157
158 /*
159 * MACB Ethernet device
160 */
161 static struct at91_eth_data __initdata cap9adk_macb_data = {
162 .is_rmii = 1,
163 };
164
165
166 /*
167 * NAND flash
168 */
169 static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
170 {
171 .name = "NAND partition",
172 .offset = 0,
173 .size = MTDPART_SIZ_FULL,
174 },
175 };
176
nand_partitions(int size,int * num_partitions)177 static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
178 {
179 *num_partitions = ARRAY_SIZE(cap9adk_nand_partitions);
180 return cap9adk_nand_partitions;
181 }
182
183 static struct atmel_nand_data __initdata cap9adk_nand_data = {
184 .ale = 21,
185 .cle = 22,
186 // .det_pin = ... not connected
187 // .rdy_pin = ... not connected
188 .enable_pin = AT91_PIN_PD15,
189 .partition_info = nand_partitions,
190 #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
191 .bus_width_16 = 1,
192 #else
193 .bus_width_16 = 0,
194 #endif
195 };
196
197 static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
198 .ncs_read_setup = 1,
199 .nrd_setup = 2,
200 .ncs_write_setup = 1,
201 .nwe_setup = 2,
202
203 .ncs_read_pulse = 6,
204 .nrd_pulse = 4,
205 .ncs_write_pulse = 6,
206 .nwe_pulse = 4,
207
208 .read_cycle = 8,
209 .write_cycle = 8,
210
211 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
212 .tdf_cycles = 1,
213 };
214
cap9adk_add_device_nand(void)215 static void __init cap9adk_add_device_nand(void)
216 {
217 unsigned long csa;
218
219 csa = at91_sys_read(AT91_MATRIX_EBICSA);
220 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
221
222 /* setup bus-width (8 or 16) */
223 if (cap9adk_nand_data.bus_width_16)
224 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
225 else
226 cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
227
228 /* configure chip-select 3 (NAND) */
229 sam9_smc_configure(3, &cap9adk_nand_smc_config);
230
231 at91_add_device_nand(&cap9adk_nand_data);
232 }
233
234
235 /*
236 * NOR flash
237 */
238 static struct mtd_partition cap9adk_nor_partitions[] = {
239 {
240 .name = "NOR partition",
241 .offset = 0,
242 .size = MTDPART_SIZ_FULL,
243 },
244 };
245
246 static struct physmap_flash_data cap9adk_nor_data = {
247 .width = 2,
248 .parts = cap9adk_nor_partitions,
249 .nr_parts = ARRAY_SIZE(cap9adk_nor_partitions),
250 };
251
252 #define NOR_BASE AT91_CHIPSELECT_0
253 #define NOR_SIZE SZ_8M
254
255 static struct resource nor_flash_resources[] = {
256 {
257 .start = NOR_BASE,
258 .end = NOR_BASE + NOR_SIZE - 1,
259 .flags = IORESOURCE_MEM,
260 }
261 };
262
263 static struct platform_device cap9adk_nor_flash = {
264 .name = "physmap-flash",
265 .id = 0,
266 .dev = {
267 .platform_data = &cap9adk_nor_data,
268 },
269 .resource = nor_flash_resources,
270 .num_resources = ARRAY_SIZE(nor_flash_resources),
271 };
272
273 static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
274 .ncs_read_setup = 2,
275 .nrd_setup = 4,
276 .ncs_write_setup = 2,
277 .nwe_setup = 4,
278
279 .ncs_read_pulse = 10,
280 .nrd_pulse = 8,
281 .ncs_write_pulse = 10,
282 .nwe_pulse = 8,
283
284 .read_cycle = 16,
285 .write_cycle = 16,
286
287 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
288 .tdf_cycles = 1,
289 };
290
cap9adk_add_device_nor(void)291 static __init void cap9adk_add_device_nor(void)
292 {
293 unsigned long csa;
294
295 csa = at91_sys_read(AT91_MATRIX_EBICSA);
296 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
297
298 /* configure chip-select 0 (NOR) */
299 sam9_smc_configure(0, &cap9adk_nor_smc_config);
300
301 platform_device_register(&cap9adk_nor_flash);
302 }
303
304
305 /*
306 * LCD Controller
307 */
308 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
309 static struct fb_videomode at91_tft_vga_modes[] = {
310 {
311 .name = "TX09D50VM1CCA @ 60",
312 .refresh = 60,
313 .xres = 240, .yres = 320,
314 .pixclock = KHZ2PICOS(4965),
315
316 .left_margin = 1, .right_margin = 33,
317 .upper_margin = 1, .lower_margin = 0,
318 .hsync_len = 5, .vsync_len = 1,
319
320 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
321 .vmode = FB_VMODE_NONINTERLACED,
322 },
323 };
324
325 static struct fb_monspecs at91fb_default_monspecs = {
326 .manufacturer = "HIT",
327 .monitor = "TX09D70VM1CCA",
328
329 .modedb = at91_tft_vga_modes,
330 .modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
331 .hfmin = 15000,
332 .hfmax = 64000,
333 .vfmin = 50,
334 .vfmax = 150,
335 };
336
337 #define AT91CAP9_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
338 | ATMEL_LCDC_DISTYPE_TFT \
339 | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
340
at91_lcdc_power_control(int on)341 static void at91_lcdc_power_control(int on)
342 {
343 if (on)
344 at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */
345 else
346 at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */
347 }
348
349 /* Driver datas */
350 static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = {
351 .default_bpp = 16,
352 .default_dmacon = ATMEL_LCDC_DMAEN,
353 .default_lcdcon2 = AT91CAP9_DEFAULT_LCDCON2,
354 .default_monspecs = &at91fb_default_monspecs,
355 .atmel_lcdfb_power_control = at91_lcdc_power_control,
356 .guard_time = 1,
357 };
358
359 #else
360 static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
361 #endif
362
363
364 /*
365 * AC97
366 */
367 static struct ac97c_platform_data cap9adk_ac97_data = {
368 // .reset_pin = ... not connected
369 };
370
371
cap9adk_board_init(void)372 static void __init cap9adk_board_init(void)
373 {
374 /* Serial */
375 at91_add_device_serial();
376 /* USB Host */
377 at91_add_device_usbh(&cap9adk_usbh_data);
378 /* USB HS */
379 at91_add_device_usba(&cap9adk_usba_udc_data);
380 /* SPI */
381 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
382 /* Touchscreen */
383 cap9adk_add_device_ts();
384 /* MMC */
385 at91_add_device_mmc(1, &cap9adk_mmc_data);
386 /* Ethernet */
387 at91_add_device_eth(&cap9adk_macb_data);
388 /* NAND */
389 cap9adk_add_device_nand();
390 /* NOR Flash */
391 cap9adk_add_device_nor();
392 /* I2C */
393 at91_add_device_i2c(NULL, 0);
394 /* LCD Controller */
395 at91_add_device_lcdc(&cap9adk_lcdc_data);
396 /* AC97 */
397 at91_add_device_ac97(&cap9adk_ac97_data);
398 }
399
400 MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
401 /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
402 .boot_params = AT91_SDRAM_BASE + 0x100,
403 .timer = &at91sam926x_timer,
404 .map_io = cap9adk_map_io,
405 .init_irq = cap9adk_init_irq,
406 .init_machine = cap9adk_board_init,
407 MACHINE_END
408