1CE4100 Device Tree Bindings
2---------------------------
3
4The CE4100 SoC uses for in core peripherals the following compatible
5format: <vendor>,<chip>-<device>.
6Many of the "generic" devices like HPET or IO APIC have the ce4100
7name in their compatible property because they first appeared in this
8SoC.
9
10The CPU node
11------------
12	cpu@0 {
13		device_type = "cpu";
14		compatible = "intel,ce4100";
15		reg = <0>;
16		lapic = <&lapic0>;
17	};
18
19The reg property describes the CPU number. The lapic property points to
20the local APIC timer.
21
22The SoC node
23------------
24
25This node describes the in-core peripherals. Required property:
26  compatible = "intel,ce4100-cp";
27
28The PCI node
29------------
30This node describes the PCI bus on the SoC. Its property should be
31  compatible = "intel,ce4100-pci", "pci";
32
33If the OS is using the IO-APIC for interrupt routing then the reported
34interrupt numbers for devices is no longer true. In order to obtain the
35correct interrupt number, the child node which represents the device has
36to contain the interrupt property. Besides the interrupt property it has
37to contain at least the reg property containing the PCI bus address and
38compatible property according to "PCI Bus Binding Revision 2.1".
39