1 /* 2 * Hardware info common to DECstation 5000/1xx systems (otherwise 3 * known as 3min or kn02ba) and Personal DECstations 5000/xx ones 4 * (otherwise known as maxine or kn02ca). 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 * 10 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 11 * are by courtesy of Chris Fraser. 12 * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki 13 * 14 * These are addresses which have to be known early in the boot process. 15 * For other addresses refer to tc.h, ioasic_addrs.h and friends. 16 */ 17 #ifndef __ASM_MIPS_DEC_KN02XA_H 18 #define __ASM_MIPS_DEC_KN02XA_H 19 20 #include <asm/addrspace.h> 21 #include <asm/dec/ioasic_addrs.h> 22 23 #define KN02XA_SLOT_BASE KSEG1ADDR(0x1c000000) 24 25 /* 26 * Some port addresses... 27 */ 28 #define KN02XA_IOASIC_BASE (KN02XA_SLOT_BASE + IOASIC_IOCTL) /* I/O ASIC */ 29 #define KN02XA_RTC_BASE (KN02XA_SLOT_BASE + IOASIC_TOY) /* RTC */ 30 31 32 /* 33 * Memory control ASIC registers. 34 */ 35 #define KN02XA_MER KSEG1ADDR(0x0c400000) /* memory error register */ 36 #define KN02XA_MSR KSEG1ADDR(0x0c800000) /* memory size register */ 37 38 /* 39 * CPU control ASIC registers. 40 */ 41 #define KN02XA_MEM_CONF KSEG1ADDR(0x0e000000) /* write timeout config */ 42 #define KN02XA_EAR KSEG1ADDR(0x0e000004) /* error address register */ 43 #define KN02XA_BOOT0 KSEG1ADDR(0x0e000008) /* boot 0 register */ 44 #define KN02XA_MEM_INTR KSEG1ADDR(0x0e00000c) /* write err IRQ stat & ack */ 45 46 /* 47 * Memory Error Register bits, common definitions. 48 * The rest is defined in system-specific headers. 49 */ 50 #define KN02XA_MER_RES_28 (0xf<<28) /* unused */ 51 #define KN02XA_MER_RES_17 (0x3ff<<17) /* unused */ 52 #define KN02XA_MER_PAGERR (1<<16) /* 2k page boundary error */ 53 #define KN02XA_MER_TRANSERR (1<<15) /* transfer length error */ 54 #define KN02XA_MER_PARDIS (1<<14) /* parity error disable */ 55 #define KN02XA_MER_RES_12 (0x3<<12) /* unused */ 56 #define KN02XA_MER_BYTERR (0xf<<8) /* byte lane error bitmask */ 57 #define KN02XA_MER_RES_0 (0xff<<0) /* unused */ 58 59 /* 60 * Memory Size Register bits, common definitions. 61 * The rest is defined in system-specific headers. 62 */ 63 #define KN02XA_MSR_RES_27 (0x1f<<27) /* unused */ 64 #define KN02XA_MSR_RES_14 (0x7<<14) /* unused */ 65 #define KN02XA_MSR_SIZE (1<<13) /* 16M/4M stride */ 66 #define KN02XA_MSR_RES_0 (0x1fff<<0) /* unused */ 67 68 /* 69 * Error Address Register bits. 70 */ 71 #define KN02XA_EAR_RES_29 (0x7<<29) /* unused */ 72 #define KN02XA_EAR_ADDRESS (0x7ffffff<<2) /* address involved */ 73 #define KN02XA_EAR_RES_0 (0x3<<0) /* unused */ 74 75 #endif /* __ASM_MIPS_DEC_KN02XA_H */ 76