1 /*
2  * FILE NAME
3  *	include/asm-mips/vr41xx/tb0229.h
4  *
5  * BRIEF MODULE DESCRIPTION
6  *	Include file for TANBAC TB0229 and TB0219.
7  *
8  * Copyright 2002,2003 Yoichi Yuasa
9  *                yuasa@hh.iij4u.or.jp
10  *
11  * Modified for TANBAC TB0229:
12  * Copyright 2003 Megasolution Inc.
13  *                matsu@megasolution.jp
14  *
15  *  This program is free software; you can redistribute it and/or modify it
16  *  under the terms of the GNU General Public License as published by the
17  *  Free Software Foundation; either version 2 of the License, or (at your
18  *  option) any later version.
19  */
20 #ifndef __TANBAC_TB0229_H
21 #define __TANBAC_TB0229_H
22 
23 #include <asm/addrspace.h>
24 #include <asm/vr41xx/vr41xx.h>
25 
26 /*
27  * Board specific address mapping
28  */
29 #define VR41XX_PCI_MEM1_BASE		0x10000000
30 #define VR41XX_PCI_MEM1_SIZE		0x04000000
31 #define VR41XX_PCI_MEM1_MASK		0x7c000000
32 
33 #define VR41XX_PCI_MEM2_BASE		0x14000000
34 #define VR41XX_PCI_MEM2_SIZE		0x02000000
35 #define VR41XX_PCI_MEM2_MASK		0x7e000000
36 
37 #define VR41XX_PCI_IO_BASE		0x16000000
38 #define VR41XX_PCI_IO_SIZE		0x02000000
39 #define VR41XX_PCI_IO_MASK		0x7e000000
40 
41 #define VR41XX_PCI_IO_START		0x01000000
42 #define VR41XX_PCI_IO_END		0x01ffffff
43 
44 #define VR41XX_PCI_MEM_START		0x12000000
45 #define VR41XX_PCI_MEM_END		0x15ffffff
46 
47 #define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
48 #define IO_PORT_RESOURCE_START		0
49 #define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
50 #define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
51 #define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
52 #define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
53 #define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
54 
55 /*
56  * General-Purpose I/O Pin Number
57  */
58 #define TB0219_PCI_SLOT1_PIN		2
59 #define TB0219_PCI_SLOT2_PIN		3
60 #define TB0219_PCI_SLOT3_PIN		4
61 
62 /*
63  * Interrupt Number
64  */
65 #define TB0219_PCI_SLOT1_IRQ		GIU_IRQ(TB0219_PCI_SLOT1_PIN)
66 #define TB0219_PCI_SLOT2_IRQ		GIU_IRQ(TB0219_PCI_SLOT2_PIN)
67 #define TB0219_PCI_SLOT3_IRQ		GIU_IRQ(TB0219_PCI_SLOT3_PIN)
68 
69 #define TB0219_RESET_REGS		KSEG1ADDR(0x0a00000e)
70 
71 extern void tanbac_tb0219_restart(char *command);
72 
73 #endif /* __TANBAC_TB0229_H */
74