1 /*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Defines of the Malta board specific address-MAP, registers, etc.
19 */
20 #ifndef __ASM_MIPS_BOARDS_MALTA_H
21 #define __ASM_MIPS_BOARDS_MALTA_H
22
23 #include <asm/addrspace.h>
24 #include <asm/io.h>
25
26 /*
27 * Malta I/O ports base address for the Galileo GT64120 and Algorithmics
28 * Bonito system controllers.
29 */
30 #define MALTA_GT_PORT_BASE get_gt_port_base(GT_PCI0IOLD_OFS)
31 #define MALTA_BONITO_PORT_BASE (KSEG1ADDR(0x1fd00000))
32 #define MALTA_MSC_PORT_BASE get_msc_port_base(MSC01_PCI_SC2PIOBASL)
33
get_gt_port_base(unsigned long reg)34 static inline unsigned long get_gt_port_base(unsigned long reg)
35 {
36 unsigned long addr;
37 addr = GT_READ(reg);
38 return KSEG1ADDR((addr & 0xffff) << 21);
39 }
40
get_msc_port_base(unsigned long reg)41 static inline unsigned long get_msc_port_base(unsigned long reg)
42 {
43 unsigned long addr;
44 MSC_READ(reg, addr);
45 return KSEG1ADDR(addr);
46 }
47
48 /*
49 * Malta RTC-device indirect register access.
50 */
51 #define MALTA_RTC_ADR_REG 0x70
52 #define MALTA_RTC_DAT_REG 0x71
53
54 /*
55 * Malta SMSC FDC37M817 Super I/O Controller register.
56 */
57 #define SMSC_CONFIG_REG 0x3f0
58 #define SMSC_DATA_REG 0x3f1
59
60 #define SMSC_CONFIG_DEVNUM 0x7
61 #define SMSC_CONFIG_ACTIVATE 0x30
62 #define SMSC_CONFIG_ENTER 0x55
63 #define SMSC_CONFIG_EXIT 0xaa
64
65 #define SMSC_CONFIG_DEVNUM_FLOPPY 0
66
67 #define SMSC_CONFIG_ACTIVATE_ENABLE 1
68
69 #define SMSC_WRITE(x,a) outb(x,a)
70
71 #define MALTA_JMPRS_REG (KSEG1ADDR(0x1f000210))
72
73 #endif /* __ASM_MIPS_BOARDS_MALTA_H */
74