1 /*
2 File: include/asm-i386/hc_sl811-hw.h
3
4 18.11.2002 hne@ist1.de
5 Use Kernel 2.4.19 and Prepatch 2.4.20
6 Splitt hardware depenc into file hc_sl811-x86.c and hc_sl811-arm.c.
7
8 20.11.2002 HNE
9 READ/WRITE_(INDEX_)DATA using for fast hardware access.
10
11 02.09.2003 HNE
12 IO Region size only 2 (old 16)
13
14 18.09.2003 HNE
15 Handle multi instances. For two controller on one board.
16 Portcheck in low level source (DEBUG) only.
17
18 03.10.2003 HNE
19 Low level only for port io into hardware-include.
20
21 */
22
23 #ifdef MODULE
24
25 #define MAX_CONTROLERS 2 /* Max number of SL811 controllers per module */
26 static int io_base = 0x220;
27 static int irq = 12;
28
29 MODULE_PARM(io_base,"i");
30 MODULE_PARM_DESC(io_base,"sl811 base address 0x220");
31 MODULE_PARM(irq,"i");
32 MODULE_PARM_DESC(irq,"IRQ 12 (default)");
33
34 #endif // MODULE
35
36 /* Define general IO Macros for our platform (hne) */
37 #define SIZEOF_IO_REGION 2 /* Size for request/release region */
38
39 // #define sl811_write_index(hp,i) outb ((i), hp->hcport)
40 // #define sl811_write_data(hp,d) outb ((d), hp->hcport+1)
41 // #define sl811_write_index_data(hp,i,d) outw ((i)|(((__u16)(d)) << 8), hp->hcport)
42 // #define sl811_read_data(hp) ((__u8) inb (hp->hcport+1))
43
44 /*
45 * Low level: Read from Data port [x86]
46 */
sl811_read_data(hcipriv_t * hp)47 static __u8 inline sl811_read_data (hcipriv_t *hp)
48 {
49 return ((__u8) inb (hp->hcport+1));
50 }
51
52 /*
53 * Low level: Write to index register [x86]
54 */
sl811_write_index(hcipriv_t * hp,__u8 index)55 static void inline sl811_write_index (hcipriv_t *hp, __u8 index)
56 {
57 outb (index, hp->hcport);
58 }
59
60 /*
61 * Low level: Write to Data port [x86]
62 */
sl811_write_data(hcipriv_t * hp,__u8 data)63 static void inline sl811_write_data (hcipriv_t *hp, __u8 data)
64 {
65 outb (data, hp->hcport+1);
66 }
67
68 /*
69 * Low level: Write to index register and data port [x86]
70 */
sl811_write_index_data(hcipriv_t * hp,__u8 index,__u8 data)71 static void inline sl811_write_index_data (hcipriv_t *hp, __u8 index, __u8 data)
72 {
73 outw (index|(((__u16)data) << 8), hp->hcport);
74 }
75
76 /*****************************************************************
77 *
78 * Function Name: init_irq [x86]
79 *
80 * This function is board specific. It sets up the interrupt to
81 * be an edge trigger and trigger on the rising edge
82 *
83 * Input: none
84 *
85 * Return value : none
86 *
87 *****************************************************************/
init_irq(void)88 static void inline init_irq (void)
89 {
90 /* nothing */
91 }
92
93 /*****************************************************************
94 *
95 * Function Name: release_regions [x86]
96 *
97 * This function is board specific. It frees all io address.
98 *
99 * Input: hcipriv_t *
100 *
101 * Return value : none
102 *
103 *****************************************************************/
sl811_release_regions(hcipriv_t * hp)104 static void inline sl811_release_regions (hcipriv_t *hp)
105 {
106 DBGFUNC ("Enter release_regions\n");
107 if (hp->hcport > 0) {
108 release_region (hp->hcport, SIZEOF_IO_REGION);
109 hp->hcport = 0;
110 }
111
112 /* hcport2 unused for x86 */
113 }
114
115 /*****************************************************************
116 *
117 * Function Name: request_regions [x86]
118 *
119 * This function is board specific. It request all io address and
120 * maps into memory (if can).
121 *
122 * Input: hcipriv_t *
123 *
124 * Return value : 0 = OK
125 *
126 *****************************************************************/
sl811_request_regions(hcipriv_t * hp,int base1,int base2)127 static int inline sl811_request_regions (hcipriv_t *hp, int base1, int base2)
128 {
129 DBGFUNC ("Enter request_regions\n");
130 if (!request_region (base1, SIZEOF_IO_REGION, "SL811")) {
131 DBGERR ("request address 0x%X %d failed\n", base1, SIZEOF_IO_REGION);
132 return -EBUSY;
133 }
134 hp->hcport = base1;
135
136 /* hcport2 unused for x86 */
137 return 0;
138 }
139
140