1 /*
2  *  linux/include/asm-arm/arch-rpc/irq.h
3  *
4  *  Copyright (C) 1996 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  *  Changelog:
11  *   10-10-1996	RMK	Brought up to date with arch-sa110eval
12  *   22-08-1998	RMK	Restructured IRQ routines
13  */
14 #include <asm/hardware/iomd.h>
15 #include <asm/io.h>
16 
17 #define fixup_irq(x) (x)
18 
rpc_mask_irq_ack_a(unsigned int irq)19 static void rpc_mask_irq_ack_a(unsigned int irq)
20 {
21 	unsigned int val, mask;
22 
23 	mask = 1 << irq;
24 	val = iomd_readb(IOMD_IRQMASKA);
25 	iomd_writeb(val & ~mask, IOMD_IRQMASKA);
26 	iomd_writeb(mask, IOMD_IRQCLRA);
27 }
28 
rpc_mask_irq_a(unsigned int irq)29 static void rpc_mask_irq_a(unsigned int irq)
30 {
31 	unsigned int val, mask;
32 
33 	mask = 1 << irq;
34 	val = iomd_readb(IOMD_IRQMASKA);
35 	iomd_writeb(val & ~mask, IOMD_IRQMASKA);
36 }
37 
rpc_unmask_irq_a(unsigned int irq)38 static void rpc_unmask_irq_a(unsigned int irq)
39 {
40 	unsigned int val, mask;
41 
42 	mask = 1 << irq;
43 	val = iomd_readb(IOMD_IRQMASKA);
44 	iomd_writeb(val | mask, IOMD_IRQMASKA);
45 }
46 
rpc_mask_irq_b(unsigned int irq)47 static void rpc_mask_irq_b(unsigned int irq)
48 {
49 	unsigned int val, mask;
50 
51 	mask = 1 << (irq & 7);
52 	val = iomd_readb(IOMD_IRQMASKB);
53 	iomd_writeb(val & ~mask, IOMD_IRQMASKB);
54 }
55 
rpc_unmask_irq_b(unsigned int irq)56 static void rpc_unmask_irq_b(unsigned int irq)
57 {
58 	unsigned int val, mask;
59 
60 	mask = 1 << (irq & 7);
61 	val = iomd_readb(IOMD_IRQMASKB);
62 	iomd_writeb(val | mask, IOMD_IRQMASKB);
63 }
64 
65 
66 
rpc_mask_irq_c(unsigned int irq)67 static void rpc_mask_irq_c(unsigned int irq)
68 {
69 	unsigned int val, mask;
70 
71 	mask = 1 << (irq & 7);
72 	val = iomd_readb(IOMD_IRQMASKC);
73 	iomd_writeb(val & ~mask, IOMD_IRQMASKC);
74 }
75 
rpc_unmask_irq_c(unsigned int irq)76 static void rpc_unmask_irq_c(unsigned int irq)
77 {
78 	unsigned int val, mask;
79 
80 	mask = 1 << (irq & 7);
81 	val = iomd_readb(IOMD_IRQMASKC);
82 	iomd_writeb(val | mask, IOMD_IRQMASKC);
83 }
84 
rpc_mask_irq_d(unsigned int irq)85 static void rpc_mask_irq_d(unsigned int irq)
86 {
87 	unsigned int val, mask;
88 
89 	mask = 1 << (irq & 7);
90 	val = iomd_readb(IOMD_IRQMASKD);
91 	iomd_writeb(val & ~mask, IOMD_IRQMASKD);
92 }
93 
rpc_unmask_irq_d(unsigned int irq)94 static void rpc_unmask_irq_d(unsigned int irq)
95 {
96 	unsigned int val, mask;
97 
98 	mask = 1 << (irq & 7);
99 	val = iomd_readb(IOMD_IRQMASKD);
100 	iomd_writeb(val | mask, IOMD_IRQMASKD);
101 }
102 
rpc_mask_irq_dma(unsigned int irq)103 static void rpc_mask_irq_dma(unsigned int irq)
104 {
105 	unsigned int val, mask;
106 
107 	mask = 1 << (irq & 7);
108 	val = iomd_readb(IOMD_DMAMASK);
109 	iomd_writeb(val & ~mask, IOMD_DMAMASK);
110 }
111 
rpc_unmask_irq_dma(unsigned int irq)112 static void rpc_unmask_irq_dma(unsigned int irq)
113 {
114 	unsigned int val, mask;
115 
116 	mask = 1 << (irq & 7);
117 	val = iomd_readb(IOMD_DMAMASK);
118 	iomd_writeb(val | mask, IOMD_DMAMASK);
119 }
120 
rpc_mask_irq_fiq(unsigned int irq)121 static void rpc_mask_irq_fiq(unsigned int irq)
122 {
123 	unsigned int val, mask;
124 
125 	mask = 1 << (irq & 7);
126 	val = iomd_readb(IOMD_FIQMASK);
127 	iomd_writeb(val & ~mask, IOMD_FIQMASK);
128 }
129 
rpc_unmask_irq_fiq(unsigned int irq)130 static void rpc_unmask_irq_fiq(unsigned int irq)
131 {
132 	unsigned int val, mask;
133 
134 	mask = 1 << (irq & 7);
135 	val = iomd_readb(IOMD_FIQMASK);
136 	iomd_writeb(val | mask, IOMD_FIQMASK);
137 }
138 
irq_init_irq(void)139 static __inline__ void irq_init_irq(void)
140 {
141 	int irq;
142 
143 	iomd_writeb(0, IOMD_IRQMASKA);
144 	iomd_writeb(0, IOMD_IRQMASKB);
145 	iomd_writeb(0, IOMD_IRQMASKC);
146 	iomd_writeb(0, IOMD_IRQMASKD);
147 
148 	iomd_writeb(0xff, IOMD_IOLINES);
149 
150 	iomd_writeb(0, IOMD_FIQMASK);
151 	iomd_writeb(0, IOMD_DMAMASK);
152 
153 	for (irq = 0; irq < NR_IRQS; irq++) {
154 		switch (irq) {
155 		case 0 ... 6:
156 			irq_desc[irq].probe_ok = 1;
157 		case 7:
158 			irq_desc[irq].valid    = 1;
159 			irq_desc[irq].mask_ack = rpc_mask_irq_ack_a;
160 			irq_desc[irq].mask     = rpc_mask_irq_a;
161 			irq_desc[irq].unmask   = rpc_unmask_irq_a;
162 			break;
163 
164 		case 9 ... 15:
165 			irq_desc[irq].probe_ok = 1;
166 		case 8:
167 			irq_desc[irq].valid    = 1;
168 			irq_desc[irq].mask_ack = rpc_mask_irq_b;
169 			irq_desc[irq].mask     = rpc_mask_irq_b;
170 			irq_desc[irq].unmask   = rpc_unmask_irq_b;
171 			break;
172 
173 		case 16 ... 19:
174 		case 21:
175 			irq_desc[irq].noautoenable = 1;
176 		case 20:
177 			irq_desc[irq].valid    = 1;
178 			irq_desc[irq].mask_ack = rpc_mask_irq_dma;
179 			irq_desc[irq].mask     = rpc_mask_irq_dma;
180 			irq_desc[irq].unmask   = rpc_unmask_irq_dma;
181 			break;
182 
183 		case 24 ... 31:
184 		        irq_desc[irq].valid     = 1;
185 			irq_desc[irq].mask_ack  = rpc_mask_irq_c;
186 			irq_desc[irq].mask 	= rpc_mask_irq_c;
187 			irq_desc[irq].unmask	= rpc_unmask_irq_c;
188 			break;
189 
190 		case 40 ... 47:
191 		        irq_desc[irq].valid     = 1;
192 			irq_desc[irq].mask_ack  = rpc_mask_irq_d;
193 			irq_desc[irq].mask 	= rpc_mask_irq_d;
194 			irq_desc[irq].unmask	= rpc_unmask_irq_d;
195 			break;
196 
197 		case 64 ... 71:
198 			irq_desc[irq].valid    = 1;
199 			irq_desc[irq].mask_ack = rpc_mask_irq_fiq;
200 			irq_desc[irq].mask     = rpc_mask_irq_fiq;
201 			irq_desc[irq].unmask   = rpc_unmask_irq_fiq;
202 			break;
203 		}
204 	}
205 
206 	irq_desc[IRQ_KEYBOARDTX].noautoenable = 1;
207 
208 	init_FIQ();
209 }
210