1 /* 2 * linux/include/asm-arm/arch-epxa10/hardware.h 3 * 4 * This file contains the hardware definitions of the Integrator. 5 * 6 * Copyright (C) 1999 ARM Limited. 7 * Copyright (C) 2001 Altera Corporation 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23 #ifndef __ASM_ARCH_HARDWARE_H 24 #define __ASM_ARCH_HARDWARE_H 25 26 #include <asm/arch/platform.h> 27 28 /* 29 * Where in virtual memory the IO devices (timers, system controllers 30 * and so on) 31 */ 32 #define IO_BASE 0xf0000000 // VA of IO 33 #define IO_SIZE 0x10000000 // How much? 34 #define IO_START EXC_REGISTERS_BASE // PA of IO 35 /* macro to get at IO space when running virtually */ 36 #define IO_ADDRESS(x) ((x) | 0xf0000000) 37 38 #define FLASH_VBASE 0xFE000000 39 #ifdef CONFIG_EPXA10DB 40 #define FLASH_SIZE 0x01000000 41 #else 42 #define FLASH_SIZE 0x00800000 43 #endif 44 #define FLASH_START EXC_EBI_BLOCK0_BASE 45 #define FLASH_VADDR(x) ((x)|0xFE000000) 46 /* 47 * Similar to above, but for PCI addresses (memory, IO, Config and the 48 * V3 chip itself). WARNING: this has to mirror definitions in platform.h 49 */ 50 #if 0 51 #define PCI_MEMORY_VADDR 0xe8000000 52 #define PCI_CONFIG_VADDR 0xec000000 53 #define PCI_V3_VADDR 0xed000000 54 #define PCI_IO_VADDR 0xee000000 55 56 #define PCIO_BASE PCI_IO_VADDR 57 #define PCIMEM_BASE PCI_MEMORY_VADDR 58 59 60 #define pcibios_assign_all_busses() 1 61 62 #define PCIBIOS_MIN_IO 0x6000 63 #define PCIBIOS_MIN_MEM 0x00100000 64 #endif 65 66 67 #endif 68 69