1 /*
2 * linux/drivers/video/sstfb.c -- voodoo graphics frame buffer
3 *
4 * Copyright (c) 2000-2002 Ghozlane Toumi <gtoumi@laposte.net>
5 *
6 * Created 15 Jan 2000 by Ghozlane Toumi
7 *
8 * Contributions (and many thanks) :
9 *
10 * 03/2001 James Simmons <jsimmons@linux-fbdev.org>
11 * 04/2001 Paul Mundt <lethal@chaoticdreams.org>
12 * 05/2001 Urs Ganse <ursg@uni.de>
13 * (initial work on voodoo2 port, interlace)
14 * 09/2002 Helge Deller <deller@gmx.de>
15 * (enable driver on big-endian machines (hppa), ioctl fixes)
16 *
17 *
18 * $Id: sstfb.c,v 1.26.4.1 2001/08/29 01:30:37 ghoz Exp $
19 */
20
21 /*
22 * The voodoo1 has the following memory mapped adress space:
23 * 0x000000 - 0x3fffff : registers (4Mb)
24 * 0x400000 - 0x7fffff : linear frame buffer (4Mb)
25 * 0x800000 - 0xffffff : texture memory (8Mb)
26 */
27
28 /*
29 * misc notes, TODOs, toASKs, and deep thoughts
30
31 -TODO: at one time or another test that the mode is acceptable by the monitor
32 -ASK: I can choose different ordering for the color bitfields (rgba argb ...)
33 wich one should i use ? is there any preferred one ? It seems ARGB is
34 the one ...
35 -TODO: check the error paths . if something get wrong, the error doesn't seem
36 to be very well handled...if handled at all.. not good.
37 -TODO: in set_var check the validity of timings (hsync vsync)...
38 -TODO: check and recheck the use of sst_wait_idle : we dont flush the fifo via
39 a nop command . so it's ok as long as the commands we pass don't go
40 through the fifo. warning: issuing a nop command seems to need pci_fifo
41 -FIXME: in case of failure in the init sequence, be sure we return to a safe
42 state.
43 -FIXME: 4MB boards have banked memory (FbiInit2 bits 1 & 20)
44 -ASK: I stole "inverse" but seems it doesn't work... check what it realy does...
45 -TODO: change struct sst_info fb_info from static to array/dynamic
46
47 *
48 */
49
50 /*
51 * debug info
52 * SST_DEBUG : enable debugging
53 * SST_DEBUG_REG : debug registers
54 * 0 : no debug
55 * 1 : dac calls, [un]set_bits, FbiInit
56 * 2 : insane debug level (log every register read/write)
57 * SST_DEBUG_FUNC : functions
58 * 0 : no debug
59 * 1 : function call / debug ioctl
60 * 2 : variables
61 * 3 : flood . you don't want to do that. trust me.
62 * SST_DEBUG_VAR : debug display/var structs
63 * 0 : no debug
64 * 1 : dumps display, fb_var
65 * SST_DEBUG_IOCTL : enable sstfb specific ioctls
66 * 0 : disable
67 * 1 : enable debug ioctls :
68 * toggle vga (0x46db) : toggle vga_pass_through
69 * fill fb (0x46dc) : fills fb
70 * dump var (0x46dd) : logs display[0-5].var
71 * test disp (0x46de) : draws a test motif
72 */
73
74 /* #define SST_DEBUG */
75 #undef SST_DEBUG
76
77 #define SST_DEBUG_REG 0
78 #define SST_DEBUG_FUNC 0
79 #define SST_DEBUG_VAR 0
80 #define SST_DEBUG_IOCTL 1
81
82 /* #define EN_24_32_BPP *//* enable 24/32 bpp functions for testing only */
83 #undef EN_24_32_BPP
84
85 /*
86 Default video mode .
87 0 800x600@60 took from glide
88 1 640x480@75 took from glide
89 2 1024x768@76 std fb.mode
90 3 640x480@60 glide default */
91 #define DEFAULT_MODE 1
92 /*
93 * Includes
94 */
95
96 #include <linux/string.h>
97 #include <linux/config.h>
98 #include <linux/kernel.h>
99 #include <linux/module.h>
100 #include <linux/tty.h>
101 #include <linux/fb.h>
102 #include <linux/pci.h>
103 #include <linux/delay.h>
104 #include <linux/init.h>
105 #include <linux/version.h>
106 #include <linux/slab.h>
107
108 #include <asm/io.h>
109 #include <asm/ioctl.h>
110 #include <asm/uaccess.h>
111
112 #include <video/fbcon.h>
113 #include <video/fbcon-cfb16.h>
114 #ifdef EN_24_32_BPP
115 # include <video/fbcon-cfb24.h>
116 # include <video/fbcon-cfb32.h>
117 #endif
118
119 #include "sstfb.h"
120
121 /* void __Dump_regs(struct sstfb_info *);
122 #define Dump_regs __Dump_regs(sst_info) */
123
124 /********/
125
126
127 /* initialized by setup */
128 static int inverse; /* =0 */ /* invert colormap */
129 static int vgapass; /* =0 */ /* enable Vga passthrough cable */
130 static int mem; /* =0 */ /* mem size in Mb , 0 = autodetect */
131 static int clipping = 1; /* use clipping (slower, safer) */
132 static int gfxclk; /* =0 */ /* force FBI freq in Mhz . Dangerous */
133 static int slowpci; /* =0 */ /* slow PCI settings */
134 static int dev = -2; /* specify device (0..n) -2=all -1=none*/
135
136 static char * mode_option ;
137
138
139 /********/
140
141 int sstfb_init(void);
142 int sstfb_setup(char *options);
143 static int __devinit sstfb_probe(struct pci_dev *pdev, const struct pci_device_id *id);
144 static void __devexit sstfb_remove(struct pci_dev *pdev);
145
146
147 /* Framebuffer API */
148 static int sstfb_open(struct fb_info *info, int user);
149 static int sstfb_release(struct fb_info *info, int user);
150 static int sstfb_get_fix(struct fb_fix_screeninfo *fix,
151 int con, struct fb_info *info);
152 static int sstfb_get_var(struct fb_var_screeninfo *var,
153 int con, struct fb_info *info);
154 static int sstfb_set_var(struct fb_var_screeninfo *var,
155 int con, struct fb_info *info);
156 static int sstfb_get_cmap(struct fb_cmap *cmap, int kspc,
157 int con, struct fb_info *info);
158 static int sstfb_set_cmap(struct fb_cmap *cmap, int kspc,
159 int con, struct fb_info *info);
160 static int sstfb_pan_display(struct fb_var_screeninfo *var,
161 int con, struct fb_info *info);
162 static int sstfb_ioctl(struct inode *inode, struct file *file,
163 u_int cmd, u_long arg, int con,
164 struct fb_info *info);
165
166 /* Interface to the low level console driver */
167 static int sstfbcon_switch(int con, struct fb_info *info);
168 static int sstfbcon_updatevar(int con, struct fb_info *info);
169 static void sstfbcon_blank(int blank, struct fb_info *info);
170
171 /* Internal routines */
172 static void sstfb_install_cmap(int con, struct fb_info *info);
173 static int sstfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
174 u_int *transp, struct fb_info *info);
175 static int sstfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
176 u_int transp, struct fb_info *info);
177
178 static int sstfb_set_par(const struct sstfb_par *par,
179 struct sstfb_info *sst_info);
180 static int sstfb_decode_var (const struct fb_var_screeninfo *var,
181 struct sstfb_par *par,
182 const struct sstfb_info *sst_info);
183 static int sstfb_encode_var (struct fb_var_screeninfo *var,
184 const struct sstfb_par *par,
185 const struct sstfb_info *sst_info);
186
187 static void sstfb_test16(struct sstfb_info *sst_info);
188
189 #ifdef EN_24_32_BPP
190 static void sstfb_test32(struct sstfb_info *sst_info);
191 #endif
192
193 /* Low level routines */
194 static int sst_get_memsize(struct sstfb_info *sst_info, u_long *memsize);
195 static int __sst_wait_idle(u_long vbase);
196 #define sst_wait_idle() __sst_wait_idle(sst_info->mmio.vbase)
197 static int sst_detect_dactype(struct sstfb_info *sst_info);
198 static int sst_detect_att(struct sstfb_info *sst_info);
199 static int sst_detect_ti(struct sstfb_info *sst_info);
200 static int sst_detect_ics(struct sstfb_info *sst_info);
201 static int sst_calc_pll(const int freq, int *freq_out, struct pll_timing *t);
202 static int sst_set_pll_att_ti(struct sstfb_info *sst_info, const struct pll_timing *t, const int clock);
203 static int sst_set_pll_ics(struct sstfb_info *sst_info, const struct pll_timing *t, const int clock);
204 static void sst_set_vidmod_att_ti(struct sstfb_info *sst_info, const int bpp);
205 static void sst_set_vidmod_ics(struct sstfb_info *sst_info, const int bpp);
206 static int sst_init(struct sstfb_info *sst_info);
207 static void sst_shutdown(struct sstfb_info *sst_info);
208
209 static struct fb_ops sstfb_ops = {
210 owner : THIS_MODULE,
211 fb_open: sstfb_open,
212 fb_release: sstfb_release,
213 fb_get_fix: sstfb_get_fix,
214 fb_get_var: sstfb_get_var,
215 fb_set_var: sstfb_set_var,
216 fb_get_cmap: sstfb_get_cmap,
217 fb_set_cmap: sstfb_set_cmap,
218 fb_pan_display: sstfb_pan_display,
219 fb_ioctl: sstfb_ioctl,
220 };
221
222 enum {
223 ID_VOODOO1 = 0,
224 ID_VOODOO2 = 1,
225 };
226
227 #define IS_VOODOO2(info) ((info)->type == ID_VOODOO2 )
228
229 static struct sst_spec voodoo_spec[] __devinitdata = {
230 { name : "Voodoo Graphics",
231 default_gfx_clock : 50000,
232 max_gfxclk : 60, },
233 { name : "Voodoo2",
234 default_gfx_clock : 75000,
235 max_gfxclk : 85, },
236 };
237
238 static struct pci_device_id sstfb_id_tbl[] __devinitdata = {
239 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO,
240 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_VOODOO1 },
241 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO2,
242 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_VOODOO2 },
243 { 0 },
244 };
245
246 static struct pci_driver sstfb_driver = {
247 name: "sstfb",
248 id_table: sstfb_id_tbl,
249 probe: sstfb_probe,
250 remove: __devexit_p(sstfb_remove),
251 };
252
253 static struct fb_var_screeninfo sstfb_default =
254 #if ( DEFAULT_MODE == 0 )
255 { /* 800x600@60, 16 bpp .borowed from glide/sst1/include/sst1init.h */
256 800, 600, 800, 600, 0, 0, 16, 0,
257 {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0},
258 0, 0, -1, -1, 0,
259 25000, 86, 41, 23, 1, 127, 4,
260 0, FB_VMODE_NONINTERLACED };
261 #endif
262 #if ( DEFAULT_MODE == 1 )
263 {/* 640x480@75, 16 bpp .borowed from glide/sst1/include/sst1init.h */
264 640, 480, 640, 480, 0, 0, 16, 0,
265 {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0},
266 0, 0, -1, -1, 0,
267 31746, 118, 17, 16, 1, 63, 3,
268 0, FB_VMODE_NONINTERLACED };
269 #endif
270 #if ( DEFAULT_MODE == 2 )
271 { /* 1024x768@76 took from my /etc/fb.modes */
272 1024, 768, 1024, 768,0, 0, 16,0,
273 {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0},
274 0, 0, -1, -1, 0,
275 11764, 208, 8, 36, 16, 120, 3 ,
276 0, FB_VMODE_NONINTERLACED };
277 #endif
278 #if ( DEFAULT_MODE == 3 )
279 { /* 640x480@60 , 16bpp glide default ?*/
280 640, 480, 640, 480, 0, 0, 16, 0,
281 {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0},
282 0, 0, -1, -1, 0,
283 39721 , 38, 26 , 25 ,18 , 96 ,2,
284 0, FB_VMODE_NONINTERLACED };
285 #endif
286
287 static struct dac_switch dacs[] __devinitdata = {
288 { name: "TI TVP3409",
289 detect: sst_detect_ti,
290 set_pll: sst_set_pll_att_ti,
291 set_vidmod: sst_set_vidmod_att_ti },
292
293 { name: "AT&T ATT20C409",
294 detect: sst_detect_att,
295 set_pll: sst_set_pll_att_ti,
296 set_vidmod: sst_set_vidmod_att_ti },
297 { name: "ICS ICS5342",
298 detect: sst_detect_ics,
299 set_pll: sst_set_pll_ics,
300 set_vidmod: sst_set_vidmod_ics },
301 };
302
303
304 /*
305 *
306 * Definitions
307 *
308 */
309
310 #if (SST_DEBUG_VAR > 0)
311 /* debug info / dump a fb_var_screeninfo */
sst_dbg_print_var(struct fb_var_screeninfo * var)312 static void sst_dbg_print_var(struct fb_var_screeninfo *var) {
313 dprintk(" {%d, %d, %d, %d, %d, %d, %d, %d,\n",
314 var->xres, var->yres, var->xres_virtual, var->yres_virtual,
315 var->xoffset, var->yoffset,
316 var->bits_per_pixel, var->grayscale);
317 dprintk(" {%d, %d, %d}, {%d, %d, %d}, {%d, %d, %d}, {%d, %d, %d},\n",
318 var->red.offset, var->red.length, var->red.msb_right,
319 var->green.offset, var->green.length, var->green.msb_right,
320 var->blue.offset, var->blue.length, var->blue.msb_right,
321 var->transp.offset, var->transp.length,
322 var->transp.msb_right);
323 dprintk(" %d, %d, %d, %d, %d,\n",
324 var->nonstd, var->activate,
325 var->height, var->width, var->accel_flags);
326 dprintk(" %d, %d, %d, %d, %d, %d, %d,\n",
327 var->pixclock, var->left_margin, var->right_margin,
328 var->upper_margin, var->lower_margin,
329 var->hsync_len, var->vsync_len);
330 dprintk(" %#x, %#x}\n",var->sync, var->vmode);
331 }
332 #endif /* (SST_DEBUG_VAR > 0) */
333
334 #if (SST_DEBUG_REG > 0)
sst_dbg_print_read_reg(u32 reg,u32 val)335 static void sst_dbg_print_read_reg (u32 reg, u32 val) {
336 char * regname = NULL;
337 switch (reg) {
338 case FBIINIT0: regname="FbiInit0"; break;
339 case FBIINIT1: regname="FbiInit1"; break;
340 case FBIINIT2: regname="FbiInit2"; break;
341 case FBIINIT3: regname="FbiInit3"; break;
342 case FBIINIT4: regname="FbiInit4"; break;
343 case FBIINIT5: regname="FbiInit5"; break;
344 case FBIINIT6: regname="FbiInit6"; break;
345 }
346 if (regname == NULL)
347 r_ddprintk("sst_read(%#x): %#x\n", reg, val);
348 else
349 r_dprintk(" sst_read(%s): %#x\n", regname, val);
350 }
351
sst_dbg_print_write_reg(u32 reg,u32 val)352 static void sst_dbg_print_write_reg (u32 reg, u32 val) {
353 char * regname = NULL;
354
355 switch (reg) {
356 case FBIINIT0: regname="FbiInit0"; break;
357 case FBIINIT1: regname="FbiInit1"; break;
358 case FBIINIT2: regname="FbiInit2"; break;
359 case FBIINIT3: regname="FbiInit3"; break;
360 case FBIINIT4: regname="FbiInit4"; break;
361 case FBIINIT5: regname="FbiInit5"; break;
362 case FBIINIT6: regname="FbiInit6"; break;
363 }
364 if (regname == NULL)
365 r_ddprintk("sst_write(%#x, %#x)\n", reg, val);
366 else
367 r_dprintk(" sst_write(%s, %#x)\n", regname, val);
368 }
369 #else /* (SST_DEBUG_REG > 0) */
370 # define sst_dbg_print_read_reg(reg, val) do {} while(0)
371 # define sst_dbg_print_write_reg(reg, val) do {} while(0)
372 #endif /* (SST_DEBUG_REG > 0) */
373
374 /* register access */
375 #define sst_read(reg) __sst_read(sst_info->mmio.vbase, reg)
376 #define sst_write(reg,val) __sst_write(sst_info->mmio.vbase, reg, val)
377 #define sst_set_bits(reg,val) __sst_set_bits(sst_info->mmio.vbase, reg, val)
378 #define sst_unset_bits(reg,val) __sst_unset_bits(sst_info->mmio.vbase, reg, val)
379 #define sst_dac_read(reg) __sst_dac_read(sst_info->mmio.vbase, reg)
380 #define sst_dac_write(reg,val) __sst_dac_write(sst_info->mmio.vbase, reg, val)
381 #define dac_i_read(reg) __dac_i_read(sst_info->mmio.vbase, reg)
382 #define dac_i_write(reg,val) __dac_i_write(sst_info->mmio.vbase, reg, val)
383
__sst_read(u_long vbase,u32 reg)384 static inline u32 __sst_read(u_long vbase, u32 reg)
385 {
386 u32 ret;
387
388 ret = readl(vbase + reg);
389 sst_dbg_print_read_reg(reg, ret);
390 return ret;
391 }
392
__sst_write(u_long vbase,u32 reg,u32 val)393 static inline void __sst_write(u_long vbase, u32 reg, u32 val)
394 {
395 sst_dbg_print_write_reg(reg, val);
396 writel(val, vbase + reg);
397 }
398
__sst_set_bits(u_long vbase,u32 reg,u32 val)399 static inline void __sst_set_bits(u_long vbase, u32 reg, u32 val)
400 {
401 r_dprintk("sst_set_bits(%#x, %#x)\n", reg, val);
402 __sst_write(vbase, reg, __sst_read(vbase, reg) | val);
403 }
404
__sst_unset_bits(u_long vbase,u32 reg,u32 val)405 static inline void __sst_unset_bits(u_long vbase, u32 reg, u32 val)
406 {
407 r_dprintk("sst_unset_bits(%#x, %#x)\n", reg, val);
408 __sst_write(vbase, reg, __sst_read(vbase, reg) & ~val);
409 }
410
411 /* dac access */
412 /* dac_read should be remaped to FbiInit2 (via the pci reg init_enable) */
__sst_dac_read(u_long vbase,u8 reg)413 static u8 __sst_dac_read(u_long vbase, u8 reg)
414 {
415 u8 ret;
416
417 #ifdef SST_DEBUG
418 if ((reg & 0x07) != reg) {
419 dprintk("bug line %d: register adress '%d' is too high\n",
420 __LINE__,reg);
421 }
422 #endif
423 reg &= 0x07;
424 __sst_write(vbase, DAC_DATA, ((u32)reg << 8) | DAC_READ_CMD );
425 __sst_wait_idle(vbase);
426 /*udelay(10);*/
427 ret=(__sst_read(vbase, DAC_READ) & 0xff);
428 r_dprintk("sst_dac_read(%#x): %#x\n", reg, ret);
429 return (u8)ret;
430 }
431
__sst_dac_write(u_long vbase,u8 reg,u8 val)432 static void __sst_dac_write(u_long vbase, u8 reg, u8 val)
433 {
434 r_dprintk("sst_dac_write(%#x, %#x)\n", reg, val);
435 #ifdef SST_DEBUG
436 if ((reg & 0x07) != reg)
437 dprintk("bug line %d: register adress '%d' is too high\n",
438 __LINE__,reg);
439 #endif
440 reg &= 0x07;
441 __sst_write(vbase, DAC_DATA,(((u32)reg << 8)) | (u32)val);
442 }
443
444 /* indexed access to ti/att dacs */
__dac_i_read(u_long vbase,u8 reg)445 static u32 __dac_i_read(u_long vbase, u8 reg)
446 {
447 u32 ret;
448
449 __sst_dac_write(vbase, DACREG_ADDR_I, reg);
450 ret = __sst_dac_read(vbase, DACREG_DATA_I);
451 r_dprintk("sst_dac_read_i(%#x): %#x\n", reg, ret);
452 return ret;
453 }
__dac_i_write(u_long vbase,u8 reg,u8 val)454 static void __dac_i_write(u_long vbase, u8 reg,u8 val)
455 {
456 r_dprintk("sst_dac_write_i(%#x, %#x)\n", reg, val);
457 __sst_dac_write(vbase, DACREG_ADDR_I, reg);
458 __sst_dac_write(vbase, DACREG_DATA_I, val);
459 }
460
461 /*
462 *
463 * Internal routines
464 *
465 */
466
sstfb_install_cmap(int con,struct fb_info * info)467 static void sstfb_install_cmap(int con, struct fb_info *info)
468 {
469 #define sst_info ((struct sstfb_info *) info)
470 f_dprintk("sstfb_install_cmap(con: %d)\n",con);
471 f_ddprintk("currcon: %d\n", sst_info->currcon);
472 if (con != sst_info->currcon)
473 return;
474 if (fb_display[con].cmap.len)
475 fb_set_cmap(&fb_display[con].cmap, 1, sstfb_setcolreg, info);
476 else
477 fb_set_cmap(
478 fb_default_cmap(1<<fb_display[con].var.bits_per_pixel),
479 1, sstfb_setcolreg, info);
480 #undef sst_info
481 }
482
sstfb_getcolreg(u_int regno,u_int * red,u_int * green,u_int * blue,u_int * transp,struct fb_info * info)483 static int sstfb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue,
484 u_int *transp, struct fb_info *info)
485 {
486 #define sst_info ((struct sstfb_info *) info)
487 f_dddprintk("sstfb_getcolreg\n");
488 if (regno >= 16) return 1;
489
490 *red = sst_info->palette[regno].red;
491 *green = sst_info->palette[regno].green;
492 *blue = sst_info->palette[regno].blue;
493 *transp = sst_info->palette[regno].transp;
494 f_dddprintk("%-2d rvba: %#x, %#x, %#x, %#x\n",
495 regno,*red, *green, *blue, *transp);
496 return 0;
497 #undef sst_info
498 }
499
sstfb_setcolreg(u_int regno,u_int red,u_int green,u_int blue,u_int transp,struct fb_info * info)500 static int sstfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
501 u_int transp, struct fb_info *info)
502 {
503 #define sst_info ((struct sstfb_info *) info)
504 u32 col;
505 struct display * disp;
506
507 f_dddprintk("sstfb_setcolreg\n");
508 f_dddprintk("%-2d rvba: %#x, %#x, %#x, %#x\n",
509 regno, red, green, blue, transp);
510 if (regno >= 16) return 1;
511
512 sst_info->palette[regno].red = red;
513 sst_info->palette[regno].green = green;
514 sst_info->palette[regno].blue = blue;
515 sst_info->palette[regno].transp= transp;
516
517 disp=&sst_info->disp;
518 red >>= (16 - disp->var.red.length);
519 green >>= (16 - disp->var.green.length);
520 blue >>= (16 - disp->var.blue.length);
521 transp >>= (16 - disp->var.transp.length);
522 col = (red << disp->var.red.offset)
523 | (green << disp->var.green.offset)
524 | (blue << disp->var.blue.offset)
525 | (transp << disp->var.transp.offset);
526
527 switch(disp->var.bits_per_pixel) {
528 #ifdef FBCON_HAS_CFB16
529 case 16:
530 sst_info->fbcon_cmap.cfb16[regno]=(u16)col;
531 break;
532 #endif
533 #ifdef EN_24_32_BPP
534 #if defined(FBCON_HAS_CFB24) || defined(FBCON_HAS_CFB32)
535 case 24:
536 case 32:
537 sst_info->fbcon_cmap.cfb32[regno]=col;
538 break;
539 #endif
540 #endif
541 default:
542 BUG();
543 break;
544 }
545 f_dddprintk("bpp: %d . encoded color: %#x\n",
546 disp->var.bits_per_pixel, col);
547 return 0;
548 #undef sst_info
549 }
550
551 /* set par according to var ( checks var ) */
sstfb_decode_var(const struct fb_var_screeninfo * var,struct sstfb_par * par,const struct sstfb_info * sst_info)552 static int sstfb_decode_var (const struct fb_var_screeninfo *var,
553 struct sstfb_par *par,
554 const struct sstfb_info *sst_info)
555 {
556 int real_length;
557
558 f_dprintk("sstfb_decode_var\n");
559 /* Check var validity */
560 par->valid=0;
561
562 memset(par, 0, sizeof(par));
563 par->xDim = var->xres;
564 par->hSyncOn = var->hsync_len;
565 par->hSyncOff = var->xres + var->right_margin + var->left_margin;
566 par->hBackPorch = var->left_margin;
567 par->yDim = var->yres;
568 par->vSyncOn = var->vsync_len;
569 par->vSyncOff = var->yres + var->lower_margin + var->upper_margin;
570 par->vBackPorch = var->upper_margin;
571
572 if(sst_calc_pll (PS2KHZ(var->pixclock), &par->freq, &par->pll)) {
573 eprintk("Pixclock %d out of range\n", var->pixclock);
574 return -EINVAL; //XXX
575 }
576
577 par->sync=var->sync & (FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT);
578 par->vmode=var->vmode & (FB_VMODE_INTERLACED | FB_VMODE_DOUBLE);
579
580 /* in laced mode, vBackPorch should be even. odd -> funky display */
581 if (par->vmode & FB_VMODE_INTERLACED)
582 par->vBackPorch += (par->vBackPorch % 2);
583 if (par->vmode & FB_VMODE_DOUBLE) {
584 par->vBackPorch <<= 1;
585 par->yDim <<=1;
586 par->vSyncOn <<=1;
587 par->vSyncOff <<=1;
588 }
589
590 switch (var->bits_per_pixel) {
591 case 0 ... 16 :
592 par->bpp = 16;
593 break;
594 #ifdef EN_24_32_BPP
595 case 17 ... 24 :
596 par->bpp = 24;
597 break;
598 case 25 ... 32 :
599 par->bpp = 32;
600 break;
601 #endif
602 default :
603 eprintk ("Unsupported bpp %d\n", par->bpp);
604 return -EINVAL;
605 break;
606 }
607
608 if (IS_VOODOO2(sst_info)) {
609 /* voodoo2 has 32 pixel wide tiles , BUT stange things
610 happen with odd number of tiles */
611 par->tiles_in_X= (par->xDim + 63 ) / 64 * 2;
612 } else {
613 /* voodoo1 has 64 pixels wide tiles. */
614 par->tiles_in_X= (par->xDim + 63 ) / 64;
615 }
616
617 /* validity tests */
618 if((par->xDim <= 1) || (par->yDim <= 0 )
619 || (par->hSyncOn <= 1)
620 || (par->hSyncOff <= 1)
621 || (par->hBackPorch <= 2)
622 || (par->vSyncOn <= 0)
623 || (par->vSyncOff <= 0)
624 || (par->vBackPorch <= 0)
625 || (par->tiles_in_X <= 0)) {
626 return -EINVAL;
627 }
628 if (IS_VOODOO2(sst_info)) {
629 /* Voodoo 2 limits */
630 if(((par->xDim-1) >= POW2(11)) || (par->yDim >= POW2(11))) {
631 eprintk ("Unsupported resolution %dx%d\n",
632 var->xres, var->yres);
633 return -EINVAL;
634 }
635 if (((par->hSyncOn-1) >= POW2(9))
636 || ((par->hSyncOff-1) >= POW2(11))
637 || ((par->hBackPorch-2) >= POW2(9))
638 || (par->vSyncOn >= POW2(13))
639 || (par->vSyncOff >= POW2(13))
640 || (par->vBackPorch >= POW2(9))
641 || (par->tiles_in_X >= POW2(6))) {
642 eprintk ("Unsupported Timing\n");
643 return -EINVAL;
644 }
645 } else {
646 /* Voodoo limits */
647 if (par->vmode) {
648 eprintk("Interlace/Doublescan not supported %#x\n",
649 par->vmode);
650 return -EINVAL;
651 }
652 if(((par->xDim-1) >= POW2(10)) || (par->yDim >= POW2(10))) {
653 eprintk ("Unsupported resolution %dx%d\n",
654 var->xres, var->yres);
655 return -EINVAL;
656 }
657 if (((par->hSyncOn-1) >= POW2(8))
658 || ((par->hSyncOff-1) >= POW2(10))
659 || ((par->hBackPorch-2) >= POW2(8))
660 || (par->vSyncOn >= POW2(12))
661 || (par->vSyncOff >= POW2(12))
662 || (par->vBackPorch >= POW2(8))
663 || (par->tiles_in_X >= POW2(4))) {
664 eprintk ("Unsupported Timings\n");
665 return -EINVAL;
666 }
667 }
668
669 /* it seems that the fbi uses tiles of 64x16 pixels to "map" the mem*/
670 /* FIXME: i don't like this... looks wrong*/
671 real_length = par->tiles_in_X * (IS_VOODOO2(sst_info) ? 32 : 64 )
672 * ((par->bpp == 16) ? 2 : 4);
673
674 if ((real_length * var->yres) > sst_info->video.len) {
675 eprintk ("Not enough video memory\n");
676 return -ENOMEM;
677 }
678 par->valid=1;
679 return 0;
680 }
681
682 /* sets var according to par (basicaly, sets sane values) */
sstfb_encode_var(struct fb_var_screeninfo * var,const struct sstfb_par * par,const struct sstfb_info * sst_info)683 static int sstfb_encode_var (struct fb_var_screeninfo *var,
684 const struct sstfb_par *par,
685 const struct sstfb_info *sst_info)
686 {
687 memset(var,0,sizeof(struct fb_var_screeninfo));
688
689 var->xres = par->xDim;
690 var->yres = par->yDim;
691 var->xres_virtual = par->xDim;
692 var->yres_virtual = par->yDim;
693 var->bits_per_pixel = par->bpp;
694 /* {x|y}offset = 0 ; sync=0 */
695 var->height = -1;
696 var->width = -1;
697 var->pixclock = KHZ2PS(par->freq);
698 var->left_margin = par->hBackPorch;
699 var->right_margin = par->hSyncOff - par->xDim - par->hBackPorch;
700 var->upper_margin = par->vBackPorch;
701 var->lower_margin = par->vSyncOff - par->yDim - par->vBackPorch;
702 var->hsync_len = par->hSyncOn;
703 var->vsync_len = par->vSyncOn;
704 var->sync = par->sync;
705 var->vmode = par->vmode;
706 if (var->vmode & FB_VMODE_DOUBLE) {
707 var->yres >>=1;
708 var->yres_virtual >>=1;
709 var->vsync_len >>=1;
710 var->upper_margin >>=1;
711 var->lower_margin >>=1;
712 }
713
714 /*
715 * correct the color bit fields
716 */
717 /* var->{red|green|blue}.msb_right = 0; */
718
719 switch (par->bpp) {
720 case 16: /* RGB 565 LfbMode 0 */
721 var->red.length = 5;
722 var->green.length = 6;
723 var->blue.length = 5;
724 var->transp.length = 0;
725
726 var->red.offset = 11;
727 var->green.offset = 5;
728 var->blue.offset = 0;
729 var->transp.offset = 0;
730 break;
731 #ifdef EN_24_32_BPP
732 case 24: /* RGB 888 LfbMode 4 */
733 case 32: /* ARGB 8888 LfbMode 5 */
734 /* in 24bpp we fake a 32 bpp mode */
735 var->red.length = 8;
736 var->green.length = 8;
737 var->blue.length = 8;
738 var->transp.length = 0;
739
740 var->red.offset = 16;
741 var->green.offset = 8;
742 var->blue.offset = 0;
743 var->transp.offset = 0;
744 break;
745 #endif
746 default:
747 eprintk("bug line %d: bad depth '%u'\n", __LINE__, par->bpp);
748 break;
749 }
750 return 0;
751 }
752
753 /*
754 * Frame buffer API
755 */
756
sstfb_open(struct fb_info * info,int user)757 static int sstfb_open(struct fb_info *info, int user)
758 {
759 f_dprintk("sstfb_open(user: %d)\n",user);
760 return 0;
761 }
762
sstfb_release(struct fb_info * info,int user)763 static int sstfb_release(struct fb_info *info, int user)
764 {
765 f_dprintk("sstfb_release(user: %d)\n",user);
766 return 0;
767 }
768
sstfb_get_fix(struct fb_fix_screeninfo * fix,int con,struct fb_info * info)769 static int sstfb_get_fix(struct fb_fix_screeninfo *fix,
770 int con, struct fb_info *info)
771 {
772 #define sst_info ((struct sstfb_info *) info)
773
774 struct fb_var_screeninfo *var;
775 struct fb_var_screeninfo var2;
776
777 f_dprintk("sstfb_get_fix(con: %d)\n",con);
778 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
779
780 if (con == -1) {
781 sstfb_encode_var(&var2, &sst_info->current_par, sst_info);
782 var = &var2;
783 } else
784 var = &fb_display[con].var;
785
786 strcpy(fix->id, sst_info->info.modename);
787 /* lfb phys address = membase + 4Mb */
788 fix->smem_start = sst_info->video.base;
789 fix->smem_len = sst_info->video.len;
790
791 fix->type = FB_TYPE_PACKED_PIXELS;
792 fix->visual = FB_VISUAL_TRUECOLOR;
793 fix->accel = FB_ACCEL_NONE;
794 /*
795 * According to the specs, the linelength must be of 1024 *pixels*.
796 * and the 24bpp mode is in fact a 32 bpp mode.
797 */
798 fix->line_length = (var->bits_per_pixel == 16) ? 2048 : 4096 ;
799 return 0;
800 #undef sst_info
801 }
802
sstfb_get_var(struct fb_var_screeninfo * var,int con,struct fb_info * info)803 static int sstfb_get_var(struct fb_var_screeninfo *var,
804 int con, struct fb_info *info)
805 {
806 #define sst_info ((struct sstfb_info *) info)
807 f_dprintk("sstfb_get_var(con: %d)\n",con);
808 if (con == -1)
809 sstfb_encode_var(var, &sst_info->current_par, sst_info);
810 else
811 *var = fb_display[con].var;
812 print_var(var, "var");
813 return 0;
814 #undef sst_info
815 }
816
sstfb_set_var(struct fb_var_screeninfo * var,int con,struct fb_info * info)817 static int sstfb_set_var(struct fb_var_screeninfo *var,
818 int con, struct fb_info *info)
819 {
820 #define sst_info ((struct sstfb_info *) info)
821
822 struct sstfb_par par;
823 struct display *display;
824 int err;
825 int old_bpp,old_xres,old_yres;
826
827 f_dprintk("sstfb_set_var(con: %d)\n",con);
828 f_ddprintk("xres yres vxres vyres bpp activate\n");
829 f_ddprintk("%-4d %-4d %-5d %-5d %-3d %#-8x\n",
830 var->xres,var->yres,var->xres_virtual,var->yres_virtual,
831 var->bits_per_pixel,var->activate);
832 if (con < 0)
833 display = &sst_info->disp;
834 else
835 display = &fb_display[con];
836
837 if ((err = sstfb_decode_var(var, &par, sst_info)))
838 return err;
839 sstfb_encode_var (var, &par, sst_info);
840
841 switch (var->activate & FB_ACTIVATE_MASK) {
842 case FB_ACTIVATE_TEST:
843 return 0;
844 case FB_ACTIVATE_NXTOPEN:
845 case FB_ACTIVATE_NOW:
846 break;
847 default:
848 return -EINVAL;
849 }
850 old_xres = display->var.xres;
851 old_yres = display->var.yres;
852 old_bpp = display->var.bits_per_pixel;
853 display->var = *var;
854
855 if ((old_xres != var->xres) || (old_yres != var->yres)
856 || (old_bpp != var->bits_per_pixel)) {
857 /* 2-3 lignes redondantes avec get_fix */
858 display->screen_base = (char *) sst_info->video.vbase;
859 display->visual = FB_VISUAL_TRUECOLOR;
860 display->type = FB_TYPE_PACKED_PIXELS;
861 display->type_aux = 0;
862 display->ypanstep = 0;
863 display->ywrapstep = 0;
864 display->line_length = (var->bits_per_pixel==16) ? 2048 : 4096;
865 display->inverse = 0;
866 switch (var->bits_per_pixel) {
867 #ifdef FBCON_HAS_CFB16
868 case 16:
869 display->dispsw = &fbcon_cfb16;
870 display->dispsw_data = sst_info->fbcon_cmap.cfb16;
871 break;
872 #endif
873 #ifdef EN_24_32_BPP
874 #if defined (FBCON_HAS_CFB24) || defined (FBCON_HAS_CFB32 )
875 case 24: /*24bpp non packed <=> 32 bpp */
876 case 32:
877 display->dispsw = &fbcon_cfb32;
878 display->dispsw_data = sst_info->fbcon_cmap.cfb32;
879 break;
880 #endif
881 #endif
882 default:
883 display->dispsw = &fbcon_dummy;
884 break;
885 }
886 display->scrollmode = SCROLL_YREDRAW;
887 if (sst_info->info.changevar) {
888 v_dprintk("fb_info.changevar(con: %d)\n", con);
889 (*sst_info->info.changevar)(con);
890 v_dprintk("fb_info.changevar: done \n");
891 } else {
892 v_dprintk("fb_info.changevar() == NULL . \n");
893 }
894 }
895
896 if ((con == -1) || (con==sst_info->currcon)) {
897 sstfb_set_par (&par, sst_info);
898 }
899 print_var(var, "var");
900 print_var(&display->var, "&display->var");
901
902 if (old_bpp != var->bits_per_pixel) {
903 if ((err = fb_alloc_cmap(&display->cmap, 0, 0)))
904 return err;
905 sstfb_install_cmap(con, info);
906 }
907
908 return 0;
909 #undef sst_info
910 }
911
912
sstfb_set_cmap(struct fb_cmap * cmap,int kspc,int con,struct fb_info * info)913 static int sstfb_set_cmap(struct fb_cmap *cmap, int kspc,
914 int con, struct fb_info *info)
915 {
916 #define sst_info ((struct sstfb_info *) info)
917 struct display *d = (con<0) ? info->disp : fb_display + con;
918
919 f_dprintk("sstfb_set_cmap\n");
920 f_ddprintk("con: %d, currcon: %d, d->cmap.len %d\n",
921 con, sst_info->currcon, d->cmap.len);
922
923 if (d->cmap.len != 16 ) { /* or test if cmap.len == 0 ? */
924 int err;
925 err = fb_alloc_cmap(&d->cmap, 16, 0); /* cmap size=16 */
926 if (err) return err;
927 }
928 if (con == sst_info->currcon) {
929 return fb_set_cmap(cmap, kspc, sstfb_setcolreg, info);
930 } else {
931 fb_copy_cmap(cmap, &d->cmap, kspc ? 0 : 1);
932 }
933 return 0;
934 #undef sst_info
935 }
936
sstfb_get_cmap(struct fb_cmap * cmap,int kspc,int con,struct fb_info * info)937 static int sstfb_get_cmap(struct fb_cmap *cmap, int kspc,
938 int con, struct fb_info *info)
939 {
940 #define sst_info ((struct sstfb_info *) info)
941 f_dprintk("sstfb_get_cmap\n");
942 f_ddprintk("con %d, curcon %d, cmap.len %d\n",
943 con, sst_info->currcon, fb_display[con].cmap.len);
944
945 /* FIXME: check if con = -1 ? cf sstfb_set_cmap... */
946 if (con == sst_info->currcon)
947 return fb_get_cmap(cmap, kspc, sstfb_getcolreg, info);
948 else if (fb_display[con].cmap.len)
949 fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2);
950 else
951 fb_copy_cmap(
952 fb_default_cmap(1<<fb_display[con].var.bits_per_pixel),
953 cmap, kspc ? 0 : 2);
954 return 0;
955 #undef sst_info
956 }
957
958 /* TODO */
sstfb_pan_display(struct fb_var_screeninfo * var,int con,struct fb_info * info)959 static int sstfb_pan_display(struct fb_var_screeninfo *var,
960 int con, struct fb_info *info)
961 {
962 f_dprintk("sstfb_pan_display\n");
963 return -EINVAL;
964 }
965
sstfb_ioctl(struct inode * inode,struct file * file,u_int cmd,u_long arg,int con,struct fb_info * info)966 static int sstfb_ioctl(struct inode *inode, struct file *file,
967 u_int cmd, u_long arg, int con,
968 struct fb_info *info)
969 {
970 #define sst_info ((struct sstfb_info *) info)
971 u_long p;
972 u32 tmp, val;
973 u32 fbiinit0;
974 struct pci_dev * sst_dev = sst_info->dev;
975
976 f_dprintk("sstfb_ioctl(%x)\n", cmd);
977
978 switch (cmd) {
979
980 #if (SST_DEBUG_VAR >0)
981 /* tmp ioctl : dumps fb_display[0-5] */
982 case _IO('F', 0xdb): /* 0x46db */ {
983 int i;
984 f_dprintk("dumping fb_display[0-5].var\n");
985 for (i = 0 ; i< 6 ; i++) {
986 print_var(&fb_display[i].var, "var(%d)", i);
987 }
988 return 0;
989 }
990 #endif /* (SST_DEBUG_VAR >0) */
991
992 /* fills the lfb up to given count of pixels */
993 case _IOW('F', 0xdc, u32): /* 0x46dc */
994 if (copy_from_user(&val, (void *) arg, sizeof(val)))
995 return -EFAULT;
996 if (val > 0x400000 )
997 val = 0x400000;
998 f_dprintk("filling %#x \n", val);
999 for (p = 0 ; p < val; p+=2)
1000 writew( p >> 6 , sst_info->video.vbase + p);
1001 return 0;
1002
1003 /* enable/disable VGA pass_through */
1004 case _IOW('F', 0xdd, u32): /* 0x46dd */
1005 if (copy_from_user(&val, (void *) arg, sizeof(val)))
1006 return -EFAULT;
1007 f_dprintk("switch VGA pass-through\n");
1008 pci_read_config_dword(sst_dev, PCI_INIT_ENABLE, &tmp);
1009 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
1010 tmp | PCI_EN_INIT_WR );
1011 fbiinit0 = sst_read (FBIINIT0);
1012 if (val) {
1013 sst_write(FBIINIT0, fbiinit0 & ~EN_VGA_PASSTHROUGH);
1014 iprintk ( "Disabling VGA pass-through\n");
1015 } else {
1016 sst_write(FBIINIT0, fbiinit0 | EN_VGA_PASSTHROUGH);
1017 iprintk ( "Enabling VGA pass-through\n");
1018 }
1019 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, tmp);
1020 return 0;
1021
1022 /* display test pattern */
1023 case _IO('F', 0xde): /* 0x46de */
1024 f_dprintk("test color display\n");
1025 f_ddprintk("currcon: %d, bpp %d\n", sst_info->currcon,
1026 sst_info->current_par.bpp);
1027 memset_io(sst_info->video.vbase, 0, sst_info->video.len);
1028 switch (sst_info->current_par.bpp) {
1029 case 16:
1030 sstfb_test16(sst_info);
1031 break;
1032 #ifdef EN_24_32_BPP
1033 case 24:
1034 case 32:
1035 sstfb_test32(sst_info);
1036 break;
1037 #endif
1038 default:
1039 return -EFAULT;
1040 }
1041 return 0;
1042 }
1043
1044 return -EINVAL;
1045 #undef sst_info
1046 }
1047
1048
1049 /*
1050 * Low level routines
1051 */
1052
1053 /* get lfb size */
1054
sst_get_memsize(struct sstfb_info * sst_info,u_long * memsize)1055 static int __devinit sst_get_memsize(struct sstfb_info *sst_info, u_long *memsize)
1056 {
1057 u_long fbbase_virt = sst_info->video.vbase;
1058 f_dprintk("sst_get_memsize\n");
1059
1060 /* force memsize */
1061 if ((mem >= 1 ) && (mem <= 4)) {
1062 *memsize = (mem * 0x100000);
1063 iprintk("supplied memsize: %#lx\n", *memsize);
1064 return 1;
1065 }
1066
1067 writel (0xdeadbeef, fbbase_virt);
1068 writel (0xdeadbeef, fbbase_virt+0x100000);
1069 writel (0xdeadbeef, fbbase_virt+0x200000);
1070 f_ddprintk("0Mb: %#x, 1Mb: %#x, 2Mb: %#x\n",
1071 readl(fbbase_virt), readl(fbbase_virt + 0x100000),
1072 readl(fbbase_virt + 0x200000));
1073
1074 writel (0xabcdef01, fbbase_virt);
1075
1076 f_ddprintk("0Mb: %#x, 1Mb: %#x, 2Mb: %#x\n",
1077 readl(fbbase_virt), readl(fbbase_virt + 0x100000),
1078 readl(fbbase_virt + 0x200000));
1079
1080 /* checks for 4mb lfb , then 2, then defaults to 1*/
1081 if (readl(fbbase_virt + 0x200000) == 0xdeadbeef) {
1082 *memsize = 0x400000;
1083 } else if (readl(fbbase_virt + 0x100000) == 0xdeadbeef) {
1084 *memsize = 0x200000;
1085 } else {
1086 *memsize = 0x100000;
1087 }
1088 f_ddprintk("detected memsize: %#lx\n", *memsize);
1089 return 1;
1090 }
1091
1092
1093 /*
1094 * wait for the fbi chip. ASK: what happens if the fbi is stuck ?
1095 *
1096 * the FBI is supposed to be ready if we receive 5 time
1097 * in a row a "idle" answer to our requests
1098 */
1099
__sst_wait_idle(u_long vbase)1100 static int __sst_wait_idle(u_long vbase)
1101 {
1102 int count = 0;
1103
1104 f_ddprintk("sst_wait_idle\n");
1105 while(1) {
1106 if (__sst_read(vbase, STATUS) & STATUS_FBI_BUSY) {
1107 f_dddprintk("status: busy\n");
1108 /* FIXME basicaly, this is a busy wait. maybe not that good. oh well; this is a small loop after all ...*/
1109 count = 0;
1110 } else {
1111 count++;
1112 f_dddprintk("status: idle(%d)\n", count);
1113 }
1114 if (count >= 5) return 1;
1115 //XXX do something to avoid hanging the machine if the voodoo is out
1116 }
1117 }
1118
1119 /*
1120 * detect dac type
1121 * prerequisite : write to FbiInitx enabled, video and fbi and pci fifo reset,
1122 * dram refresh disabled, FbiInit remaped.
1123 * TODO: mmh.. maybe i shoud put the "prerequisite" in the func ...
1124 */
sst_detect_dactype(struct sstfb_info * sst_info)1125 static int __devinit sst_detect_dactype(struct sstfb_info * sst_info)
1126 {
1127 int ret=0,i;
1128 f_dprintk("sst_detect_dactype\n");
1129 for (i=0; i< sizeof(dacs)/sizeof(dacs[0]) ; i++) {
1130 ret = dacs[i].detect(sst_info);
1131 if (ret) break;
1132 }
1133 if (!ret)
1134 return 0;
1135 f_dprintk("found %s\n", dacs[i].name);
1136 sst_info->dac_sw=dacs[i];
1137 return 1;
1138 }
1139
1140 /* fbi should be idle, and fifo emty and mem disabled */
1141 /* supposed to detect AT&T ATT20C409 and Ti TVP3409 ramdacs */
1142
sst_detect_att(struct sstfb_info * sst_info)1143 static int __devinit sst_detect_att(struct sstfb_info * sst_info)
1144 {
1145 int i, mir, dir;
1146
1147 f_dprintk("sst_detect_att\n");
1148 for (i = 0; i<3; i++) {
1149 sst_dac_write(DACREG_WMA, 0); /* backdoor */
1150 sst_dac_read(DACREG_RMR); /* read 4 times RMR */
1151 sst_dac_read(DACREG_RMR);
1152 sst_dac_read(DACREG_RMR);
1153 sst_dac_read(DACREG_RMR);
1154 /* the fifth time, CR0 is read */
1155 sst_dac_read(DACREG_RMR);
1156 /* the 6th, manufacturer id register */
1157 mir = sst_dac_read(DACREG_RMR);
1158 /*the 7th, device ID register */
1159 dir = sst_dac_read(DACREG_RMR);
1160 f_ddprintk("mir: %#x, dir: %#x\n", mir, dir);
1161 if ((mir == DACREG_MIR_ATT ) && (dir == DACREG_DIR_ATT)) {
1162 return 1;
1163 }
1164 }
1165 return 0;
1166 }
1167
sst_detect_ti(struct sstfb_info * sst_info)1168 static int __devinit sst_detect_ti(struct sstfb_info * sst_info)
1169 {
1170 int i, mir, dir;
1171
1172 f_dprintk("sst_detect_ti\n");
1173 for (i = 0; i<3; i++) {
1174 sst_dac_write(DACREG_WMA, 0); /* backdoor */
1175 sst_dac_read(DACREG_RMR); /* read 4 times RMR */
1176 sst_dac_read(DACREG_RMR);
1177 sst_dac_read(DACREG_RMR);
1178 sst_dac_read(DACREG_RMR);
1179 /* the fifth time, CR0 is read */
1180 sst_dac_read(DACREG_RMR);
1181 /* the 6th, manufacturer id register */
1182 mir = sst_dac_read(DACREG_RMR);
1183 /*the 7th, device ID register */
1184 dir = sst_dac_read(DACREG_RMR);
1185 f_ddprintk("mir: %#x, dir: %#x\n", mir, dir);
1186 if ((mir == DACREG_MIR_TI ) && (dir == DACREG_DIR_TI)) {
1187 return 1;
1188 }
1189 }
1190 return 0;
1191 }
1192
1193 /*
1194 * try to detect ICS5342 ramdac
1195 * we get the 1st byte (M value) of preset f1,f7 and fB
1196 * why those 3 ? mmmh... for now, i'll do it the glide way...
1197 * and ask questions later. anyway, it seems that all the freq registers are
1198 * realy at their default state (cf specs) so i ask again, why those 3 regs ?
1199 * mmmmh.. it seems that's much more ugly than i thought. we use f0 and fA for
1200 * pll programming, so in fact, we *hope* that the f1, f7 & fB won't be
1201 * touched...
1202 * is it realy safe ? how can i reset this ramdac ? geee...
1203 */
sst_detect_ics(struct sstfb_info * sst_info)1204 static int __devinit sst_detect_ics(struct sstfb_info * sst_info)
1205 {
1206 int i;
1207 int m_clk0_1, m_clk0_7, m_clk1_b;
1208 int n_clk0_1, n_clk0_7, n_clk1_b;
1209 f_dprintk("sst_detect_ics\n");
1210 for (i = 0; i<5; i++ ) {
1211 sst_dac_write(DACREG_ICS_PLLRMA, 0x1); /* f1 */
1212 m_clk0_1 = sst_dac_read(DACREG_ICS_PLLDATA);
1213 n_clk0_1 = sst_dac_read(DACREG_ICS_PLLDATA);
1214 sst_dac_write(DACREG_ICS_PLLRMA, 0x7); /* f7 */
1215 m_clk0_7 = sst_dac_read(DACREG_ICS_PLLDATA);
1216 n_clk0_7 = sst_dac_read(DACREG_ICS_PLLDATA);
1217 sst_dac_write(DACREG_ICS_PLLRMA, 0xb); /* fB */
1218 m_clk1_b= sst_dac_read(DACREG_ICS_PLLDATA);
1219 n_clk1_b= sst_dac_read(DACREG_ICS_PLLDATA);
1220 f_ddprintk("m_clk0_1: %#x, m_clk0_7: %#x, m_clk1_b: %#x\n",
1221 m_clk0_1, m_clk0_7, m_clk1_b);
1222 f_ddprintk("n_clk0_1: %#x, n_clk0_7: %#x, n_clk1_b: %#x\n",
1223 n_clk0_1, n_clk0_7, n_clk1_b);
1224 if (( m_clk0_1 == DACREG_ICS_PLL_CLK0_1_INI)
1225 && (m_clk0_7 == DACREG_ICS_PLL_CLK0_7_INI)
1226 && (m_clk1_b == DACREG_ICS_PLL_CLK1_B_INI)) {
1227 return 1;
1228 }
1229 }
1230 return 0;
1231 }
1232
1233 /* compute the m,n,p , returns the real freq
1234 * (ics datasheet : N <-> N1 , P <-> N2)
1235 *
1236 * Fout= Fref * (M+2)/( 2^P * (N+2))
1237 * we try to get close to the asked freq
1238 * with P as high, and M as low as possible
1239 * range:
1240 * ti/att : 0 <= M <= 255; 0 <= P <= 3; 0<= N <= 63
1241 * ics : 1 <= M <= 127; 0 <= P <= 3; 1<= N <= 31
1242 * we'll use the lowest limitation, should be precise enouth
1243 */
sst_calc_pll(const int freq,int * freq_out,struct pll_timing * t)1244 static int sst_calc_pll(const int freq, int *freq_out, struct pll_timing *t)
1245 {
1246 int m, m2, n, p, best_err, fout;
1247 int best_n=-1;
1248 int best_m=-1;
1249
1250 f_dprintk("sst_calc_pll(%dKhz)\n", freq);
1251 best_err = freq;
1252 p=3;
1253 /* f * 2^P = vco should be less than VCOmax ~ 250 MHz for ics*/
1254 while (((1 << p) * freq > VCO_MAX) && (p >= 0))
1255 p--;
1256 if (p == -1)
1257 return -EINVAL;
1258 for (n = 1; n < 32; n++) {
1259 /* calc 2 * m so we can round it later*/
1260 m2 = (2 * freq * (1 << p) * (n + 2) ) / DAC_FREF - 4 ;
1261
1262 m = (m2 % 2 ) ? m2/2+1 : m2/2 ;
1263 if (m >= 128)
1264 break;
1265 fout = (DAC_FREF * (m + 2)) / ((1 << p) * (n + 2));
1266 if ((ABS(fout - freq) < best_err) && (m > 0)) {
1267 best_n = n;
1268 best_m = m;
1269 best_err = ABS(fout - freq);
1270 /* we get the lowest m , allowing 0.5% error in freq*/
1271 if (200*best_err < freq) break;
1272 }
1273 }
1274 if (best_n == -1) /* unlikely, but who knows ? */
1275 return -EINVAL;
1276 t->p=p;
1277 t->n=best_n;
1278 t->m=best_m;
1279 *freq_out=(DAC_FREF * (t->m + 2)) / ((1 << t->p) * (t->n + 2));
1280 f_ddprintk ("m: %d, n: %d, p: %d, F: %dKhz\n",
1281 t->m, t->n, t->p, *freq_out);
1282 return 0;
1283 }
1284
1285 /*
1286 * gfx, video, pci fifo should be reset, dram refresh disabled
1287 * see detect_dac
1288 */
1289
sst_set_pll_att_ti(struct sstfb_info * sst_info,const struct pll_timing * t,const int clock)1290 static int sst_set_pll_att_ti(struct sstfb_info * sst_info, const struct pll_timing *t, const int clock)
1291 {
1292 u8 cr0, cc;
1293 f_dprintk("sst_set_pll_att_ti\n");
1294
1295 /* enable indexed mode */
1296
1297 sst_dac_write(DACREG_WMA, 0); /* backdoor */
1298 sst_dac_read(DACREG_RMR); /* 1 time: RMR */
1299 sst_dac_read(DACREG_RMR); /* 2 RMR */
1300 sst_dac_read(DACREG_RMR); /* 3 // */
1301 sst_dac_read(DACREG_RMR); /* 4 // */
1302 cr0 = sst_dac_read(DACREG_RMR); /* 5 CR0 */
1303
1304 sst_dac_write(DACREG_WMA, 0);
1305 sst_dac_read(DACREG_RMR);
1306 sst_dac_read(DACREG_RMR);
1307 sst_dac_read(DACREG_RMR);
1308 sst_dac_read(DACREG_RMR);
1309 sst_dac_write(DACREG_RMR, (cr0 & 0xf0)
1310 | DACREG_CR0_EN_INDEXED
1311 | DACREG_CR0_8BIT
1312 | DACREG_CR0_PWDOWN );
1313 /* so, now we are in indexed mode . dunno if its common, but
1314 i find this way of doing things a little bit weird :p */
1315
1316 udelay(300);
1317 cc = dac_i_read(DACREG_CC_I);
1318 switch (clock) {
1319 case VID_CLOCK:
1320 dac_i_write(DACREG_AC0_I, t->m);
1321 dac_i_write(DACREG_AC1_I, t->p << 6 | t->n);
1322 dac_i_write(DACREG_CC_I,
1323 (cc & 0x0f) | DACREG_CC_CLKA | DACREG_CC_CLKA_C);
1324 break;
1325 case GFX_CLOCK:
1326 dac_i_write(DACREG_BD0_I, t->m);
1327 dac_i_write(DACREG_BD1_I, t->p << 6 | t->n);
1328 dac_i_write(DACREG_CC_I,
1329 (cc & 0xf0) | DACREG_CC_CLKB | DACREG_CC_CLKB_D);
1330 break;
1331 default:
1332 dprintk("bug line %d: wrong clock code '%d'\n",
1333 __LINE__,clock);
1334 return 0;
1335 }
1336 udelay(300);
1337
1338 /* power up the dac & return to "normal" non-indexed mode */
1339 dac_i_write(DACREG_CR0_I,
1340 cr0 & ~DACREG_CR0_PWDOWN & ~DACREG_CR0_EN_INDEXED);
1341 return 1;
1342 }
1343
sst_set_pll_ics(struct sstfb_info * sst_info,const struct pll_timing * t,const int clock)1344 static int sst_set_pll_ics(struct sstfb_info * sst_info, const struct pll_timing *t, const int clock)
1345 {
1346 u8 pll_ctrl;
1347
1348 f_dprintk("sst_set_pll_ics\n");
1349
1350 sst_dac_write(DACREG_ICS_PLLRMA, DACREG_ICS_PLL_CTRL);
1351 pll_ctrl = sst_dac_read(DACREG_ICS_PLLDATA);
1352 switch(clock) {
1353 case VID_CLOCK:
1354 sst_dac_write(DACREG_ICS_PLLWMA, 0x0); /* CLK0, f0 */
1355 sst_dac_write(DACREG_ICS_PLLDATA, t->m);
1356 sst_dac_write(DACREG_ICS_PLLDATA, t->p << 5 | t->n);
1357 /* selects freq f0 for clock 0 */
1358 sst_dac_write(DACREG_ICS_PLLWMA, DACREG_ICS_PLL_CTRL);
1359 sst_dac_write(DACREG_ICS_PLLDATA,
1360 (pll_ctrl & 0xd8)
1361 | DACREG_ICS_CLK0
1362 | DACREG_ICS_CLK0_0);
1363 break;
1364 case GFX_CLOCK :
1365 sst_dac_write(DACREG_ICS_PLLWMA, 0xa); /* CLK1, fA */
1366 sst_dac_write(DACREG_ICS_PLLDATA, t->m);
1367 sst_dac_write(DACREG_ICS_PLLDATA, t->p << 5 | t->n);
1368 /* selects freq fA for clock 1 */
1369 sst_dac_write(DACREG_ICS_PLLWMA, DACREG_ICS_PLL_CTRL);
1370 sst_dac_write(DACREG_ICS_PLLDATA,
1371 (pll_ctrl & 0xef) | DACREG_ICS_CLK1_A);
1372 break;
1373 default:
1374 dprintk("bug line %d: wrong clock code '%d'\n",
1375 __LINE__, clock);
1376 return 0;
1377 }
1378 udelay(300);
1379 return 1;
1380 }
1381
sstfb_set_par(const struct sstfb_par * par,struct sstfb_info * sst_info)1382 static int sstfb_set_par(const struct sstfb_par * par, struct sstfb_info * sst_info)
1383 {
1384 u32 lfbmode, fbiinit1, fbiinit2, fbiinit3, fbiinit5, fbiinit6=0;
1385 int ntiles;
1386 struct pci_dev * sst_dev = sst_info->dev;
1387
1388 f_dprintk("sst_set_par(%dx%d)\n", par->xDim, par->yDim);
1389 f_ddprintk("hSyncOn hSyncOff vSyncOn vSyncOff\n");
1390 f_ddprintk("%-7d %-8d %-7d %-8d\n",
1391 par->hSyncOn, par->hSyncOff,
1392 par->vSyncOn, par->vSyncOff);
1393 f_ddprintk("hBackPorch vBackPorch xDim yDim Freq\n");
1394 f_ddprintk("%-10d %-10d %-4d %-4d %-8d\n",
1395 par->hBackPorch, par->vBackPorch,
1396 par->xDim, par->yDim, par->freq);
1397
1398 if (!par->valid) {
1399 BUG();
1400 return -1;
1401 }
1402 sst_write(NOPCMD, 0);
1403 sst_wait_idle();
1404 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, PCI_EN_INIT_WR);
1405 sst_set_bits(FBIINIT1, VIDEO_RESET);
1406 sst_set_bits(FBIINIT0, FBI_RESET | FIFO_RESET);
1407 sst_unset_bits(FBIINIT2, EN_DRAM_REFRESH);
1408 sst_wait_idle();
1409
1410 /*sst_unset_bits (FBIINIT0, FBI_RESET); / reenable FBI ? */
1411
1412 sst_write(BACKPORCH, par->vBackPorch << 16 | (par->hBackPorch - 2));
1413 sst_write(VIDEODIMENSIONS, par->yDim << 16 | (par->xDim - 1));
1414 sst_write(HSYNC, (par->hSyncOff - 1) << 16 | (par->hSyncOn - 1));
1415 sst_write(VSYNC, par->vSyncOff << 16 | par->vSyncOn);
1416
1417 fbiinit2=sst_read(FBIINIT2);
1418 fbiinit3=sst_read(FBIINIT3);
1419
1420 /* everything is reset. we enable fbiinit2/3 remap : dac acces ok */
1421 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
1422 PCI_EN_INIT_WR | PCI_REMAP_DAC );
1423
1424 sst_info->dac_sw.set_vidmod(sst_info, par->bpp);
1425
1426 /* set video clock */
1427 sst_info->dac_sw.set_pll(sst_info, &par->pll, VID_CLOCK);
1428
1429 /* disable fbiinit2/3 remap */
1430 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
1431 PCI_EN_INIT_WR);
1432
1433 /* restore fbiinit2/3 */
1434 sst_write(FBIINIT2,fbiinit2);
1435 sst_write(FBIINIT3,fbiinit3);
1436
1437 fbiinit1 = (sst_read(FBIINIT1) & VIDEO_MASK)
1438 | EN_DATA_OE
1439 | EN_BLANK_OE
1440 | EN_HVSYNC_OE
1441 | EN_DCLK_OE
1442 /* | (15 << TILES_IN_X_SHIFT)*/
1443 | SEL_INPUT_VCLK_2X
1444 /* | (2 << VCLK_2X_SEL_DEL_SHIFT)
1445 | (2 << VCLK_DEL_SHIFT)*/;
1446 /* try with vclk_in_delay =0 (bits 29:30) , vclk_out_delay =0 (bits(27:28)
1447 in (near) future set them accordingly to revision + resolution (cf glide)
1448 first understand what it stands for :)
1449 FIXME: there are some artefacts... check for the vclk_in_delay
1450 lets try with 6ns delay in both vclk_out & in...
1451 doh... they're still there :\
1452 */
1453
1454 ntiles = par->tiles_in_X;
1455 if (IS_VOODOO2(sst_info)) {
1456 fbiinit1 |= ((ntiles & 0x20) >> 5) << TILES_IN_X_MSB_SHIFT
1457 | ((ntiles & 0x1e) >> 1) << TILES_IN_X_SHIFT ;
1458 /* as the only value of importance for us in fbiinit6 is tiles in X (lsb),
1459 and as reading fbinit 6 will return crap (see FBIINIT6_DEFAULT) we just
1460 write our value. BTW due to the dac unable to read odd number of tiles, this
1461 field is always null ... */
1462 fbiinit6 = (ntiles & 0x1) << TILES_IN_X_LSB_SHIFT;
1463 }
1464 else
1465 fbiinit1 |= ntiles << TILES_IN_X_SHIFT;
1466
1467 switch(par->bpp) {
1468 case 16:
1469 fbiinit1 |= SEL_SOURCE_VCLK_2X_SEL;
1470 break;
1471 #ifdef EN_24_32_BPP
1472 case 24:
1473 case 32:
1474 /* orig sst_set_bits(FBIINIT1, SEL_SOURCE_VCLK_2X_DIV2 | EN_24BPP); */
1475 fbiinit1 |= SEL_SOURCE_VCLK_2X_SEL | EN_24BPP;
1476 break;
1477 #endif
1478 default:
1479 dprintk("bug line %d: bad depth '%u'\n", __LINE__,
1480 par->bpp );
1481 return 0;
1482 break;
1483 }
1484 sst_write(FBIINIT1, fbiinit1);
1485 if (IS_VOODOO2(sst_info)) {
1486 sst_write(FBIINIT6, fbiinit6);
1487 fbiinit5=sst_read(FBIINIT5) & FBIINIT5_MASK ;
1488 if (par->vmode & FB_VMODE_INTERLACED)
1489 fbiinit5 |= INTERLACE;
1490 if (par->vmode & FB_VMODE_DOUBLE )
1491 fbiinit5 |= VDOUBLESCAN;
1492 if (par->sync & FB_SYNC_HOR_HIGH_ACT)
1493 fbiinit5 |= HSYNC_HIGH;
1494 if (par->sync & FB_SYNC_VERT_HIGH_ACT)
1495 fbiinit5 |= VSYNC_HIGH;
1496 sst_write(FBIINIT5, fbiinit5);
1497 }
1498 sst_wait_idle();
1499 sst_unset_bits(FBIINIT1, VIDEO_RESET);
1500 sst_unset_bits(FBIINIT0, FBI_RESET | FIFO_RESET);
1501 sst_set_bits(FBIINIT2, EN_DRAM_REFRESH);
1502 /* disables fbiinit writes */
1503 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, PCI_EN_FIFO_WR);
1504
1505 /* set lfbmode : set mode + front buffer for reads/writes
1506 + disable pipeline */
1507 switch(par->bpp) {
1508 case 16:
1509 lfbmode = LFB_565;
1510 break;
1511 #ifdef EN_24_32_BPP
1512 case 24:
1513 lfbmode = LFB_888;
1514 break;
1515 case 32:
1516 lfbmode = LFB_8888;
1517 break;
1518 #endif
1519 default:
1520 BUG();
1521 return 0;
1522 }
1523
1524 #if defined(__BIG_ENDIAN)
1525 /* enable byte-swizzle functionality in hardware */
1526 lfbmode |= ( LFB_WORD_SWIZZLE_WR | LFB_BYTE_SWIZZLE_WR |
1527 LFB_WORD_SWIZZLE_RD | LFB_BYTE_SWIZZLE_RD );
1528 #endif
1529
1530 if (clipping) {
1531 sst_write(LFBMODE, lfbmode | EN_PXL_PIPELINE);
1532 /*
1533 * Set "clipping" dimensions. If clipping is disabled and
1534 * writes to offscreen areas of the framebuffer are performed,
1535 * the "behaviour is undefined" (_very_ undefined) - Urs
1536 */
1537 /* btw, it requires enabling pixel pipeline in LFBMODE.
1538 off screen read/writes will just wrap and read/print pixels
1539 on screen. Ugly but not that dangerous */
1540
1541 f_ddprintk("setting clipping dimensions 0..%d, 0..%d\n",
1542 par->xDim-1, par->yDim-1);
1543
1544 sst_write(CLIP_LEFT_RIGHT, par->xDim );
1545 sst_write(CLIP_LOWY_HIGHY, par->yDim );
1546 sst_set_bits(FBZMODE, EN_CLIPPING | EN_RGB_WRITE);
1547 } else {
1548 /* no clipping : direct access, no pipeline */
1549 sst_write(LFBMODE, lfbmode );
1550 }
1551
1552 sst_info->current_par = *par;
1553 return 1;
1554 }
1555
sst_set_vidmod_att_ti(struct sstfb_info * sst_info,const int bpp)1556 static void sst_set_vidmod_att_ti(struct sstfb_info * sst_info, const int bpp)
1557 {
1558 u8 cr0;
1559
1560 f_dprintk("sst_set_vidmod_att_ti(bpp: %d)\n", bpp);
1561
1562 sst_dac_write(DACREG_WMA, 0); /* backdoor */
1563 sst_dac_read(DACREG_RMR); /* read 4 times RMR */
1564 sst_dac_read(DACREG_RMR);
1565 sst_dac_read(DACREG_RMR);
1566 sst_dac_read(DACREG_RMR);
1567 /* the fifth time, CR0 is read */
1568 cr0 = sst_dac_read(DACREG_RMR);
1569
1570 sst_dac_write(DACREG_WMA, 0); /* backdoor */
1571 sst_dac_read(DACREG_RMR); /* read 4 times RMR */
1572 sst_dac_read(DACREG_RMR);
1573 sst_dac_read(DACREG_RMR);
1574 sst_dac_read(DACREG_RMR);
1575 /* cr0 */
1576 switch(bpp) {
1577 case 16:
1578 sst_dac_write(DACREG_RMR, (cr0 & 0x0f) | DACREG_CR0_16BPP);
1579 break;
1580 #ifdef EN_24_32_BPP
1581 case 24:
1582 case 32:
1583 sst_dac_write(DACREG_RMR, (cr0 & 0x0f) | DACREG_CR0_24BPP);
1584 break;
1585 #endif
1586 default:
1587 BUG();
1588 }
1589 }
1590
sst_set_vidmod_ics(struct sstfb_info * sst_info,const int bpp)1591 static void sst_set_vidmod_ics(struct sstfb_info * sst_info, const int bpp)
1592 {
1593 f_dprintk("sst_set_vidmod_ics(bpp: %d)\n", bpp);
1594 switch(bpp) {
1595 case 16:
1596 sst_dac_write(DACREG_ICS_CMD, DACREG_ICS_CMD_16BPP);
1597 break;
1598 #ifdef EN_24_32_BPP
1599 case 24:
1600 case 32:
1601 sst_dac_write(DACREG_ICS_CMD, DACREG_ICS_CMD_24BPP);
1602 break;
1603 #endif
1604 default:
1605 BUG();
1606 }
1607 }
1608
sst_init(struct sstfb_info * sst_info)1609 static int __devinit sst_init(struct sstfb_info *sst_info)
1610 {
1611 struct pll_timing gfx_timings;
1612 struct sst_spec * spec;
1613 struct pci_dev * sst_dev = sst_info->dev;
1614 int Fout;
1615 u32 fbiinit0, fbiinit1, fbiinit4;
1616
1617 spec = &voodoo_spec[sst_info->type];
1618 f_dprintk("sst_init\n");
1619 f_ddprintk(" fbiinit0 fbiinit1 fbiinit2 fbiinit3 fbiinit4 "
1620 " fbiinit6\n");
1621 f_ddprintk("%0#10x %0#10x %0#10x %0#10x %0#10x %0#10x\n",
1622 sst_read(FBIINIT0), sst_read(FBIINIT1), sst_read(FBIINIT2),
1623 sst_read(FBIINIT3), sst_read(FBIINIT4), sst_read(FBIINIT6));
1624 /* disable video clock */
1625 pci_write_config_dword(sst_dev, PCI_VCLK_DISABLE,0);
1626
1627 /* enable writing to init registers ,disable pci fifo*/
1628 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, PCI_EN_INIT_WR);
1629 /* reset video */
1630 sst_set_bits(FBIINIT1, VIDEO_RESET);
1631 sst_wait_idle();
1632 /* reset gfx + pci fifo */
1633 sst_set_bits(FBIINIT0, FBI_RESET | FIFO_RESET);
1634 sst_wait_idle();
1635
1636 /* unreset fifo */
1637 /*sst_unset_bits(FBIINIT0, FIFO_RESET);
1638 sst_wait_idle();*/
1639 /* unreset FBI */
1640 /*sst_unset_bits(FBIINIT0, FBI_RESET);
1641 sst_wait_idle();*/
1642
1643 /* disable dram refresh */
1644 sst_unset_bits(FBIINIT2, EN_DRAM_REFRESH);
1645 sst_wait_idle();
1646 /* remap fbinit2/3 to dac */
1647 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
1648 PCI_EN_INIT_WR | PCI_REMAP_DAC );
1649 /* detect dac type */
1650 if (!sst_detect_dactype(sst_info)) {
1651 eprintk("Unknown dac type\n");
1652 //FIXME watch it : we are not in a safe state , bad bad bad .
1653 return 0;
1654 }
1655
1656 /* set graphic clock */
1657 sst_info->gfx_clock = spec->default_gfx_clock;
1658 if ((gfxclk >10 ) && (gfxclk < spec->max_gfxclk)) {
1659 iprintk ("Using supplied graphic freq : %dMHz\n", gfxclk);
1660 sst_info->gfx_clock = gfxclk *1000;
1661 } else if (gfxclk) {
1662 wprintk ("You fool, %dMhz is way out of spec! Using default\n", gfxclk);
1663 }
1664
1665 sst_calc_pll(sst_info->gfx_clock, &Fout, &gfx_timings);
1666 sst_info->dac_sw.set_pll(sst_info, &gfx_timings, GFX_CLOCK);
1667
1668 /* disable fbiinit remap */
1669 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
1670 PCI_EN_INIT_WR| PCI_EN_FIFO_WR );
1671 /* defaults init registers */
1672 /* FbiInit0: unreset gfx, unreset fifo */
1673 fbiinit0 = FBIINIT0_DEFAULT;
1674 fbiinit1 = FBIINIT1_DEFAULT;
1675 fbiinit4 = FBIINIT4_DEFAULT;
1676 if (vgapass)
1677 fbiinit0 &= ~EN_VGA_PASSTHROUGH;
1678 else
1679 fbiinit0 |= EN_VGA_PASSTHROUGH;
1680 if (slowpci) {
1681 fbiinit1 |= SLOW_PCI_WRITES;
1682 fbiinit4 |= SLOW_PCI_READS;
1683 } else {
1684 fbiinit1 &= ~SLOW_PCI_WRITES;
1685 fbiinit4 &= ~SLOW_PCI_READS;
1686 }
1687 sst_write(FBIINIT0, fbiinit0);
1688 sst_wait_idle();
1689 sst_write(FBIINIT1, fbiinit1);
1690 sst_wait_idle();
1691 sst_write(FBIINIT2, FBIINIT2_DEFAULT);
1692 sst_wait_idle();
1693 sst_write(FBIINIT3, FBIINIT3_DEFAULT);
1694 sst_wait_idle();
1695 sst_write(FBIINIT4, fbiinit4);
1696 sst_wait_idle();
1697 if (IS_VOODOO2(sst_info)) {
1698 sst_write(FBIINIT6, FBIINIT6_DEFAULT);
1699 sst_wait_idle();
1700 }
1701
1702 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, PCI_EN_FIFO_WR );
1703 pci_write_config_dword(sst_dev, PCI_VCLK_ENABLE, 0);
1704
1705 return 1;
1706 }
1707
sst_shutdown(struct sstfb_info * sst_info)1708 static void __devexit sst_shutdown(struct sstfb_info *sst_info)
1709 {
1710 struct pci_dev * sst_dev = sst_info->dev;
1711 struct pll_timing gfx_timings;
1712 int Fout;
1713
1714 f_dprintk("sst_shutdown\n");
1715 /* reset video, gfx, fifo, disable dram + remap fbiinit2/3 */
1716 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, PCI_EN_INIT_WR);
1717 sst_set_bits(FBIINIT1, VIDEO_RESET | EN_BLANKING);
1718 sst_unset_bits(FBIINIT2, EN_DRAM_REFRESH);
1719 sst_set_bits(FBIINIT0, FBI_RESET | FIFO_RESET);
1720 sst_wait_idle();
1721 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
1722 PCI_EN_INIT_WR | PCI_REMAP_DAC );
1723 /*set 20Mhz gfx clock */
1724 sst_calc_pll(20000, &Fout, &gfx_timings);
1725 sst_info->dac_sw.set_pll(sst_info, &gfx_timings, GFX_CLOCK);
1726 /* TODO maybe shutdown the dac, vrefresh and so on... */
1727 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE,
1728 PCI_EN_INIT_WR);
1729 sst_unset_bits(FBIINIT0, FBI_RESET | FIFO_RESET | EN_VGA_PASSTHROUGH);
1730 pci_write_config_dword(sst_dev, PCI_VCLK_DISABLE,0);
1731 /* maybe keep fbiinit* and PCI_INIT_enable in the fb_info struct at the beginining ? */
1732 pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, 0);
1733
1734 }
1735
1736 /*
1737 * Interface to the world
1738 */
1739
sstfb_setup(char * options)1740 int __init sstfb_setup(char *options)
1741 {
1742 char *this_opt;
1743
1744 f_dprintk("sstfb_setup\n");
1745
1746 if (!options || !*options)
1747 return 0;
1748
1749 for(this_opt = strtok(options, ","); this_opt;
1750 this_opt = strtok(NULL, ",")) { //XXX
1751 //XXX while ((this_opt = strsep(&options, ",")) != NULL) {
1752 if (!*this_opt) continue;
1753
1754 f_ddprintk("option %s\n", this_opt);
1755
1756 if (!strcmp(this_opt, "inverse")) {
1757 inverse = 1;
1758 fb_invert_cmaps();
1759 }
1760 else if (!strcmp(this_opt, "vganopass"))
1761 vgapass = 0;
1762 else if (!strcmp(this_opt, "vgapass"))
1763 vgapass = 1;
1764 else if (!strcmp(this_opt, "clipping"))
1765 clipping = 1;
1766 else if (!strcmp(this_opt, "noclipping"))
1767 clipping = 0;
1768 else if (!strcmp(this_opt, "fastpci"))
1769 slowpci = 0;
1770 else if (!strcmp(this_opt, "slowpci"))
1771 slowpci = 1;
1772 else if (!strncmp(this_opt, "mem:",4))
1773 mem=simple_strtoul (this_opt+4, NULL, 0);
1774 else if (!strncmp(this_opt, "gfxclk:",7))
1775 gfxclk=simple_strtoul (this_opt+7, NULL, 0);
1776 else if (!strncmp(this_opt, "dev:",4))
1777 dev=simple_strtoul (this_opt+4, NULL, 0);
1778 else
1779 mode_option=this_opt;
1780 }
1781 return 0;
1782 }
1783
sstfb_init(void)1784 int __devinit sstfb_init(void)
1785 {
1786 f_dprintk("sstfb_init\n");
1787 dprintk("Compile date: "__DATE__" "__TIME__"\n");
1788 return pci_module_init(&sstfb_driver);
1789 }
1790
sstfb_exit(void)1791 void __devexit sstfb_exit(void)
1792 {
1793 f_dprintk("sstfb_exit\n");
1794 pci_unregister_driver(&sstfb_driver);
1795 }
1796
1797 #ifdef MODULE
1798 module_init(sstfb_init);
1799 module_exit(sstfb_exit);
1800 #endif
1801
sstfb_probe(struct pci_dev * pdev,const struct pci_device_id * id)1802 static int __devinit sstfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1803 {
1804 struct fb_var_screeninfo var;
1805 struct sstfb_info * sst_info;
1806 struct sst_spec * spec;
1807 int tmp,err;
1808 f_dprintk("sstfb_probe\n");
1809
1810 /* dev > 0 the device is not the one asked for. skip */
1811 /* dev == 0 this is the device the user asked. init */
1812 /* dev == -1 we already inited the asked device. skip */
1813 /* dev < -1 init all devices. including this one. init */
1814 if ((dev == -1 ) || (dev-- > 0))
1815 return -1;
1816
1817 if ((err=pci_enable_device(pdev))) {
1818 eprintk("cannot enable device\n");
1819 return err;
1820 }
1821
1822 sst_info = (struct sstfb_info*)kmalloc(sizeof(*sst_info), GFP_KERNEL);
1823 if (!sst_info)
1824 goto fail_kmalloc;
1825 memset(sst_info, 0, sizeof(*sst_info));
1826
1827 pci_set_drvdata(pdev, sst_info);
1828 sst_info->type = id->driver_data;
1829 spec = &voodoo_spec[sst_info->type];
1830 f_ddprintk("found device : %s\n", spec->name);
1831
1832 sst_info->dev = pdev;
1833 pci_read_config_byte(pdev, PCI_REVISION_ID, &sst_info->revision);
1834
1835 sst_info->mmio.base = pci_resource_start(pdev,0);
1836 sst_info->video.base = sst_info->mmio.base+0x400000;
1837
1838 if (!request_mem_region(sst_info->mmio.base,0x400000,"sstfb MMIO")) {
1839 eprintk ("cannot reserve mmio memory\n");
1840 goto fail_mmio_mem;
1841 }
1842
1843 if (!request_mem_region(sst_info->video.base,0x400000,"sstfb FB")) {
1844 eprintk ("cannot reserve fb memory\n");
1845 goto fail_fb_mem;
1846 }
1847
1848 sst_info->mmio.vbase = (u_long) ioremap_nocache(sst_info->mmio.base, 0x400000);
1849 if (!sst_info->mmio.vbase) {
1850 eprintk("cannot remap register area %#lx\n",
1851 sst_info->mmio.base);
1852 goto fail_mmio_remap;
1853 }
1854 sst_info->video.vbase = (u_long) ioremap_nocache(sst_info->video.base, 0x400000);
1855 if (!sst_info->video.vbase) {
1856 eprintk("cannot remap framebuffer %#lx\n",
1857 sst_info->video.base);
1858 goto fail_fb_remap;
1859 }
1860
1861 if(!sst_init(sst_info)) {
1862 eprintk("Init failed\n");
1863 goto fail;
1864 }
1865 sst_get_memsize(sst_info, &sst_info->video.len);
1866 strncpy(sst_info->info.modename, spec->name, 16);
1867
1868 iprintk("%s with %s dac\n", sst_info->info.modename, sst_info->dac_sw.name);
1869 iprintk("framebuffer at %#lx, mapped to %#lx,"
1870 " size %ldMb\n",
1871 sst_info->video.base, sst_info->video.vbase,
1872 sst_info->video.len >> 20);
1873
1874 f_ddprintk("revision: %d\n", sst_info->revision);
1875 f_ddprintk("regbase_virt: %#lx\n", sst_info->mmio.vbase);
1876 f_ddprintk("membase_phys: %#lx\n", sst_info->video.base);
1877 f_ddprintk("fbbase_virt: %#lx\n", sst_info->video.vbase);
1878
1879 sst_info->info.node = -1 ;
1880 sst_info->info.flags = FBINFO_FLAG_DEFAULT;
1881 sst_info->info.fbops = &sstfb_ops;
1882 sst_info->info.disp = &sst_info->disp;
1883 sst_info->info.changevar = NULL;
1884 sst_info->info.switch_con = &sstfbcon_switch;
1885 sst_info->info.updatevar = &sstfbcon_updatevar;
1886 sst_info->info.blank = &sstfbcon_blank;
1887
1888 tmp=0;
1889 var = sstfb_default;
1890 if ( mode_option &&
1891 fb_find_mode(&var, &sst_info->info, mode_option,
1892 NULL, 0, NULL, 16)) {
1893 if (sstfb_set_var(&var, -1, &sst_info->info)) {
1894 eprintk("can't set supplied video mode. Using default\n");
1895 var = sstfb_default;
1896 } else {
1897 /* set the new default */
1898 sstfb_default = var;
1899 tmp=1; /* no need to set the mode. */
1900 }
1901 }
1902
1903 if (!tmp && sstfb_set_var(&var, -1, &sst_info->info)) {
1904 eprintk("can't set default video mode.\n");
1905 goto fail;
1906 }
1907 /*clear fb */
1908 memset_io(sst_info->video.vbase, 0, sst_info->video.len);
1909 /* print some squares ... */
1910 sstfb_test16(sst_info); /* FIXME this is only for 16bpp */
1911
1912 /* register fb */
1913 if (register_framebuffer(&sst_info->info) < 0) {
1914 eprintk("can't register framebuffer.\n");
1915 goto fail;
1916 }
1917 printk(KERN_INFO "fb%d: %s frame buffer device\n",
1918 GET_FB_IDX(sst_info->info.node),sst_info->info.modename);
1919
1920 return 0;
1921
1922 fail:
1923 iounmap((void *)sst_info->video.base);
1924 fail_fb_remap:
1925 iounmap((void *)sst_info->mmio.base);
1926 fail_mmio_remap:
1927 release_mem_region(sst_info->video.base,0x400000);
1928 fail_fb_mem:
1929 release_mem_region(sst_info->mmio.base,0x400000);
1930 fail_mmio_mem:
1931 kfree(sst_info);
1932 fail_kmalloc:
1933 return -ENXIO; /* no voodoo detected */
1934 }
1935
sstfb_remove(struct pci_dev * pdev)1936 static void __devexit sstfb_remove(struct pci_dev *pdev)
1937 {
1938 struct sstfb_info * sst_info;
1939
1940 f_dprintk("sstfb_remove\n");
1941 sst_info=pci_get_drvdata(pdev);
1942 sst_shutdown(sst_info);
1943
1944 unregister_framebuffer(&sst_info->info);
1945 iounmap((void*)sst_info->video.vbase);
1946 iounmap((void*)sst_info->mmio.vbase);
1947 release_mem_region(sst_info->video.base,0x400000);
1948 release_mem_region(sst_info->mmio.base,0x400000);
1949 kfree(sst_info);
1950 }
1951
1952
1953 /*
1954 * console driver
1955 */
sstfbcon_switch(int con,struct fb_info * info)1956 static int sstfbcon_switch(int con, struct fb_info *info)
1957 {
1958 #define sst_info ((struct sstfb_info *) info)
1959 struct sstfb_par par;
1960
1961 f_dprintk("sstfbcon_switch(con: %d)\n",con);
1962 f_ddprintk("currcon: %d\n", sst_info->currcon);
1963 v_dprintk("currcon: %d\n", sst_info->currcon);
1964
1965 if (sst_info->currcon >= 0) {
1966 if (fb_display[sst_info->currcon].cmap.len)
1967 fb_get_cmap(&fb_display[sst_info->currcon].cmap, 1,
1968 sstfb_getcolreg, info);
1969 }
1970 sst_info->currcon = con;
1971 fb_display[con].var.activate = FB_ACTIVATE_NOW;
1972
1973 print_var(&fb_display[con].var, "&fb_display[con: %d].var",con);
1974 sstfb_decode_var(&fb_display[con].var, &par, sst_info);
1975 if (memcmp(&par,&(sst_info->current_par),sizeof(par))) {
1976 sstfb_set_par(&par, sst_info);
1977 }
1978 sstfb_install_cmap(con, info);
1979 return 0;
1980 #undef sst_info
1981 }
1982
sstfbcon_updatevar(int con,struct fb_info * info)1983 static int sstfbcon_updatevar(int con, struct fb_info *info)
1984 {
1985 f_dprintk("sstfbcon_updatevar\n");
1986 return -EINVAL;
1987 }
1988
sstfbcon_blank(int blank,struct fb_info * info)1989 static void sstfbcon_blank(int blank, struct fb_info *info)
1990 {
1991 f_dprintk("sstfbcon_blank(level %d)\n", blank);
1992 }
1993
1994
1995 /* print some squares on the fb (presuming 16bpp) */
sstfb_test16(struct sstfb_info * sst_info)1996 static void sstfb_test16(struct sstfb_info *sst_info)
1997 {
1998 int i,j;
1999 u_long p;
2000 u_long fbbase_virt = sst_info->video.vbase;
2001
2002 f_dprintk("sstfb_test16\n");
2003 /* white rectangle 20x100+200+0 */
2004 for (i=0 ; i< 100; i++) {
2005 p = fbbase_virt + 2048 *i+400;
2006 for (j=0; j < 10; j++) {
2007 writel(0xffffffff, p);
2008 p+=4;
2009 }
2010 }
2011 /* blue rectangle 180x200+0+0 */
2012 for (i=0 ; i< 200; i++) {
2013 p = fbbase_virt + 2048 *i;
2014 for (j=0; j < 90; j++) {
2015 writel(0x001f001f, p);
2016 p+=4;
2017 }
2018 }
2019 /* green rectangle 40x40+100+0 */
2020 for (i=0 ; i< 40 ; i++) {
2021 p = fbbase_virt + 2048 *i + 200;
2022 for (j=0; j <20; j++) {
2023 writel(0x07e007e0, p);
2024 p+=4;
2025 }
2026 }
2027 /* red rectangle 40x40+100+40 */
2028 for (i=0; i<40; i++) {
2029 p = fbbase_virt + 2048 * (i+40) + 200;
2030 for (j=0; j <20; j++) {
2031 writel( 0xf800f800, p);
2032 p+=4;
2033 }
2034 }
2035 }
2036
2037 /* print some squares on the fb (24/32bpp) */
2038 #ifdef EN_24_32_BPP
sstfb_test32(struct sstfb_info * sst_info)2039 static void sstfb_test32(struct sstfb_info *sst_info)
2040 {
2041 int i,j;
2042 u_long p;
2043 u_long fbbase_virt = sst_info->video.vbase;
2044
2045 f_dprintk("sstfb_test32\n");
2046 /* rect blanc 20x100+200+0 */
2047 for (i=0 ; i< 100; i++) {
2048 p = fbbase_virt + 4096*i + 800;
2049 for (j=0 ; j < 20 ; j++) {
2050 writel(0x00ffffff, p);
2051 p+=4;
2052 }
2053 }
2054 /* rect bleu 180x200+0+0 */
2055 for (i=0 ; i< 200; i++) {
2056 p = fbbase_virt + 4096 * i;
2057 for (j=0 ; j < 180; j++) {
2058 writel(0x000000ff, p);
2059 p+=4;
2060 }
2061 }
2062 /* carre vert 40x40+100+0 */
2063 for (i=0 ; i< 40 ; i++) {
2064 p = fbbase_virt + 4096 *i + 400;
2065 for (j=0; j <40; j++) {
2066 writel(0x0000ff00, p);
2067 p+=4;
2068 }
2069 }
2070 /*carre rouge 40x40+100+10 */
2071 for (i=0; i<40; i++) {
2072 p = fbbase_virt + 4096 * (i+40) + 400;
2073 for (j=0; j <40; j++) {
2074 writel(0x00ff0000, p);
2075 p+=4;
2076 }
2077 }
2078 }
2079 #endif /* EN_24_32_BPP */
2080
2081 MODULE_AUTHOR("(c) 2000,2002 Ghozlane Toumi <gtoumi@laposte.net>");
2082 MODULE_DESCRIPTION("FBDev driver for 3dfx Voodoo Graphics and Voodoo2 based video boards");
2083 MODULE_LICENSE("GPL");
2084
2085 MODULE_PARM(mem, "i");
2086 MODULE_PARM_DESC(mem, "Size of frame buffer memory in MiB (1, 2, 4 Mb, default=autodetect)");
2087 MODULE_PARM(vgapass, "i");
2088 MODULE_PARM_DESC(vgapass, "Enable VGA PassThrough cable (0 or 1) (default=0)");
2089 MODULE_PARM(inverse, "i");
2090 MODULE_PARM_DESC(inverse, "Inverse colormap (0 or 1) (default=0)");
2091 MODULE_PARM(clipping , "i");
2092 MODULE_PARM_DESC(clipping, "Enable clipping (slower, safer) (0 or 1) (default=1)");
2093 MODULE_PARM(gfxclk , "i");
2094 MODULE_PARM_DESC(gfxclk, "Force graphic chip frequency in Mhz. DANGEROUS. (default=auto)");
2095 MODULE_PARM(slowpci, "i");
2096 MODULE_PARM_DESC(slowpci, "Uses slow PCI settings (0 or 1) (default=0)");
2097 MODULE_PARM(dev,"i");
2098 MODULE_PARM_DESC(dev , "Attach to device ID (0..n) (default=1st device)");
2099
2100 /*
2101 * Overrides for Emacs so that we follow Linus's tabbing style.
2102 * ---------------------------------------------------------------------------
2103 * Local variables:
2104 * c-basic-offset: 8
2105 * End:
2106 */
2107
2108 #if 0
2109 void __Dump_regs (struct sstfb_info * sst_info)
2110 {
2111 struct { u32 reg ; char * reg_name;} pci_regs [] = {
2112 { PCI_INIT_ENABLE, "initenable"},
2113 { PCI_VCLK_ENABLE, "enable vclk"},
2114 { PCI_VCLK_DISABLE, "disable vclk"},
2115 };
2116
2117 struct { u32 reg ; char * reg_name;} sst_regs [] = {
2118 {FBIINIT0,"fbiinit0"},
2119 {FBIINIT1,"fbiinit1"},
2120 {FBIINIT2,"fbiinit2"},
2121 {FBIINIT3,"fbiinit3"},
2122 {FBIINIT4,"fbiinit4"},
2123 {FBIINIT5,"fbiinit5"},
2124 {FBIINIT6,"fbiinit6"},
2125 {FBIINIT7,"fbiinit7"},
2126 {LFBMODE,"lfbmode"},
2127 {FBZMODE,"fbzmode"},
2128 };
2129 int pci_s = sizeof(pci_regs)/sizeof(*pci_regs);
2130 int sst_s = sizeof(sst_regs)/sizeof(*sst_regs);
2131 u32 pci_res[pci_s];
2132 u32 sst_res[sst_s];
2133
2134 struct pci_dev * dev = sst_info->dev;
2135
2136 int i;
2137
2138 for (i=0; i < pci_s ; i++ ) {
2139 pci_read_config_dword ( dev, pci_regs[i].reg , &pci_res[i]) ;
2140 }
2141 for (i=0; i < sst_s ; i++ ) {
2142 sst_res[i]=sst_read(sst_regs[i].reg);
2143 }
2144
2145 dprintk ("Dump regs\n");
2146 for (i=0; i < pci_s ; i++ ) {
2147 dprintk("%s = %0#10x\n", pci_regs[i].reg_name , pci_res[i]) ;
2148 }
2149 for (i=0; i < sst_s ; i++ ) {
2150 dprintk("%s = %0#10x\n", sst_regs[i].reg_name , sst_res[i]) ;
2151 }
2152 }
2153 #endif
2154