1 /*
2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
3 *
4 * Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
5 * Based on code written by:
6 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
7 * Alan Hourihane, <alanh@fairlite.demon.co.uk>
8 * Russel King, <rmk@arm.linux.org.uk>
9 * Based on linux/drivers/video/skeletonfb.c:
10 * Copyright (C) 1997 Geert Uytterhoeven
11 * Based on linux/driver/video/pm2fb.c:
12 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
13 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 *
19 * $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $
20 *
21 * CHANGELOG:
22 * Wed Nov 13 11:19:34 MET 2002, v 1.4.11C: option flatpanel: wasn't available in module, fixed.
23 * Mon Feb 11 10:35:48 MET 2002, v 1.4.11B: Cosmetic update.
24 * Wed Jan 23 14:16:59 MET 2002, v 1.4.11: Preliminary 2.5.x support, patch for 2.5.2.
25 * Wed Nov 28 11:08:29 MET 2001, v 1.4.10: potential bug fix for SDRAM-based board, patch for 2.4.16.
26 * Thu Sep 20 10:24:42 MET DST 2001, v 1.4.9: sync bug fix, preliminary flatpanel support, better timings.
27 * Tue Aug 28 10:13:01 MET DST 2001, v 1.4.8: memory timings check, minor bug fixes.
28 * Wed Jul 18 19:06:14 CEST 2001, v 1.4.7: Mode fix (800x600-100, 1024x768-100 changed), using HW panning + accel bug fix.
29 * Mon Jun 25 10:33:56 MET DST 2001, v 1.4.6: Depth 12 fix, chip reset ioctl, moved memory erase ioctl to DEBUG.
30 * Wed Jun 20 11:13:08 MET DST 2001, v 1.4.5: Fixed missing blinking cursor in 8bpp, code cleaning, memory erase IOCTL.
31 * Mon Jun 18 16:00:27 CEST 2001, v 1.4.4: Depth 12 (RGBA 4444) support, code cleaning.
32 * Fri Jun 15 13:53:01 CEST 2001, v 1.4.3: Removed warnings, depth 15 support, add 'depth' option.
33 * Thu Jun 14 10:13:52 MET DST 2001, v 1.4.2: Fixed depth switching bug, preliminary 15bpp (RGB5551) support.
34 * Thu Apr 12 11:16:45 MET DST 2001, v 1.4.1B: Doc updates.
35 * Fri Apr 6 11:12:53 MET DST 2001, v 1.4.1: Configure.help, minor cleanup
36 * Thu Mar 29 10:56:50 MET DST 2001, v 1.4.0: Module & module options support (note: linux patch changed, 2.2.19 added).
37 * Thu Mar 15 15:30:31 MET 2001, v 1.3.2: Fixed mirroring bug on little-endian.
38 * Wed Mar 14 21:25:54 CET 2001, v 1.3.1: Fixed bug in BlockMove (_bmov).
39 * Tue Mar 13 10:53:19 MET 2001, v 1.3.0: Character drawing hardware support (in all width between 1 and 16), fixes.
40 * Thu Mar 8 10:20:16 MET 2001, v 1.2.2: Better J2000 support, "font:" option.
41 * Tue Mar 6 21:25:04 CET 2001, v 1.2.1: Better acceleration support.
42 * Mon Mar 5 21:54:17 CET 2001, v 1.2.0: Partial acceleration support (clear & bmove)
43 * Mon Mar 5 12:52:15 CET 2001, v 1.1.3: Big pan_display fix.
44 * Sun Mar 4 22:21:50 CET 2001, v 1.1.2: (numerous) bug fixes.
45 * Fri Mar 2 15:54:07 CET 2001, v 1.1.1: Might have Appian J2000 support, resource mangement in 2.4
46 * Wed Feb 28 18:21:35 CET 2001, v 1.1.0: Might have multiple boards support (added, but not yest tested)
47 * Tue Feb 27 17:31:12 CET 2001, v 1.0.6: fixes boot-time mode select, add more default mode
48 * Tue Feb 27 14:01:36 CET 2001, v 1.0.5: fixes (1.0.4 was broken for 2.2), cleaning up
49 * Mon Feb 26 23:17:36 CET 2001, v 1.0.4: preliminary 2.4.x support, dropped (useless on pm3) partial product, more OF fix
50 * Mon Feb 26 20:59:05 CET 2001, v 1.0.3: No more shadow register (and wasted memory), endianess fix, use OF-preset resolution by default
51 * Wed Feb 21 22:09:30 CET 2001, v 1.0.2: Code cleaning for future multiboard support, better OF support, bugs fix
52 * Wed Feb 21 19:58:56 CET 2001, v 1.0.1: OpenFirmware support, fixed memory detection, better debug support, code cleaning
53 * Wed Feb 21 14:47:06 CET 2001, v 1.0.0: First working version
54 */
55
56 #include <linux/config.h>
57 #include <linux/module.h>
58 #include <linux/version.h>
59 #include <linux/kernel.h>
60 #include <linux/errno.h>
61 #include <linux/string.h>
62 #include <linux/mm.h>
63 #include <linux/tty.h>
64 #include <linux/slab.h>
65 #include <linux/vmalloc.h>
66 #include <linux/delay.h>
67 #include <linux/interrupt.h>
68 #include <linux/fb.h>
69 #include <linux/init.h>
70 #include <linux/pci.h>
71 #include <linux/ioport.h>
72
73 #include <video/fbcon.h>
74 #include <video/fbcon-mfb.h>
75 #include <video/fbcon-cfb2.h>
76 #include <video/fbcon-cfb4.h>
77 #include <video/fbcon-cfb8.h>
78 #include <video/fbcon-cfb16.h>
79 #include <video/fbcon-cfb24.h>
80 #include <video/fbcon-cfb32.h>
81
82 #include <asm/io.h>
83 #include <asm/uaccess.h>
84
85 #ifdef CONFIG_FB_OF
86 #include <asm/prom.h>
87 #endif
88
89 #include "pm3fb.h"
90
91 /* ************************************* */
92 /* ***** The various "global" data ***** */
93 /* ************************************* */
94
95 /* those will need a rework for multiple board support */
96 /* Driver name */
97 static const char permedia3_name[16] = "Permedia3";
98
99 /* the fb_par struct, mandatory */
100 struct pm3fb_par {
101 u32 pixclock; /* pixclock in KHz */
102
103 u32 width; /* width of virtual screen */
104 u32 height; /* height of virtual screen */
105
106 u32 hsstart; /* horiz. sync start */
107 u32 hsend; /* horiz. sync end */
108 u32 hbend; /* horiz. blank end (also gate end) */
109 u32 htotal; /* total width (w/ sync & blank) */
110
111 u32 vsstart; /* vert. sync start */
112 u32 vsend; /* vert. sync end */
113 u32 vbend; /* vert. blank end */
114 u32 vtotal; /* total height (w/ sync & blank) */
115
116 u32 stride; /* screen stride */
117 u32 base; /* screen base (xoffset+yoffset) in 128 bits unit */
118 /* NOTE : unlike other pm3 stuff above, stored *after* shiftbpp. don't ask */
119 u32 depth; /* screen depth (8, 12, 15, 16 or 32) */
120 u32 video; /* video control (hsync,vsync) */
121 };
122
123 /* memory timings */
124 struct pm3fb_timings
125 {
126 unsigned long caps;
127 unsigned long timings;
128 unsigned long control;
129 unsigned long refresh;
130 unsigned long powerdown;
131 };
132 typedef enum pm3fb_timing_result { pm3fb_timing_ok, pm3fb_timing_problem, pm3fb_timing_retry } pm3fb_timing_result;
133 #define PM3FB_UNKNOWN_TIMING_VALUE ((unsigned long)-1)
134 #define PM3FB_UNKNOWN_TIMINGS { PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE }
135
136 /* the fb_info struct, mandatory */
137 struct pm3fb_info {
138 struct fb_info_gen gen;
139 unsigned long board_num; /* internal board number */
140 unsigned long use_current;
141 struct pm3fb_par *current_par;
142 struct pci_dev *dev; /* PCI device */
143 #ifdef SUPPORT_FB_OF
144 struct device_node *dn; /* OF node for the PCI device */
145 #endif /* SUPPORT_FB_OF */
146 unsigned long board_type; /* index in the cardbase */
147 unsigned char *fb_base; /* framebuffer memory base */
148 u32 fb_size; /* framebuffer memory size */
149 unsigned char *p_fb; /* physical address of frame buffer */
150 unsigned char *v_fb; /* virtual address of frame buffer */
151 unsigned char *pIOBase; /* physical address of registers region, must be rg_base or rg_base+PM2_REGS_SIZE depending on the host endianness */
152 unsigned char *vIOBase; /* address of registers after ioremap() */
153 struct {
154 u8 transp;
155 u8 red;
156 u8 green;
157 u8 blue;
158 } palette[256];
159 union {
160 #ifdef FBCON_HAS_CFB16
161 u16 cmap12[16]; /* RGBA 4444 */
162 u16 cmap15[16]; /* RGBA 5551 */
163 u16 cmap16[16]; /* RGBA 5650 */
164 #endif
165 #ifdef FBCON_HAS_CFB32
166 u32 cmap32[16];
167 #endif
168 } cmap;
169 struct pm3fb_timings memt;
170 };
171
172 /* regular resolution database*/
173 static struct {
174 char name[16];
175 struct pm3fb_par user_mode;
176 } mode_base[] __initdata = {
177 {
178 "default-800x600", {
179 49500, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
180 800, 0, 8,
181 PM3VideoControl_ENABLE |
182 PM3VideoControl_HSYNC_ACTIVE_HIGH
183 |
184 PM3VideoControl_VSYNC_ACTIVE_HIGH
185 | PM3VideoControl_PIXELSIZE_8BIT}}, {
186 "1024x768-74", {
187 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
188 806, 1024, 0, 8,
189 PM3VideoControl_ENABLE |
190 PM3VideoControl_HSYNC_ACTIVE_HIGH
191 |
192 PM3VideoControl_VSYNC_ACTIVE_HIGH
193 | PM3VideoControl_PIXELSIZE_8BIT}}, {
194 "1024x768-74-32", {
195 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
196 806, 1024, 0, 32,
197 PM3VideoControl_ENABLE |
198 PM3VideoControl_HSYNC_ACTIVE_HIGH
199 |
200 PM3VideoControl_VSYNC_ACTIVE_HIGH
201 | PM3VideoControl_PIXELSIZE_32BIT}},
202 /* Generated mode : "1600x1024", for the SGI 1600SW flat panel*/
203 {
204 "SGI1600SW", {
205 108000, 1600, 1024, 16, 56, 104, 1704, 3, 6, 32,
206 1056, 1600, 0, 8,
207 PM3VideoControl_ENABLE|
208 PM3VideoControl_HSYNC_ACTIVE_LOW|PM3VideoControl_VSYNC_ACTIVE_LOW|
209 PM3VideoControl_PIXELSIZE_32BIT}},
210 /* ##### auto-generated mode, by fbtimings2pm3 */
211 /* Generated mode : "640x480-60" */
212 {
213 "640x480-60", {
214 25174, 640, 480, 16, 112, 160, 800, 10, 12, 45,
215 525, 640, 0, 8,
216 PM3VideoControl_ENABLE |
217 PM3VideoControl_HSYNC_ACTIVE_LOW
218 |
219 PM3VideoControl_VSYNC_ACTIVE_LOW
220 | PM3VideoControl_PIXELSIZE_8BIT}},
221 /* Generated mode : "640x480-72" */
222 {
223 "640x480-72", {
224 31199, 640, 480, 24, 64, 192, 832, 9, 12, 40, 520,
225 640, 0, 8,
226 PM3VideoControl_ENABLE |
227 PM3VideoControl_HSYNC_ACTIVE_LOW
228 |
229 PM3VideoControl_VSYNC_ACTIVE_LOW
230 | PM3VideoControl_PIXELSIZE_8BIT}},
231 /* Generated mode : "640x480-75" */
232 {
233 "640x480-75", {
234 31499, 640, 480, 16, 80, 200, 840, 1, 4, 20, 500,
235 640, 0, 8,
236 PM3VideoControl_ENABLE |
237 PM3VideoControl_HSYNC_ACTIVE_LOW
238 |
239 PM3VideoControl_VSYNC_ACTIVE_LOW
240 | PM3VideoControl_PIXELSIZE_8BIT}},
241 /* Generated mode : "640x480-90" */
242 {
243 "640x480-90", {
244 39909, 640, 480, 32, 72, 192, 832, 25, 39, 53, 533,
245 640, 0, 8,
246 PM3VideoControl_ENABLE |
247 PM3VideoControl_HSYNC_ACTIVE_LOW
248 |
249 PM3VideoControl_VSYNC_ACTIVE_LOW
250 | PM3VideoControl_PIXELSIZE_8BIT}},
251 /* Generated mode : "640x480-100" */
252 {
253 "640x480-100", {
254 44899, 640, 480, 32, 160, 208, 848, 22, 34, 51,
255 531, 640, 0, 8,
256 PM3VideoControl_ENABLE |
257 PM3VideoControl_HSYNC_ACTIVE_LOW
258 |
259 PM3VideoControl_VSYNC_ACTIVE_LOW
260 | PM3VideoControl_PIXELSIZE_8BIT}},
261 /* Generated mode : "800x600-48-lace" */
262 /* INTERLACED NOT SUPPORTED
263 {"800x600-48-lace", {35999, 800, 600, 80, 208, 264, 1064, 11, 23, 102, 702, 800, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
264 INTERLACED NOT SUPPORTED */
265 /* Generated mode : "800x600-56" */
266 {
267 "800x600-56", {
268 35999, 800, 600, 24, 96, 224, 1024, 1, 3, 25, 625,
269 800, 0, 8,
270 PM3VideoControl_ENABLE |
271 PM3VideoControl_HSYNC_ACTIVE_HIGH
272 |
273 PM3VideoControl_VSYNC_ACTIVE_HIGH
274 | PM3VideoControl_PIXELSIZE_8BIT}},
275 /* Generated mode : "800x600-60" */
276 {
277 "800x600-60", {
278 40000, 800, 600, 40, 168, 256, 1056, 1, 5, 28, 628,
279 800, 0, 8,
280 PM3VideoControl_ENABLE |
281 PM3VideoControl_HSYNC_ACTIVE_HIGH
282 |
283 PM3VideoControl_VSYNC_ACTIVE_HIGH
284 | PM3VideoControl_PIXELSIZE_8BIT}},
285 /* Generated mode : "800x600-70" */
286 {
287 "800x600-70", {
288 44899, 800, 600, 24, 168, 208, 1008, 9, 21, 36,
289 636, 800, 0, 8,
290 PM3VideoControl_ENABLE |
291 PM3VideoControl_HSYNC_ACTIVE_HIGH
292 |
293 PM3VideoControl_VSYNC_ACTIVE_LOW
294 | PM3VideoControl_PIXELSIZE_8BIT}},
295 /* Generated mode : "800x600-72" */
296 {
297 "800x600-72", {
298 50000, 800, 600, 56, 176, 240, 1040, 37, 43, 66,
299 666, 800, 0, 8,
300 PM3VideoControl_ENABLE |
301 PM3VideoControl_HSYNC_ACTIVE_HIGH
302 |
303 PM3VideoControl_VSYNC_ACTIVE_HIGH
304 | PM3VideoControl_PIXELSIZE_8BIT}},
305 /* Generated mode : "800x600-75" */
306 {
307 "800x600-75", {
308 49497, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
309 800, 0, 8,
310 PM3VideoControl_ENABLE |
311 PM3VideoControl_HSYNC_ACTIVE_HIGH
312 |
313 PM3VideoControl_VSYNC_ACTIVE_HIGH
314 | PM3VideoControl_PIXELSIZE_8BIT}},
315 /* Generated mode : "800x600-90" */
316 {
317 "800x600-90", {
318 56637, 800, 600, 8, 72, 192, 992, 8, 19, 35, 635,
319 800, 0, 8,
320 PM3VideoControl_ENABLE |
321 PM3VideoControl_HSYNC_ACTIVE_HIGH
322 |
323 PM3VideoControl_VSYNC_ACTIVE_HIGH
324 | PM3VideoControl_PIXELSIZE_8BIT}},
325 /* Generated mode : "800x600-100", from /etc/fb.modes */
326 /* DISABLED, hsstart == 0
327 {
328 "800x600-100", {
329 67499, 800, 600, 0, 64, 280, 1080, 7, 11, 25, 625,
330 800, 0, 8,
331 PM3VideoControl_ENABLE |
332 PM3VideoControl_HSYNC_ACTIVE_HIGH
333 |
334 PM3VideoControl_VSYNC_ACTIVE_HIGH
335 | PM3VideoControl_PIXELSIZE_8BIT}},
336 */
337 /* Generated mode : "800x600-100", from ??? */
338 {
339 "800x600-100", {
340 69650, 800, 600, 64, 128, 288, 1088, 4, 10, 40, 640, 800, 0, 8,
341 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
342 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
343 /* Generated mode : "1024x768-43-lace" */
344 /* INTERLACED NOT SUPPORTED
345 {"1024x768-43-lace", {44899, 1024, 768, 8, 184, 240, 1264, 1, 9, 49, 817, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
346 INTERLACED NOT SUPPORTED */
347 /* Generated mode : "1024x768-60" */
348 {
349 "1024x768-60", {
350 64998, 1024, 768, 24, 160, 320, 1344, 3, 9, 38,
351 806, 1024, 0, 8,
352 PM3VideoControl_ENABLE |
353 PM3VideoControl_HSYNC_ACTIVE_LOW
354 |
355 PM3VideoControl_VSYNC_ACTIVE_LOW
356 | PM3VideoControl_PIXELSIZE_8BIT}},
357 /* Generated mode : "1024x768-70" */
358 {
359 "1024x768-70", {
360 74996, 1024, 768, 24, 160, 304, 1328, 3, 9, 38,
361 806, 1024, 0, 8,
362 PM3VideoControl_ENABLE |
363 PM3VideoControl_HSYNC_ACTIVE_LOW
364 |
365 PM3VideoControl_VSYNC_ACTIVE_LOW
366 | PM3VideoControl_PIXELSIZE_8BIT}},
367 /* Generated mode : "1024x768-72" */
368 {
369 "1024x768-72", {
370 74996, 10224, 768, 24, 160, 264, 10488, 3, 9, 38,
371 806, 10224, 0, 8,
372 PM3VideoControl_ENABLE |
373 PM3VideoControl_HSYNC_ACTIVE_LOW
374 |
375 PM3VideoControl_VSYNC_ACTIVE_LOW
376 | PM3VideoControl_PIXELSIZE_8BIT}},
377 /* Generated mode : "1024x768-75" */
378 {
379 "1024x768-75", {
380 78746, 1024, 768, 16, 112, 288, 1312, 1, 4, 32,
381 800, 1024, 0, 8,
382 PM3VideoControl_ENABLE |
383 PM3VideoControl_HSYNC_ACTIVE_HIGH
384 |
385 PM3VideoControl_VSYNC_ACTIVE_HIGH
386 | PM3VideoControl_PIXELSIZE_8BIT}},
387 /* Generated mode : "1024x768-90" */
388 {
389 "1024x768-90", {
390 100000, 1024, 768, 0, 96, 288, 1312, 21, 36, 77,
391 845, 1024, 0, 8,
392 PM3VideoControl_ENABLE |
393 PM3VideoControl_HSYNC_ACTIVE_LOW
394 |
395 PM3VideoControl_VSYNC_ACTIVE_LOW
396 | PM3VideoControl_PIXELSIZE_8BIT}},
397 /* Generated mode : "1024x768-100", from /etc/fb.modes */
398 /* DISABLED, vsstart == 0
399 {
400 "1024x768-100", {
401 109998, 1024, 768, 0, 88, 368, 1392, 0, 8, 24, 792,
402 1024, 0, 8,
403 PM3VideoControl_ENABLE |
404 PM3VideoControl_HSYNC_ACTIVE_LOW
405 |
406 PM3VideoControl_VSYNC_ACTIVE_LOW
407 | PM3VideoControl_PIXELSIZE_8BIT}},
408 */
409 /* Generated mode : "1024x768-100", from ??? */
410 {
411 "1024x768-100", {
412 115500, 1024, 768, 32, 224, 416, 1440, 3, 13, 34, 802, 1024, 0, 8,
413 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
414 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
415 /* Generated mode : "1152x864-43-lace" */
416 /* INTERLACED NOT SUPPORTED
417 {"1152x864-43-lace", {64998, 1152, 864, 72, 200, 264, 1416, 78, 87, 191, 1055, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
418 INTERLACED NOT SUPPORTED */
419 /* Generated mode : "1152x864-47-lace" */
420 /* INTERLACED NOT SUPPORTED
421 {"1152x864-47-lace", {64998, 1152, 864, 88, 216, 296, 1448, 30, 39, 83, 947, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
422 INTERLACED NOT SUPPORTED */
423 /* Generated mode : "1152x864-60" */
424 {
425 "1152x864-60", {
426 80000, 1152, 864, 64, 176, 304, 1456, 6, 11, 52,
427 916, 1152, 0, 8,
428 PM3VideoControl_ENABLE |
429 PM3VideoControl_HSYNC_ACTIVE_HIGH
430 |
431 PM3VideoControl_VSYNC_ACTIVE_HIGH
432 | PM3VideoControl_PIXELSIZE_8BIT}},
433 /* Generated mode : "1152x864-70" */
434 {
435 "1152x864-70", {
436 100000, 1152, 864, 40, 192, 360, 1512, 13, 24, 81,
437 945, 1152, 0, 8,
438 PM3VideoControl_ENABLE |
439 PM3VideoControl_HSYNC_ACTIVE_HIGH
440 |
441 PM3VideoControl_VSYNC_ACTIVE_HIGH
442 | PM3VideoControl_PIXELSIZE_8BIT}},
443 /* Generated mode : "1152x864-75" */
444 {
445 "1152x864-75", {
446 109998, 1152, 864, 24, 168, 312, 1464, 45, 53, 138,
447 1002, 1152, 0, 8,
448 PM3VideoControl_ENABLE |
449 PM3VideoControl_HSYNC_ACTIVE_HIGH
450 |
451 PM3VideoControl_VSYNC_ACTIVE_HIGH
452 | PM3VideoControl_PIXELSIZE_8BIT}},
453 /* Generated mode : "1152x864-80" */
454 {
455 "1152x864-80", {
456 109998, 1152, 864, 16, 128, 288, 1440, 30, 37, 94,
457 958, 1152, 0, 8,
458 PM3VideoControl_ENABLE |
459 PM3VideoControl_HSYNC_ACTIVE_HIGH
460 |
461 PM3VideoControl_VSYNC_ACTIVE_HIGH
462 | PM3VideoControl_PIXELSIZE_8BIT}},
463 /* Generated mode : "1280x1024-43-lace" */
464 /* INTERLACED NOT SUPPORTED
465 {"1280x1024-43-lace", {80000, 1024, 1024, 80, 160, 320, 1344, 50, 60, 125, 1149, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
466 INTERLACED NOT SUPPORTED */
467 /* Generated mode : "1280x1024-47-lace" */
468 /* INTERLACED NOT SUPPORTED
469 {"1280x1024-47-lace", {80000, 1280, 1024, 80, 160, 320, 1600, 1, 11, 29, 1053, 1280, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
470 INTERLACED NOT SUPPORTED */
471 /* Generated mode : "1280x1024-60" */
472 {
473 "1280x1024-60", {
474 107991, 1280, 1024, 48, 160, 408, 1688, 1, 4, 42,
475 1066, 1280, 0, 8,
476 PM3VideoControl_ENABLE |
477 PM3VideoControl_HSYNC_ACTIVE_HIGH
478 |
479 PM3VideoControl_VSYNC_ACTIVE_HIGH
480 | PM3VideoControl_PIXELSIZE_8BIT}},
481 /* Generated mode : "1280x1024-70" */
482 {
483 "1280x1024-70", {
484 125992, 1280, 1024, 80, 192, 408, 1688, 1, 6, 42,
485 1066, 1280, 0, 8,
486 PM3VideoControl_ENABLE |
487 PM3VideoControl_HSYNC_ACTIVE_HIGH
488 |
489 PM3VideoControl_VSYNC_ACTIVE_HIGH
490 | PM3VideoControl_PIXELSIZE_8BIT}},
491 /* Generated mode : "1280x1024-74" */
492 {
493 "1280x1024-74", {
494 134989, 1280, 1024, 32, 176, 432, 1712, 0, 30, 40,
495 1064, 1280, 0, 8,
496 PM3VideoControl_ENABLE |
497 PM3VideoControl_HSYNC_ACTIVE_HIGH
498 |
499 PM3VideoControl_VSYNC_ACTIVE_HIGH
500 | PM3VideoControl_PIXELSIZE_8BIT}},
501 /* Generated mode : "1280x1024-75" */
502 {
503 "1280x1024-75", {
504 134989, 1280, 1024, 16, 160, 408, 1688, 1, 4, 42,
505 1066, 1280, 0, 8,
506 PM3VideoControl_ENABLE |
507 PM3VideoControl_HSYNC_ACTIVE_HIGH
508 |
509 PM3VideoControl_VSYNC_ACTIVE_HIGH
510 | PM3VideoControl_PIXELSIZE_8BIT}},
511 /* Generated mode : "1600x1200-60" */
512 {
513 "1600x1200-60", {
514 155981, 1600, 1200, 32, 192, 448, 2048, 10, 18, 70,
515 1270, 1600, 0, 8,
516 PM3VideoControl_ENABLE |
517 PM3VideoControl_HSYNC_ACTIVE_LOW
518 |
519 PM3VideoControl_VSYNC_ACTIVE_LOW
520 | PM3VideoControl_PIXELSIZE_8BIT}},
521 /* Generated mode : "1600x1200-66" */
522 {
523 "1600x1200-66", {
524 171998, 1600, 1200, 40, 176, 480, 2080, 3, 6, 53,
525 1253, 1600, 0, 8,
526 PM3VideoControl_ENABLE |
527 PM3VideoControl_HSYNC_ACTIVE_LOW
528 |
529 PM3VideoControl_VSYNC_ACTIVE_LOW
530 | PM3VideoControl_PIXELSIZE_8BIT}},
531 /* Generated mode : "1600x1200-76" */
532 {
533 "1600x1200-76", {
534 197980, 1600, 1200, 40, 176, 480, 2080, 3, 8, 50,
535 1250, 1600, 0, 8,
536 PM3VideoControl_ENABLE |
537 PM3VideoControl_HSYNC_ACTIVE_LOW
538 |
539 PM3VideoControl_VSYNC_ACTIVE_LOW
540 | PM3VideoControl_PIXELSIZE_8BIT}},
541 /* ##### end of auto-generated mode */
542 {
543 "\0",}
544 };
545
546 /* more mandatory stuff (see skeletonfb.c + framebuffer driver HOWTO */
547 static struct pm3fb_info fb_info[PM3_MAX_BOARD];
548 static struct pm3fb_par current_par[PM3_MAX_BOARD];
549 static int current_par_valid[PM3_MAX_BOARD];
550 /* to allow explicit filtering of board */
551 short bus[PM3_MAX_BOARD];
552 short slot[PM3_MAX_BOARD];
553 short func[PM3_MAX_BOARD];
554 short disable[PM3_MAX_BOARD];
555 short noaccel[PM3_MAX_BOARD];
556 char fontn[PM3_MAX_BOARD][PM3_FONTNAME_SIZE];
557 short depth[PM3_MAX_BOARD];
558 short flatpanel[PM3_MAX_BOARD];
559 static struct display disp[PM3_MAX_BOARD];
560 static char g_options[PM3_OPTIONS_SIZE] __initdata = "pm3fb,dummy";
561 short printtimings = 0;
562 short forcesize[PM3_MAX_BOARD];
563
564 /* ********************* */
565 /* ***** prototype ***** */
566 /* ********************* */
567 /* card-specific */
568 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info);
569 /* permedia3-specific */
570 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info);
571 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info);
572 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info);
573 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
574 unsigned long r);
575 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
576 unsigned long refclock, /* In kHz units */
577 unsigned char *prescale, /* ClkPreScale */
578 unsigned char *feedback, /* ClkFeedBackScale */
579 unsigned char *postscale
580 /* ClkPostScale */ );
581 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc);
582 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b);
583 static void pm3fb_common_init(struct pm3fb_info *l_fb_info);
584 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
585 unsigned long depth, int v);
586 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
587 unsigned long depth, int v);
588 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info);
589 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info);
590 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
591 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info);
592 #endif
593 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info);
594 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info);
595 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
596 struct pm3fb_par *curpar);
597 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info);
598 /* accelerated permedia3-specific */
599 #ifdef PM3FB_USE_ACCEL
600 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info);
601 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info);
602 #ifdef FBCON_HAS_CFB32
603 static void pm3fb_cfb32_clear(struct vc_data *conp,
604 struct display *p,
605 int sy, int sx, int height, int width);
606 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
607 struct display *p, int bottom_only);
608 #endif /* FBCON_HAS_CFB32 */
609 #ifdef FBCON_HAS_CFB16
610 static void pm3fb_cfb16_clear(struct vc_data *conp,
611 struct display *p,
612 int sy, int sx, int height, int width);
613 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
614 struct display *p, int bottom_only);
615 #endif /* FBCON_HAS_CFB16 */
616 #ifdef FBCON_HAS_CFB8
617 static void pm3fb_cfb8_clear(struct vc_data *conp,
618 struct display *p,
619 int sy, int sx, int height, int width);
620 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
621 struct display *p, int bottom_only);
622 #endif /* FBCON_HAS_CFB8 */
623 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
624 static void pm3fb_cfbX_bmove(struct display *p,
625 int sy, int sx,
626 int dy, int dx, int height, int width);
627 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
628 int c, int yy, int xx);
629 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
630 const unsigned short *s, int count, int yy,
631 int xx);
632 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy);
633 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
634 #endif /* PM3FB_USE_ACCEL */
635 /* pre-init */
636 static void pm3fb_mode_setup(char *mode, unsigned long board_num);
637 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num);
638 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn);
639 static void pm3fb_real_setup(char *options);
640 /* fbdev */
641 static int pm3fb_open(struct fb_info *info, int user);
642 static int pm3fb_release(struct fb_info *info, int user);
643 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
644 const void *par, struct fb_info_gen *info);
645 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
646 void *par, struct fb_info_gen *info);
647 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d);
648 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
649 const void *par, struct fb_info_gen *info);
650 static void pm3fb_get_par(void *par, struct fb_info_gen *info);
651 static void pm3fb_set_par(const void *par, struct fb_info_gen *info);
652 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
653 unsigned char regno, unsigned char r,
654 unsigned char g, unsigned char b);
655 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
656 unsigned *blue, unsigned *transp,
657 struct fb_info *info);
658 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
659 unsigned blue, unsigned transp,
660 struct fb_info *info);
661 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info);
662 static void pm3fb_set_disp(const void *par, struct display *disp,
663 struct fb_info_gen *info);
664 static void pm3fb_detect(void);
665 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
666 struct fb_info_gen *info);
667 static int pm3fb_ioctl(struct inode *inode, struct file *file,
668 u_int cmd, u_long arg, int con,
669 struct fb_info *info);
670
671
672 /* the struct that hold them together */
673 #ifdef KERNEL_2_2
674 struct fbgen_hwswitch pm3fb_switch = {
675 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
676 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg, pm3fb_setcolreg,
677 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
678 };
679
680 static struct fb_ops pm3fb_ops = {
681 pm3fb_open, pm3fb_release,
682 fbgen_get_fix, fbgen_get_var, fbgen_set_var,
683 fbgen_get_cmap, fbgen_set_cmap, fbgen_pan_display, pm3fb_ioctl,
684 NULL, NULL
685 };
686 #endif /* KERNEL_2_2 */
687 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
688 struct fbgen_hwswitch pm3fb_switch = {
689 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
690 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg, pm3fb_setcolreg,
691 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
692 };
693
694 static struct fb_ops pm3fb_ops = {
695 THIS_MODULE,
696 pm3fb_open, pm3fb_release,
697 fbgen_get_fix, fbgen_get_var, fbgen_set_var,
698 fbgen_get_cmap, fbgen_set_cmap, fbgen_pan_display, pm3fb_ioctl, NULL, NULL
699 };
700 #endif /* KERNEL_2_4 or KERNEL_2_5 */
701 #ifdef PM3FB_USE_ACCEL
702 #ifdef FBCON_HAS_CFB32
703 static struct display_switch pm3fb_cfb32 = {
704 fbcon_cfb32_setup, pm3fb_cfbX_bmove, pm3fb_cfb32_clear,
705 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
706 NULL /* cursor() */ , NULL /* set_font() */ ,
707 pm3fb_cfb32_clear_margins,
708 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
709 };
710 #endif /* FBCON_HAS_CFB32 */
711 #ifdef FBCON_HAS_CFB16
712 static struct display_switch pm3fb_cfb16 = {
713 fbcon_cfb16_setup, pm3fb_cfbX_bmove, pm3fb_cfb16_clear,
714 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
715 NULL /* cursor() */ , NULL /* set_font() */ ,
716 pm3fb_cfb16_clear_margins,
717 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
718 };
719 #endif /* FBCON_HAS_CFB16 */
720 #ifdef FBCON_HAS_CFB8
721 static struct display_switch pm3fb_cfb8 = {
722 fbcon_cfb8_setup, pm3fb_cfbX_bmove, pm3fb_cfb8_clear,
723 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
724 NULL /* cursor() */ , NULL /* set_font() */ ,
725 pm3fb_cfb8_clear_margins,
726 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
727 };
728 #endif /* FBCON_HAS_CFB8 */
729 #endif /* PM3FB_USE_ACCEL */
730
731 /* ****************************** */
732 /* ***** card-specific data ***** */
733 /* ****************************** */
734 struct pm3fb_card_timings {
735 unsigned long memsize; /* 0 for last value (i.e. default) */
736 struct pm3fb_timings memt;
737 };
738
739 static struct pm3fb_card_timings t_FormacProFormance3[] = {
740 { 16, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} },
741 { 0, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} } /* from 16 MB PF3 */
742 };
743
744 static struct pm3fb_card_timings t_AppianJeronimo2000[] = {
745 { 32, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} },
746 { 0, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} } /* from 32MB J2000 */
747 };
748
749 static struct pm3fb_card_timings t_3DLabsOxygenVX1[] = {
750 { 32, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} },
751 { 0, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} } /* from 32MB VX1 */
752 };
753
754 static struct {
755 char cardname[32]; /* recognized card name */
756 u16 subvendor; /* subvendor of the card */
757 u16 subdevice; /* subdevice of the card */
758 u8 func; /* function of the card to which the extra init apply */
759 void (*specific_setup)(struct pm3fb_info *l_fb_info); /* card/func specific setup, done before _any_ FB access */
760 struct pm3fb_card_timings *c_memt; /* defauls timings for the boards */
761 } cardbase[] = {
762 { "Unknown Permedia3 board", 0xFFFF, 0xFFFF, 0xFF, NULL, NULL },
763 { "Appian Jeronimo 2000 head 1", 0x1097, 0x3d32, 1, NULL,
764 t_AppianJeronimo2000
765 },
766 { "Appian Jeronimo 2000 head 2", 0x1097, 0x3d32, 2, pm3fb_j2000_setup,
767 t_AppianJeronimo2000
768 },
769 { "Formac ProFormance 3", PCI_VENDOR_ID_3DLABS, 0x000a, 0, NULL, /* Formac use 3DLabs ID ?!? */
770 t_FormacProFormance3
771 },
772 { "3DLabs Permedia3 Create!", PCI_VENDOR_ID_3DLABS, 0x0127, 0, NULL, NULL },
773 { "3DLabs Oxygen VX1 PCI", PCI_VENDOR_ID_3DLABS, 0x0121, 0, NULL,
774 t_3DLabsOxygenVX1
775 },
776 { "3DLabs Oxygen VX1 AGP", PCI_VENDOR_ID_3DLABS, 0x0125, 0, NULL, NULL },
777 { "3DLabs Oxygen VX1-16 AGP", PCI_VENDOR_ID_3DLABS, 0x0140, 0, NULL, NULL },
778 { "3DLabs Oxygen VX1-1600SW PCI", PCI_VENDOR_ID_3DLABS, 0x0800, 0, NULL, NULL },
779 { "\0", 0x0, 0x0, 0, NULL, NULL }
780 };
781
782 /* ********************************** */
783 /* ***** card-specific function ***** */
784 /* ********************************** */
pm3fb_j2000_setup(struct pm3fb_info * l_fb_info)785 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info)
786 { /* the appian j2000 require more initialization of the second head */
787 /* l_fb_info must point to the _second_ head of the J2000 */
788
789 DTRACE;
790
791 l_fb_info->memt = t_AppianJeronimo2000[0].memt; /* 32 MB, first and only j2000 ? */
792
793 pm3fb_write_memory_timings(l_fb_info);
794 }
795
796 /* *************************************** */
797 /* ***** permedia3-specific function ***** */
798 /* *************************************** */
pm3fb_preserve_memory_timings(struct pm3fb_info * l_fb_info)799 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info)
800 {
801 l_fb_info->memt.caps = PM3_READ_REG(PM3LocalMemCaps);
802 l_fb_info->memt.timings = PM3_READ_REG(PM3LocalMemTimings);
803 l_fb_info->memt.control = PM3_READ_REG(PM3LocalMemControl);
804 l_fb_info->memt.refresh = PM3_READ_REG(PM3LocalMemRefresh);
805 l_fb_info->memt.powerdown = PM3_READ_REG(PM3LocalMemPowerDown);
806
807 if ((l_fb_info->memt.caps == PM3FB_UNKNOWN_TIMING_VALUE) ||
808 (l_fb_info->memt.timings == PM3FB_UNKNOWN_TIMING_VALUE) ||
809 (l_fb_info->memt.control == PM3FB_UNKNOWN_TIMING_VALUE) ||
810 (l_fb_info->memt.refresh == PM3FB_UNKNOWN_TIMING_VALUE) ||
811 (l_fb_info->memt.powerdown == PM3FB_UNKNOWN_TIMING_VALUE))
812 {
813 printk(KERN_ERR "pm3fb: invalid memory timings in permedia3 board #%ld\n", l_fb_info->board_num);
814 return(pm3fb_try_memory_timings(l_fb_info));
815 }
816 return(pm3fb_timing_ok);
817 }
818
pm3fb_try_memory_timings(struct pm3fb_info * l_fb_info)819 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info)
820 {
821 if (cardbase[l_fb_info->board_type].c_memt)
822 {
823 int i = 0, done = 0;
824 while (!done)
825 {
826 if ((cardbase[l_fb_info->board_type].c_memt[i].memsize == l_fb_info->fb_size)
827 || !(cardbase[l_fb_info->board_type].c_memt[i].memsize))
828 { /* will use the 0-sized timings by default */
829 done = 1;
830 l_fb_info->memt = cardbase[l_fb_info->board_type].c_memt[i].memt;
831 printk(KERN_WARNING "pm3fb: trying to use predefined memory timings for permedia3 board #%ld (%s, %ld MB)\n",
832 l_fb_info->board_num,
833 cardbase[l_fb_info->board_type].cardname,
834 cardbase[l_fb_info->board_type].c_memt[i].memsize);
835 pm3fb_write_memory_timings(l_fb_info);
836 return(pm3fb_timing_retry);
837 }
838 i++;
839 }
840 } else
841 return(pm3fb_timing_problem);
842 return(pm3fb_timing_ok);
843 }
844
pm3fb_write_memory_timings(struct pm3fb_info * l_fb_info)845 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info)
846 {
847 unsigned char m, n, p;
848 unsigned long clockused;
849
850 PM3_SLOW_WRITE_REG(PM3LocalMemCaps, l_fb_info->memt.caps);
851 PM3_SLOW_WRITE_REG(PM3LocalMemTimings, l_fb_info->memt.timings);
852 PM3_SLOW_WRITE_REG(PM3LocalMemControl, l_fb_info->memt.control);
853 PM3_SLOW_WRITE_REG(PM3LocalMemRefresh, l_fb_info->memt.refresh);
854 PM3_SLOW_WRITE_REG(PM3LocalMemPowerDown, l_fb_info->memt.powerdown);
855
856 clockused =
857 pm3fb_CalculateClock(l_fb_info, 2 * 105000, PM3_REF_CLOCK, &m,
858 &n, &p);
859
860 PM3_WRITE_DAC_REG(PM3RD_KClkPreScale, m);
861 PM3_WRITE_DAC_REG(PM3RD_KClkFeedbackScale, n);
862 PM3_WRITE_DAC_REG(PM3RD_KClkPostScale, p);
863 PM3_WRITE_DAC_REG(PM3RD_KClkControl,
864 PM3RD_KClkControl_STATE_RUN |
865 PM3RD_KClkControl_SOURCE_PLL |
866 PM3RD_KClkControl_ENABLE);
867 PM3_WRITE_DAC_REG(PM3RD_MClkControl,
868 PM3RD_MClkControl_STATE_RUN |
869 PM3RD_MClkControl_SOURCE_KCLK |
870 PM3RD_MClkControl_ENABLE);
871 PM3_WRITE_DAC_REG(PM3RD_SClkControl,
872 PM3RD_SClkControl_STATE_RUN |
873 PM3RD_SClkControl_SOURCE_PCLK |
874 PM3RD_SClkControl_ENABLE);
875 }
876
pm3fb_read_dac_reg(struct pm3fb_info * l_fb_info,unsigned long r)877 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
878 unsigned long r)
879 {
880 DASSERT((l_fb_info->vIOBase != (unsigned char *) (-1)),
881 "l_fb_info->vIOBase mapped in read dac reg\n");
882 PM3_SET_INDEX(r);
883 mb();
884 return (PM3_READ_REG(PM3RD_IndexedData));
885 }
886
887 /* Calculating various clock parameter */
pm3fb_CalculateClock(struct pm3fb_info * l_fb_info,unsigned long reqclock,unsigned long refclock,unsigned char * prescale,unsigned char * feedback,unsigned char * postscale)888 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
889 unsigned long refclock, /* In kHz units */
890 unsigned char *prescale, /* ClkPreScale */
891 unsigned char *feedback, /* ClkFeedBackScale */
892 unsigned char *postscale
893 /* ClkPostScale */ )
894 {
895 int f, pre, post;
896 unsigned long freq;
897 long freqerr = 1000;
898 unsigned long actualclock = 0;
899
900 DTRACE;
901
902 for (f = 1; f < 256; f++) {
903 for (pre = 1; pre < 256; pre++) {
904 for (post = 0; post < 5; post++) {
905 freq =
906 ((2 * refclock * f) /
907 (pre * (1 << post)));
908 if ((reqclock > freq - freqerr)
909 && (reqclock < freq + freqerr)) {
910 freqerr =
911 (reqclock >
912 freq) ? reqclock -
913 freq : freq - reqclock;
914 *feedback = f;
915 *prescale = pre;
916 *postscale = post;
917 actualclock = freq;
918 }
919 }
920 }
921 }
922
923 return (actualclock);
924 }
925
pm3fb_Shiftbpp(struct pm3fb_info * l_fb_info,unsigned long depth,int v)926 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
927 unsigned long depth, int v)
928 {
929 DTRACE;
930
931 switch (depth) {
932 case 8:
933 return (v >> 4);
934 case 12:
935 case 15:
936 case 16:
937 return (v >> 3);
938 case 32:
939 return (v >> 2);
940 }
941 DPRINTK(1, "Unsupported depth %ld\n", depth);
942 return (0);
943 }
944
pm3fb_Unshiftbpp(struct pm3fb_info * l_fb_info,unsigned long depth,int v)945 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
946 unsigned long depth, int v)
947 {
948 DTRACE;
949
950 switch (depth) {
951 case 8:
952 return (v << 4);
953 case 12:
954 case 15:
955 case 16:
956 return (v << 3);
957 case 32:
958 return (v << 2);
959 }
960 DPRINTK(1, "Unsupported depth %ld\n", depth);
961 return (0);
962 }
963
pm3fb_mapIO(struct pm3fb_info * l_fb_info)964 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info)
965 {
966 DTRACE;
967
968 l_fb_info->vIOBase =
969 ioremap((unsigned long) l_fb_info->pIOBase, PM3_REGS_SIZE);
970 l_fb_info->v_fb =
971 ioremap((unsigned long) l_fb_info->p_fb, l_fb_info->fb_size);
972 DPRINTK(2, "IO mapping : IOBase %lx / %lx, fb %lx / %lx\n",
973 (unsigned long) l_fb_info->pIOBase,
974 (unsigned long) l_fb_info->vIOBase,
975 (unsigned long) l_fb_info->p_fb,
976 (unsigned long) l_fb_info->v_fb);
977 }
978
pm3fb_unmapIO(struct pm3fb_info * l_fb_info)979 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info)
980 {
981 DTRACE;
982
983 iounmap(l_fb_info->vIOBase);
984 iounmap(l_fb_info->v_fb);
985 l_fb_info->vIOBase = (unsigned char *) -1;
986 l_fb_info->v_fb = (unsigned char *) -1;
987 }
988
989 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
pm3fb_show_cur_mode(struct pm3fb_info * l_fb_info)990 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info)
991 {
992 DPRINTK(2, "PM3Aperture0: 0x%08x\n", PM3_READ_REG(PM3Aperture0));
993 DPRINTK(2, "PM3Aperture1: 0x%08x\n", PM3_READ_REG(PM3Aperture1));
994 DPRINTK(2, "PM3ByAperture1Mode: 0x%08x\n",
995 PM3_READ_REG(PM3ByAperture1Mode));
996 DPRINTK(2, "PM3ByAperture2Mode: 0x%08x\n",
997 PM3_READ_REG(PM3ByAperture2Mode));
998 DPRINTK(2, "PM3ChipConfig: 0x%08x\n", PM3_READ_REG(PM3ChipConfig));
999 DPRINTK(2, "PM3FIFODis: 0x%08x\n", PM3_READ_REG(PM3FIFODis));
1000 DPRINTK(2, "PM3HTotal: 0x%08x\n", PM3_READ_REG(PM3HTotal));
1001 DPRINTK(2, "PM3HbEnd: 0x%08x\n", PM3_READ_REG(PM3HbEnd));
1002 DPRINTK(2, "PM3HgEnd: 0x%08x\n", PM3_READ_REG(PM3HgEnd));
1003 DPRINTK(2, "PM3HsEnd: 0x%08x\n", PM3_READ_REG(PM3HsEnd));
1004 DPRINTK(2, "PM3HsStart: 0x%08x\n", PM3_READ_REG(PM3HsStart));
1005 DPRINTK(2, "PM3MemBypassWriteMask: 0x%08x\n",
1006 PM3_READ_REG(PM3MemBypassWriteMask));
1007 DPRINTK(2, "PM3RD_IndexControl: 0x%08x\n",
1008 PM3_READ_REG(PM3RD_IndexControl));
1009 DPRINTK(2, "PM3ScreenBase: 0x%08x\n", PM3_READ_REG(PM3ScreenBase));
1010 DPRINTK(2, "PM3ScreenStride: 0x%08x\n",
1011 PM3_READ_REG(PM3ScreenStride));
1012 DPRINTK(2, "PM3VClkCtl: 0x%08x\n", PM3_READ_REG(PM3VClkCtl));
1013 DPRINTK(2, "PM3VTotal: 0x%08x\n", PM3_READ_REG(PM3VTotal));
1014 DPRINTK(2, "PM3VbEnd: 0x%08x\n", PM3_READ_REG(PM3VbEnd));
1015 DPRINTK(2, "PM3VideoControl: 0x%08x\n",
1016 PM3_READ_REG(PM3VideoControl));
1017 DPRINTK(2, "PM3VsEnd: 0x%08x\n", PM3_READ_REG(PM3VsEnd));
1018 DPRINTK(2, "PM3VsStart: 0x%08x\n", PM3_READ_REG(PM3VsStart));
1019
1020 DPRINTK(2, "PM3RD_ColorFormat: %ld\n",
1021 PM3_READ_DAC_REG(PM3RD_ColorFormat));
1022 DPRINTK(2, "PM3RD_DACControl: %ld\n",
1023 PM3_READ_DAC_REG(PM3RD_DACControl));
1024 DPRINTK(2, "PM3RD_DClk0FeedbackScale: %ld\n",
1025 PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale));
1026 DPRINTK(2, "PM3RD_DClk0PostScale: %ld\n",
1027 PM3_READ_DAC_REG(PM3RD_DClk0PostScale));
1028 DPRINTK(2, "PM3RD_DClk0PreScale: %ld\n",
1029 PM3_READ_DAC_REG(PM3RD_DClk0PreScale));
1030 DPRINTK(2, "[not set] PM3RD_IndexControl: %ld\n",
1031 PM3_READ_DAC_REG(PM3RD_IndexControl));
1032 DPRINTK(2, "PM3RD_MiscControl: %ld\n",
1033 PM3_READ_DAC_REG(PM3RD_MiscControl));
1034 DPRINTK(2, "PM3RD_PixelSize: %ld\n",
1035 PM3_READ_DAC_REG(PM3RD_PixelSize));
1036 DPRINTK(2, "PM3RD_SyncControl: %ld\n",
1037 PM3_READ_DAC_REG(PM3RD_SyncControl));
1038 }
1039
1040 #endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2) */
pm3fb_show_cur_timing(struct pm3fb_info * l_fb_info)1041 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info)
1042 {
1043 u16 subvendor, subdevice;
1044
1045 if ((!pci_read_config_word
1046 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1047 &&
1048 (!pci_read_config_word
1049 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1050 /* well, nothing... */
1051 } else {
1052 subvendor = subdevice = (u16)-1;
1053 }
1054
1055 printk(KERN_INFO "pm3fb: memory timings for board #%ld (subvendor: 0x%hx, subdevice: 0x%hx)\n", l_fb_info->board_num, subvendor, subdevice);
1056 printk(KERN_INFO " PM3LocalMemCaps: 0x%08x\n",
1057 PM3_READ_REG(PM3LocalMemCaps));
1058 printk(KERN_INFO " PM3LocalMemTimings: 0x%08x\n",
1059 PM3_READ_REG(PM3LocalMemTimings));
1060 printk(KERN_INFO " PM3LocalMemControl: 0x%08x\n",
1061 PM3_READ_REG(PM3LocalMemControl));
1062 printk(KERN_INFO " PM3LocalMemRefresh: 0x%08x\n",
1063 PM3_READ_REG(PM3LocalMemRefresh));
1064 printk(KERN_INFO " PM3LocalMemPowerDown: 0x%08x\n",
1065 PM3_READ_REG(PM3LocalMemPowerDown));
1066 }
1067
1068 /* write the mode to registers */
pm3fb_write_mode(struct pm3fb_info * l_fb_info)1069 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info)
1070 {
1071 char tempsync = 0x00, tempmisc = 0x00;
1072 DTRACE;
1073
1074 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xffffffff);
1075 PM3_SLOW_WRITE_REG(PM3Aperture0, 0x00000000);
1076 PM3_SLOW_WRITE_REG(PM3Aperture1, 0x00000000);
1077 PM3_SLOW_WRITE_REG(PM3FIFODis, 0x00000007);
1078
1079 PM3_SLOW_WRITE_REG(PM3HTotal,
1080 pm3fb_Shiftbpp(l_fb_info,
1081 l_fb_info->current_par->depth,
1082 l_fb_info->current_par->htotal -
1083 1));
1084 PM3_SLOW_WRITE_REG(PM3HsEnd,
1085 pm3fb_Shiftbpp(l_fb_info,
1086 l_fb_info->current_par->depth,
1087 l_fb_info->current_par->hsend));
1088 PM3_SLOW_WRITE_REG(PM3HsStart,
1089 pm3fb_Shiftbpp(l_fb_info,
1090 l_fb_info->current_par->depth,
1091 l_fb_info->current_par->
1092 hsstart));
1093 PM3_SLOW_WRITE_REG(PM3HbEnd,
1094 pm3fb_Shiftbpp(l_fb_info,
1095 l_fb_info->current_par->depth,
1096 l_fb_info->current_par->hbend));
1097 PM3_SLOW_WRITE_REG(PM3HgEnd,
1098 pm3fb_Shiftbpp(l_fb_info,
1099 l_fb_info->current_par->depth,
1100 l_fb_info->current_par->hbend));
1101 PM3_SLOW_WRITE_REG(PM3ScreenStride,
1102 pm3fb_Shiftbpp(l_fb_info,
1103 l_fb_info->current_par->depth,
1104 l_fb_info->current_par->stride));
1105 PM3_SLOW_WRITE_REG(PM3VTotal, l_fb_info->current_par->vtotal - 1);
1106 PM3_SLOW_WRITE_REG(PM3VsEnd, l_fb_info->current_par->vsend - 1);
1107 PM3_SLOW_WRITE_REG(PM3VsStart,
1108 l_fb_info->current_par->vsstart - 1);
1109 PM3_SLOW_WRITE_REG(PM3VbEnd, l_fb_info->current_par->vbend);
1110
1111 switch (l_fb_info->current_par->depth) {
1112 case 8:
1113 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1114 PM3ByApertureMode_PIXELSIZE_8BIT);
1115 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1116 PM3ByApertureMode_PIXELSIZE_8BIT);
1117 break;
1118
1119 case 12:
1120 case 15:
1121 case 16:
1122 #ifndef __BIG_ENDIAN
1123 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1124 PM3ByApertureMode_PIXELSIZE_16BIT);
1125 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1126 PM3ByApertureMode_PIXELSIZE_16BIT);
1127 #else
1128 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1129 PM3ByApertureMode_PIXELSIZE_16BIT |
1130 PM3ByApertureMode_BYTESWAP_BADC);
1131 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1132 PM3ByApertureMode_PIXELSIZE_16BIT |
1133 PM3ByApertureMode_BYTESWAP_BADC);
1134 #endif /* ! __BIG_ENDIAN */
1135 break;
1136
1137 case 32:
1138 #ifndef __BIG_ENDIAN
1139 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1140 PM3ByApertureMode_PIXELSIZE_32BIT);
1141 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1142 PM3ByApertureMode_PIXELSIZE_32BIT);
1143 #else
1144 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1145 PM3ByApertureMode_PIXELSIZE_32BIT |
1146 PM3ByApertureMode_BYTESWAP_DCBA);
1147 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1148 PM3ByApertureMode_PIXELSIZE_32BIT |
1149 PM3ByApertureMode_BYTESWAP_DCBA);
1150 #endif /* ! __BIG_ENDIAN */
1151 break;
1152
1153 default:
1154 DPRINTK(1, "Unsupported depth %d\n",
1155 l_fb_info->current_par->depth);
1156 break;
1157 }
1158
1159 /*
1160 * Oxygen VX1 - it appears that setting PM3VideoControl and
1161 * then PM3RD_SyncControl to the same SYNC settings undoes
1162 * any net change - they seem to xor together. Only set the
1163 * sync options in PM3RD_SyncControl. --rmk
1164 */
1165 {
1166 unsigned int video = l_fb_info->current_par->video;
1167
1168 video &= ~(PM3VideoControl_HSYNC_MASK |
1169 PM3VideoControl_VSYNC_MASK);
1170 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
1171 PM3VideoControl_VSYNC_ACTIVE_HIGH;
1172 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
1173 }
1174 PM3_SLOW_WRITE_REG(PM3VClkCtl,
1175 (PM3_READ_REG(PM3VClkCtl) & 0xFFFFFFFC));
1176 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
1177 PM3_SLOW_WRITE_REG(PM3ChipConfig,
1178 (PM3_READ_REG(PM3ChipConfig) & 0xFFFFFFFD));
1179
1180 {
1181 unsigned char m; /* ClkPreScale */
1182 unsigned char n; /* ClkFeedBackScale */
1183 unsigned char p; /* ClkPostScale */
1184 (void)pm3fb_CalculateClock(l_fb_info, l_fb_info->current_par->pixclock, PM3_REF_CLOCK, &m, &n, &p);
1185
1186 DPRINTK(2,
1187 "Pixclock: %d, Pre: %d, Feedback: %d, Post: %d\n",
1188 l_fb_info->current_par->pixclock, (int) m, (int) n,
1189 (int) p);
1190
1191 PM3_WRITE_DAC_REG(PM3RD_DClk0PreScale, m);
1192 PM3_WRITE_DAC_REG(PM3RD_DClk0FeedbackScale, n);
1193 PM3_WRITE_DAC_REG(PM3RD_DClk0PostScale, p);
1194 }
1195 /*
1196 PM3_WRITE_DAC_REG(PM3RD_IndexControl, 0x00);
1197 */
1198 /*
1199 PM3_SLOW_WRITE_REG(PM3RD_IndexControl, 0x00);
1200 */
1201 if ((l_fb_info->current_par->video & PM3VideoControl_HSYNC_MASK) ==
1202 PM3VideoControl_HSYNC_ACTIVE_HIGH)
1203 tempsync |= PM3RD_SyncControl_HSYNC_ACTIVE_HIGH;
1204 if ((l_fb_info->current_par->video & PM3VideoControl_VSYNC_MASK) ==
1205 PM3VideoControl_VSYNC_ACTIVE_HIGH)
1206 tempsync |= PM3RD_SyncControl_VSYNC_ACTIVE_HIGH;
1207
1208 PM3_WRITE_DAC_REG(PM3RD_SyncControl, tempsync);
1209 DPRINTK(2, "PM3RD_SyncControl: %d\n", tempsync);
1210
1211 if (flatpanel[l_fb_info->board_num])
1212 {
1213 PM3_WRITE_DAC_REG(PM3RD_DACControl, PM3RD_DACControl_BLANK_PEDESTAL_ENABLE);
1214 PM3_WAIT(2);
1215 PM3_WRITE_REG(PM3VSConfiguration, 0x06);
1216 PM3_WRITE_REG(0x5a00, 1 << 14); /* black magic... */
1217 tempmisc = PM3RD_MiscControl_VSB_OUTPUT_ENABLE;
1218 }
1219 else
1220 PM3_WRITE_DAC_REG(PM3RD_DACControl, 0x00);
1221
1222 switch (l_fb_info->current_par->depth) {
1223 case 8:
1224 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1225 PM3RD_PixelSize_8_BIT_PIXELS);
1226 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1227 PM3RD_ColorFormat_CI8_COLOR |
1228 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1229 tempmisc |= PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1230 break;
1231 case 12:
1232 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1233 PM3RD_PixelSize_16_BIT_PIXELS);
1234 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1235 PM3RD_ColorFormat_4444_COLOR |
1236 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1237 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1238 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1239 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1240 break;
1241 case 15:
1242 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1243 PM3RD_PixelSize_16_BIT_PIXELS);
1244 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1245 PM3RD_ColorFormat_5551_FRONT_COLOR |
1246 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1247 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1248 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1249 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1250 break;
1251 case 16:
1252 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1253 PM3RD_PixelSize_16_BIT_PIXELS);
1254 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1255 PM3RD_ColorFormat_565_FRONT_COLOR |
1256 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1257 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1258 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1259 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1260 break;
1261 case 32:
1262 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1263 PM3RD_PixelSize_32_BIT_PIXELS);
1264 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1265 PM3RD_ColorFormat_8888_COLOR |
1266 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1267 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1268 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1269 break;
1270 }
1271 PM3_WRITE_DAC_REG(PM3RD_MiscControl, tempmisc);
1272
1273 PM3_SHOW_CUR_MODE;
1274 }
1275
pm3fb_read_mode(struct pm3fb_info * l_fb_info,struct pm3fb_par * curpar)1276 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
1277 struct pm3fb_par *curpar)
1278 {
1279 unsigned long pixsize1, pixsize2, clockused;
1280 unsigned long pre, feedback, post;
1281
1282 DTRACE;
1283
1284 clockused = PM3_READ_REG(PM3VClkCtl);
1285
1286 switch (clockused) {
1287 case 3:
1288 pre = PM3_READ_DAC_REG(PM3RD_DClk3PreScale);
1289 feedback = PM3_READ_DAC_REG(PM3RD_DClk3FeedbackScale);
1290 post = PM3_READ_DAC_REG(PM3RD_DClk3PostScale);
1291
1292 DPRINTK(2,
1293 "DClk3 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1294 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1295 feedback,
1296 post));
1297 break;
1298 case 2:
1299 pre = PM3_READ_DAC_REG(PM3RD_DClk2PreScale);
1300 feedback = PM3_READ_DAC_REG(PM3RD_DClk2FeedbackScale);
1301 post = PM3_READ_DAC_REG(PM3RD_DClk2PostScale);
1302
1303 DPRINTK(2,
1304 "DClk2 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1305 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1306 feedback,
1307 post));
1308 break;
1309 case 1:
1310 pre = PM3_READ_DAC_REG(PM3RD_DClk1PreScale);
1311 feedback = PM3_READ_DAC_REG(PM3RD_DClk1FeedbackScale);
1312 post = PM3_READ_DAC_REG(PM3RD_DClk1PostScale);
1313
1314 DPRINTK(2,
1315 "DClk1 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1316 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1317 feedback,
1318 post));
1319 break;
1320 case 0:
1321 pre = PM3_READ_DAC_REG(PM3RD_DClk0PreScale);
1322 feedback = PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale);
1323 post = PM3_READ_DAC_REG(PM3RD_DClk0PostScale);
1324
1325 DPRINTK(2,
1326 "DClk0 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1327 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1328 feedback,
1329 post));
1330 break;
1331 default:
1332 pre = feedback = post = 0;
1333 DPRINTK(1, "Unknowk D clock used : %ld\n", clockused);
1334 break;
1335 }
1336
1337 curpar->pixclock = PM3_SCALE_TO_CLOCK(pre, feedback, post);
1338
1339 pixsize1 =
1340 PM3ByApertureMode_PIXELSIZE_MASK &
1341 (PM3_READ_REG(PM3ByAperture1Mode));
1342 pixsize2 =
1343 PM3ByApertureMode_PIXELSIZE_MASK &
1344 (PM3_READ_REG(PM3ByAperture2Mode));
1345
1346 DASSERT((pixsize1 == pixsize2),
1347 "pixsize the same in both aperture\n");
1348
1349 if (pixsize1 & PM3ByApertureMode_PIXELSIZE_32BIT)
1350 curpar->depth = 32;
1351 else if (pixsize1 & PM3ByApertureMode_PIXELSIZE_16BIT)
1352 {
1353 curpar->depth = 16;
1354 }
1355 else
1356 curpar->depth = 8;
1357
1358 /* not sure if I need to add one on the next ; it give better result with */
1359 curpar->htotal =
1360 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1361 1 + PM3_READ_REG(PM3HTotal));
1362 curpar->hsend =
1363 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1364 PM3_READ_REG(PM3HsEnd));
1365 curpar->hsstart =
1366 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1367 PM3_READ_REG(PM3HsStart));
1368 curpar->hbend =
1369 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1370 PM3_READ_REG(PM3HbEnd));
1371
1372 curpar->stride =
1373 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1374 PM3_READ_REG(PM3ScreenStride));
1375
1376 curpar->vtotal = 1 + PM3_READ_REG(PM3VTotal);
1377 curpar->vsend = 1 + PM3_READ_REG(PM3VsEnd);
1378 curpar->vsstart = 1 + PM3_READ_REG(PM3VsStart);
1379 curpar->vbend = PM3_READ_REG(PM3VbEnd);
1380
1381 curpar->video = PM3_READ_REG(PM3VideoControl);
1382
1383 curpar->base = PM3_READ_REG(PM3ScreenBase);
1384 curpar->width = curpar->htotal - curpar->hbend; /* make virtual == displayed resolution */
1385 curpar->height = curpar->vtotal - curpar->vbend;
1386
1387 DPRINTK(2, "Found : %d * %d, %d Khz, stride is %08x\n",
1388 curpar->width, curpar->height, curpar->pixclock,
1389 curpar->stride);
1390 }
1391
pm3fb_size_memory(struct pm3fb_info * l_fb_info)1392 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info)
1393 {
1394 unsigned long memsize = 0, tempBypass, i, temp1, temp2;
1395 u16 subvendor, subdevice;
1396 pm3fb_timing_result ptr;
1397
1398 DTRACE;
1399
1400 l_fb_info->fb_size = 64 * 1024 * 1024; /* pm3 aperture always 64 MB */
1401 pm3fb_mapIO(l_fb_info); /* temporary map IO */
1402
1403 DASSERT((l_fb_info->vIOBase != NULL),
1404 "IO successfully mapped before mem detect\n");
1405 DASSERT((l_fb_info->v_fb != NULL),
1406 "FB successfully mapped before mem detect\n");
1407
1408 /* card-specific stuff, *before* accessing *any* FB memory */
1409 if ((!pci_read_config_word
1410 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1411 &&
1412 (!pci_read_config_word
1413 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1414 i = 0; l_fb_info->board_type = 0;
1415 while ((cardbase[i].cardname[0]) && !(l_fb_info->board_type)) {
1416 if ((cardbase[i].subvendor == subvendor) &&
1417 (cardbase[i].subdevice == subdevice) &&
1418 (cardbase[i].func == PCI_FUNC(l_fb_info->dev->devfn))) {
1419 DPRINTK(2, "Card #%ld is an %s\n",
1420 l_fb_info->board_num,
1421 cardbase[i].cardname);
1422 if (cardbase[i].specific_setup)
1423 cardbase[i].specific_setup(l_fb_info);
1424 l_fb_info->board_type = i;
1425 }
1426 i++;
1427 }
1428 if (!l_fb_info->board_type) {
1429 DPRINTK(1, "Card #%ld is an unknown 0x%04x / 0x%04x\n",
1430 l_fb_info->board_num, subvendor, subdevice);
1431 }
1432 } else {
1433 printk(KERN_ERR "pm3fb: Error: pci_read_config_word failed, board #%ld\n",
1434 l_fb_info->board_num);
1435 }
1436
1437 if (printtimings)
1438 pm3fb_show_cur_timing(l_fb_info);
1439
1440 /* card-specific setup is done, we preserve the final
1441 memory timing for future reference */
1442 if ((ptr = pm3fb_preserve_memory_timings(l_fb_info)) == pm3fb_timing_problem) { /* memory timings were wrong ! oops.... */
1443 return(0);
1444 }
1445
1446 tempBypass = PM3_READ_REG(PM3MemBypassWriteMask);
1447
1448 DPRINTK(2, "PM3MemBypassWriteMask was: 0x%08lx\n", tempBypass);
1449
1450 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xFFFFFFFF);
1451
1452 /* pm3 split up memory, replicates, and do a lot of nasty stuff IMHO ;-) */
1453 for (i = 0; i < 32; i++) {
1454 #ifdef KERNEL_2_2
1455 #ifdef MUST_BYTESWAP
1456 writel(__swab32(i * 0x00345678),
1457 (l_fb_info->v_fb + (i * 1048576)));
1458 #else
1459 writel(i * 0x00345678, (l_fb_info->v_fb + (i * 1048576)));
1460 #endif
1461 mb();
1462 #ifdef MUST_BYTESWAP
1463 temp1 = __swab32(readl((l_fb_info->v_fb + (i * 1048576))));
1464 #else
1465 temp1 = readl((l_fb_info->v_fb + (i * 1048576)));
1466 #endif
1467 #endif /* KERNEL_2_2 */
1468 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1469 fb_writel(i * 0x00345678,
1470 (l_fb_info->v_fb + (i * 1048576)));
1471 mb();
1472 temp1 = fb_readl((l_fb_info->v_fb + (i * 1048576)));
1473 #endif /* KERNEL_2_4 or KERNEL_2_5 */
1474 /* Let's check for wrapover, write will fail at 16MB boundary */
1475 if (temp1 == (i * 0x00345678))
1476 memsize = i;
1477 else
1478 break;
1479 }
1480
1481 DPRINTK(2, "First detect pass already got %ld MB\n", memsize + 1);
1482
1483 if (memsize == i) {
1484 for (i = 0; i < 32; i++) {
1485 /* Clear first 32MB ; 0 is 0, no need to byteswap */
1486 writel(0x0000000,
1487 (l_fb_info->v_fb + (i * 1048576)));
1488 mb();
1489 }
1490
1491 for (i = 32; i < 64; i++) {
1492 #ifdef KERNEL_2_2
1493 #ifdef MUST_BYTESWAP
1494 writel(__swab32(i * 0x00345678),
1495 (l_fb_info->v_fb + (i * 1048576)));
1496 #else
1497 writel(i * 0x00345678,
1498 (l_fb_info->v_fb + (i * 1048576)));
1499 #endif
1500 mb();
1501 #ifdef MUST_BYTESWAP
1502 temp1 =
1503 __swab32(readl
1504 ((l_fb_info->v_fb + (i * 1048576))));
1505 temp2 =
1506 __swab32(readl
1507 ((l_fb_info->v_fb +
1508 ((i - 32) * 1048576))));
1509 #else
1510 temp1 = readl((l_fb_info->v_fb + (i * 1048576)));
1511 temp2 =
1512 readl((l_fb_info->v_fb +
1513 ((i - 32) * 1048576)));
1514 #endif
1515 #endif /* KERNEL_2_2 */
1516 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1517 fb_writel(i * 0x00345678,
1518 (l_fb_info->v_fb + (i * 1048576)));
1519 mb();
1520 temp1 =
1521 fb_readl((l_fb_info->v_fb + (i * 1048576)));
1522 temp2 =
1523 fb_readl((l_fb_info->v_fb +
1524 ((i - 32) * 1048576)));
1525 #endif /* KERNEL_2_4 or KERNEL_2_5 */
1526 if ((temp1 == (i * 0x00345678)) && (temp2 == 0)) /* different value, different RAM... */
1527 memsize = i;
1528 else
1529 break;
1530 }
1531 }
1532
1533 DPRINTK(2, "Second detect pass got %ld MB\n", memsize + 1);
1534
1535 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, tempBypass);
1536
1537 pm3fb_unmapIO(l_fb_info);
1538 memsize = 1048576 * (memsize + 1);
1539
1540 DPRINTK(2, "Returning 0x%08lx bytes\n", memsize);
1541
1542 if (forcesize[l_fb_info->board_num] && ((forcesize[l_fb_info->board_num] * 1048576) != memsize))
1543 {
1544 printk(KERN_WARNING "pm3fb: mismatch between probed (%ld MB) and specified (%hd MB) memory size, using SPECIFIED !\n", memsize, forcesize[l_fb_info->board_num]);
1545 memsize = 1048576 * forcesize[l_fb_info->board_num];
1546 }
1547
1548 l_fb_info->fb_size = memsize;
1549
1550 if (ptr == pm3fb_timing_retry)
1551 {
1552 printk(KERN_WARNING "pm3fb: retrying memory timings check");
1553 if (pm3fb_try_memory_timings(l_fb_info) == pm3fb_timing_problem)
1554 return(0);
1555 }
1556
1557 return (memsize);
1558 }
1559
pm3fb_clear_memory(struct pm3fb_info * l_fb_info,u32 cc)1560 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc)
1561 {
1562 int i;
1563
1564 DTRACE;
1565
1566 for (i = 0; i < (l_fb_info->fb_size / sizeof(u32)) ; i++) /* clear entire FB memory to black */
1567 {
1568 #ifdef KERNEL_2_2
1569 #ifdef MUST_BYTESWAP
1570 writel(__swab32(cc), (l_fb_info->v_fb + (i * sizeof(u32))));
1571 #else
1572 writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1573 #endif
1574 #endif
1575 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
1576 fb_writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1577 #endif
1578 }
1579 }
1580
pm3fb_clear_colormap(struct pm3fb_info * l_fb_info,unsigned char r,unsigned char g,unsigned char b)1581 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b)
1582 {
1583 int i;
1584
1585 DTRACE;
1586
1587 for (i = 0; i < 256 ; i++) /* fill color map with white */
1588 pm3fb_set_color(l_fb_info, i, r, g, b);
1589
1590 }
1591
1592 /* common initialisation */
pm3fb_common_init(struct pm3fb_info * l_fb_info)1593 static void pm3fb_common_init(struct pm3fb_info *l_fb_info)
1594 {
1595 DTRACE;
1596
1597 DPRINTK(2, "Initializing board #%ld @ %lx\n", l_fb_info->board_num,
1598 (unsigned long) l_fb_info);
1599
1600 strcpy(l_fb_info->gen.info.modename, permedia3_name);
1601 disp[l_fb_info->board_num].scrollmode = 0; /* SCROLL_YNOMOVE; *//* 0 means "let fbcon choose" */
1602 l_fb_info->gen.parsize = sizeof(struct pm3fb_par);
1603 l_fb_info->gen.info.changevar = NULL;
1604 l_fb_info->gen.info.node = B_FREE;
1605 l_fb_info->gen.info.fbops = &pm3fb_ops;
1606 l_fb_info->gen.info.disp = &(disp[l_fb_info->board_num]);
1607 if (fontn[l_fb_info->board_num][0])
1608 strcpy(l_fb_info->gen.info.fontname,
1609 fontn[l_fb_info->board_num]);
1610 l_fb_info->gen.info.switch_con = &fbgen_switch;
1611 l_fb_info->gen.info.updatevar = &fbgen_update_var; /* */
1612 l_fb_info->gen.info.blank = &fbgen_blank; /* */
1613 l_fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
1614
1615 pm3fb_mapIO(l_fb_info);
1616
1617 pm3fb_clear_memory(l_fb_info, 0);
1618 pm3fb_clear_colormap(l_fb_info, 0, 0, 0);
1619
1620 (void) fbgen_get_var(&(disp[l_fb_info->board_num]).var, -1,
1621 &l_fb_info->gen.info);
1622
1623 if (depth[l_fb_info->board_num]) /* override mode-defined depth */
1624 {
1625 pm3fb_encode_depth(&(disp[l_fb_info->board_num]).var, depth[l_fb_info->board_num]);
1626 (disp[l_fb_info->board_num]).var.bits_per_pixel = depth2bpp(depth[l_fb_info->board_num]);
1627 }
1628
1629 (void) fbgen_do_set_var(&(disp[l_fb_info->board_num]).var, 1,
1630 &l_fb_info->gen);
1631
1632 fbgen_set_disp(-1, &l_fb_info->gen);
1633
1634 fbgen_install_cmap(0, &l_fb_info->gen);
1635
1636 if (register_framebuffer(&l_fb_info->gen.info) < 0) {
1637 DPRINTK(1, "Couldn't register framebuffer\n");
1638 return;
1639 }
1640
1641 PM3_WRITE_DAC_REG(PM3RD_CursorMode,
1642 PM3RD_CursorMode_CURSOR_DISABLE);
1643
1644 PM3_SHOW_CUR_MODE;
1645
1646 pm3fb_write_mode(l_fb_info);
1647
1648 printk("fb%d: %s, using %uK of video memory (%s)\n",
1649 GET_FB_IDX(l_fb_info->gen.info.node),
1650 permedia3_name, (u32) (l_fb_info->fb_size >> 10),
1651 cardbase[l_fb_info->board_type].cardname);
1652 }
1653
1654 /* **************************************************** */
1655 /* ***** accelerated permedia3-specific functions ***** */
1656 /* **************************************************** */
1657 #ifdef PM3FB_USE_ACCEL
pm3fb_wait_pm3(struct pm3fb_info * l_fb_info)1658 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info)
1659 {
1660 DTRACE;
1661
1662 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1663 PM3_SLOW_WRITE_REG(PM3Sync, 0);
1664 mb();
1665 do {
1666 while ((PM3_READ_REG(PM3OutFIFOWords)) == 0);
1667 rmb();
1668 } while ((PM3_READ_REG(PM3OutputFifo)) != PM3Sync_Tag);
1669 }
1670
pm3fb_init_engine(struct pm3fb_info * l_fb_info)1671 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info)
1672 {
1673 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1674 PM3_SLOW_WRITE_REG(PM3StatisticMode, 0x0);
1675 PM3_SLOW_WRITE_REG(PM3DeltaMode, 0x0);
1676 PM3_SLOW_WRITE_REG(PM3RasterizerMode, 0x0);
1677 PM3_SLOW_WRITE_REG(PM3ScissorMode, 0x0);
1678 PM3_SLOW_WRITE_REG(PM3LineStippleMode, 0x0);
1679 PM3_SLOW_WRITE_REG(PM3AreaStippleMode, 0x0);
1680 PM3_SLOW_WRITE_REG(PM3GIDMode, 0x0);
1681 PM3_SLOW_WRITE_REG(PM3DepthMode, 0x0);
1682 PM3_SLOW_WRITE_REG(PM3StencilMode, 0x0);
1683 PM3_SLOW_WRITE_REG(PM3StencilData, 0x0);
1684 PM3_SLOW_WRITE_REG(PM3ColorDDAMode, 0x0);
1685 PM3_SLOW_WRITE_REG(PM3TextureCoordMode, 0x0);
1686 PM3_SLOW_WRITE_REG(PM3TextureIndexMode0, 0x0);
1687 PM3_SLOW_WRITE_REG(PM3TextureIndexMode1, 0x0);
1688 PM3_SLOW_WRITE_REG(PM3TextureReadMode, 0x0);
1689 PM3_SLOW_WRITE_REG(PM3LUTMode, 0x0);
1690 PM3_SLOW_WRITE_REG(PM3TextureFilterMode, 0x0);
1691 PM3_SLOW_WRITE_REG(PM3TextureCompositeMode, 0x0);
1692 PM3_SLOW_WRITE_REG(PM3TextureApplicationMode, 0x0);
1693 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode1, 0x0);
1694 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode1, 0x0);
1695 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode0, 0x0);
1696 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode0, 0x0);
1697 PM3_SLOW_WRITE_REG(PM3FogMode, 0x0);
1698 PM3_SLOW_WRITE_REG(PM3ChromaTestMode, 0x0);
1699 PM3_SLOW_WRITE_REG(PM3AlphaTestMode, 0x0);
1700 PM3_SLOW_WRITE_REG(PM3AntialiasMode, 0x0);
1701 PM3_SLOW_WRITE_REG(PM3YUVMode, 0x0);
1702 PM3_SLOW_WRITE_REG(PM3AlphaBlendColorMode, 0x0);
1703 PM3_SLOW_WRITE_REG(PM3AlphaBlendAlphaMode, 0x0);
1704 PM3_SLOW_WRITE_REG(PM3DitherMode, 0x0);
1705 PM3_SLOW_WRITE_REG(PM3LogicalOpMode, 0x0);
1706 PM3_SLOW_WRITE_REG(PM3RouterMode, 0x0);
1707 PM3_SLOW_WRITE_REG(PM3Window, 0x0);
1708
1709 PM3_SLOW_WRITE_REG(PM3Config2D, 0x0);
1710
1711 PM3_SLOW_WRITE_REG(PM3SpanColorMask, 0xffffffff);
1712
1713 PM3_SLOW_WRITE_REG(PM3XBias, 0x0);
1714 PM3_SLOW_WRITE_REG(PM3YBias, 0x0);
1715 PM3_SLOW_WRITE_REG(PM3DeltaControl, 0x0);
1716
1717 PM3_SLOW_WRITE_REG(PM3BitMaskPattern, 0xffffffff);
1718
1719 PM3_SLOW_WRITE_REG(PM3FBDestReadEnables,
1720 PM3FBDestReadEnables_E(0xff) |
1721 PM3FBDestReadEnables_R(0xff) |
1722 PM3FBDestReadEnables_ReferenceAlpha(0xff));
1723 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferAddr0, 0x0);
1724 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferOffset0, 0x0);
1725 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferWidth0,
1726 PM3FBDestReadBufferWidth_Width(l_fb_info->
1727 current_par->
1728 width));
1729
1730 PM3_SLOW_WRITE_REG(PM3FBDestReadMode,
1731 PM3FBDestReadMode_ReadEnable |
1732 PM3FBDestReadMode_Enable0);
1733 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferAddr, 0x0);
1734 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferOffset, 0x0);
1735 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferWidth,
1736 PM3FBSourceReadBufferWidth_Width(l_fb_info->
1737 current_par->
1738 width));
1739 PM3_SLOW_WRITE_REG(PM3FBSourceReadMode,
1740 PM3FBSourceReadMode_Blocking |
1741 PM3FBSourceReadMode_ReadEnable);
1742
1743 {
1744 unsigned long rm = 1;
1745 switch (l_fb_info->current_par->depth) {
1746 case 8:
1747 PM3_SLOW_WRITE_REG(PM3PixelSize,
1748 PM3PixelSize_GLOBAL_8BIT);
1749 break;
1750 case 12:
1751 case 15:
1752 case 16:
1753 PM3_SLOW_WRITE_REG(PM3PixelSize,
1754 PM3PixelSize_GLOBAL_16BIT);
1755 break;
1756 case 32:
1757 PM3_SLOW_WRITE_REG(PM3PixelSize,
1758 PM3PixelSize_GLOBAL_32BIT);
1759 break;
1760 default:
1761 DPRINTK(1, "Unsupported depth %d\n",
1762 l_fb_info->current_par->depth);
1763 break;
1764 }
1765 PM3_SLOW_WRITE_REG(PM3RasterizerMode, rm);
1766 }
1767
1768 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xffffffff);
1769 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xffffffff);
1770 PM3_SLOW_WRITE_REG(PM3FBWriteMode,
1771 PM3FBWriteMode_WriteEnable |
1772 PM3FBWriteMode_OpaqueSpan |
1773 PM3FBWriteMode_Enable0);
1774 PM3_SLOW_WRITE_REG(PM3FBWriteBufferAddr0, 0x0);
1775 PM3_SLOW_WRITE_REG(PM3FBWriteBufferOffset0, 0x0);
1776 PM3_SLOW_WRITE_REG(PM3FBWriteBufferWidth0,
1777 PM3FBWriteBufferWidth_Width(l_fb_info->
1778 current_par->
1779 width));
1780
1781 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 0x0);
1782 {
1783 unsigned long sofb = (8UL * l_fb_info->fb_size) /
1784 ((depth2bpp(l_fb_info->current_par->depth))
1785 * l_fb_info->current_par->width); /* size in lines of FB */
1786 if (sofb > 4095)
1787 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 4095);
1788 else
1789 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, sofb);
1790
1791 switch (l_fb_info->current_par->depth) {
1792 case 8:
1793 PM3_SLOW_WRITE_REG(PM3DitherMode,
1794 (1 << 10) | (2 << 3));
1795 break;
1796 case 12:
1797 case 15:
1798 case 16:
1799 PM3_SLOW_WRITE_REG(PM3DitherMode,
1800 (1 << 10) | (1 << 3));
1801 break;
1802 case 32:
1803 PM3_SLOW_WRITE_REG(PM3DitherMode,
1804 (1 << 10) | (0 << 3));
1805 break;
1806 default:
1807 DPRINTK(1, "Unsupported depth %d\n",
1808 l_fb_info->current_par->depth);
1809 break;
1810 }
1811 }
1812
1813 PM3_SLOW_WRITE_REG(PM3dXDom, 0x0);
1814 PM3_SLOW_WRITE_REG(PM3dXSub, 0x0);
1815 PM3_SLOW_WRITE_REG(PM3dY, (1 << 16));
1816 PM3_SLOW_WRITE_REG(PM3StartXDom, 0x0);
1817 PM3_SLOW_WRITE_REG(PM3StartXSub, 0x0);
1818 PM3_SLOW_WRITE_REG(PM3StartY, 0x0);
1819 PM3_SLOW_WRITE_REG(PM3Count, 0x0);
1820
1821 /* Disable LocalBuffer. better safe than sorry */
1822 PM3_SLOW_WRITE_REG(PM3LBDestReadMode, 0x0);
1823 PM3_SLOW_WRITE_REG(PM3LBDestReadEnables, 0x0);
1824 PM3_SLOW_WRITE_REG(PM3LBSourceReadMode, 0x0);
1825 PM3_SLOW_WRITE_REG(PM3LBWriteMode, 0x0);
1826
1827 pm3fb_wait_pm3(l_fb_info);
1828 }
1829
1830 #ifdef FBCON_HAS_CFB32
pm3fb_cfb32_clear(struct vc_data * conp,struct display * p,int sy,int sx,int height,int width)1831 static void pm3fb_cfb32_clear(struct vc_data *conp,
1832 struct display *p,
1833 int sy, int sx, int height, int width)
1834 {
1835 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1836 u32 c;
1837
1838 DTRACE;
1839
1840 sx = sx * fontwidth(p);
1841 width = width * fontwidth(p);
1842 sy = sy * fontheight(p);
1843 height = height * fontheight(p);
1844 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1845
1846 /* block fills in 32bpp are hard, but in low res (width <= 1600 :-)
1847 we can use 16bpp operations, but not if NoWriteMask is on (SDRAM) */
1848 if ((l_fb_info->current_par->width > 1600) ||
1849 (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)) {
1850 PM3_WAIT(4);
1851
1852 PM3_WRITE_REG(PM3Config2D,
1853 PM3Config2D_UseConstantSource |
1854 PM3Config2D_ForegroundROPEnable |
1855 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1856 PM3Config2D_FBWriteEnable);
1857
1858 PM3_WRITE_REG(PM3ForegroundColor, c);
1859
1860 PM3_WRITE_REG(PM3RectanglePosition,
1861 (PM3RectanglePosition_XOffset(sx)) |
1862 (PM3RectanglePosition_YOffset(sy)));
1863
1864 PM3_WRITE_REG(PM3Render2D,
1865 PM3Render2D_XPositive |
1866 PM3Render2D_YPositive |
1867 PM3Render2D_Operation_Normal |
1868 PM3Render2D_SpanOperation |
1869 (PM3Render2D_Width(width)) |
1870 (PM3Render2D_Height(height)));
1871 } else {
1872 PM3_WAIT(8);
1873
1874 PM3_WRITE_REG(PM3FBBlockColor, c);
1875
1876 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_16BIT);
1877
1878 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1879 PM3FBWriteBufferWidth_Width(l_fb_info->
1880 current_par->
1881 width << 1));
1882
1883 PM3_WRITE_REG(PM3Config2D,
1884 PM3Config2D_UseConstantSource |
1885 PM3Config2D_ForegroundROPEnable |
1886 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1887 PM3Config2D_FBWriteEnable);
1888
1889 PM3_WRITE_REG(PM3RectanglePosition,
1890 (PM3RectanglePosition_XOffset(sx << 1)) |
1891 (PM3RectanglePosition_YOffset(sy)));
1892
1893 PM3_WRITE_REG(PM3Render2D,
1894 PM3Render2D_XPositive |
1895 PM3Render2D_YPositive |
1896 PM3Render2D_Operation_Normal |
1897 (PM3Render2D_Width(width << 1)) |
1898 (PM3Render2D_Height(height)));
1899
1900 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1901 PM3FBWriteBufferWidth_Width(l_fb_info->
1902 current_par->
1903 width));
1904
1905 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_32BIT);
1906 }
1907
1908 pm3fb_wait_pm3(l_fb_info);
1909 }
1910
pm3fb_cfb32_clear_margins(struct vc_data * conp,struct display * p,int bottom_only)1911 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
1912 struct display *p, int bottom_only)
1913 {
1914 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1915 int sx, sy;
1916 u32 c;
1917
1918 DTRACE;
1919
1920 sx = conp->vc_cols * fontwidth(p); /* right margin */
1921 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1922 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1923
1924 if (!bottom_only) { /* right margin top->bottom */
1925 PM3_WAIT(4);
1926
1927 PM3_WRITE_REG(PM3Config2D,
1928 PM3Config2D_UseConstantSource |
1929 PM3Config2D_ForegroundROPEnable |
1930 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1931 PM3Config2D_FBWriteEnable);
1932
1933 PM3_WRITE_REG(PM3ForegroundColor, c);
1934
1935 PM3_WRITE_REG(PM3RectanglePosition,
1936 (PM3RectanglePosition_XOffset
1937 (p->var.xoffset +
1938 sx)) | (PM3RectanglePosition_YOffset(p->
1939 var.
1940 yoffset)));
1941
1942 PM3_WRITE_REG(PM3Render2D,
1943 PM3Render2D_XPositive |
1944 PM3Render2D_YPositive |
1945 PM3Render2D_Operation_Normal |
1946 PM3Render2D_SpanOperation |
1947 (PM3Render2D_Width(p->var.xres - sx)) |
1948 (PM3Render2D_Height(p->var.yres)));
1949 }
1950
1951 /* bottom margin left -> right */
1952 PM3_WAIT(4);
1953
1954 PM3_WRITE_REG(PM3Config2D,
1955 PM3Config2D_UseConstantSource |
1956 PM3Config2D_ForegroundROPEnable |
1957 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1958 PM3Config2D_FBWriteEnable);
1959
1960 PM3_WRITE_REG(PM3ForegroundColor, c);
1961
1962 PM3_WRITE_REG(PM3RectanglePosition,
1963 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
1964 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
1965
1966 PM3_WRITE_REG(PM3Render2D,
1967 PM3Render2D_XPositive |
1968 PM3Render2D_YPositive |
1969 PM3Render2D_Operation_Normal |
1970 PM3Render2D_SpanOperation |
1971 (PM3Render2D_Width(p->var.xres)) |
1972 (PM3Render2D_Height(p->var.yres - sy)));
1973
1974 pm3fb_wait_pm3(l_fb_info);
1975 }
1976 #endif /* FBCON_HAS_CFB32 */
1977 #ifdef FBCON_HAS_CFB16
pm3fb_cfb16_clear(struct vc_data * conp,struct display * p,int sy,int sx,int height,int width)1978 static void pm3fb_cfb16_clear(struct vc_data *conp,
1979 struct display *p,
1980 int sy, int sx, int height, int width)
1981 {
1982 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1983 u32 c;
1984
1985 DTRACE;
1986
1987 sx = sx * fontwidth(p);
1988 width = width * fontwidth(p);
1989 sy = sy * fontheight(p);
1990 height = height * fontheight(p);
1991 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1992 c = c | (c << 16);
1993
1994 PM3_WAIT(4);
1995
1996 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1997 PM3_WRITE_REG(PM3ForegroundColor, c);
1998 else
1999 PM3_WRITE_REG(PM3FBBlockColor, c);
2000
2001 PM3_WRITE_REG(PM3Config2D,
2002 PM3Config2D_UseConstantSource |
2003 PM3Config2D_ForegroundROPEnable |
2004 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2005 PM3Config2D_FBWriteEnable);
2006
2007 PM3_WRITE_REG(PM3RectanglePosition,
2008 (PM3RectanglePosition_XOffset(sx)) |
2009 (PM3RectanglePosition_YOffset(sy)));
2010
2011 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2012 PM3_WRITE_REG(PM3Render2D,
2013 PM3Render2D_XPositive |
2014 PM3Render2D_YPositive |
2015 PM3Render2D_Operation_Normal |
2016 PM3Render2D_SpanOperation |
2017 (PM3Render2D_Width(width)) |
2018 (PM3Render2D_Height(height)));
2019 else
2020 PM3_WRITE_REG(PM3Render2D,
2021 PM3Render2D_XPositive |
2022 PM3Render2D_YPositive |
2023 PM3Render2D_Operation_Normal |
2024 (PM3Render2D_Width(width)) |
2025 (PM3Render2D_Height(height)));
2026
2027 pm3fb_wait_pm3(l_fb_info);
2028 }
2029
pm3fb_cfb16_clear_margins(struct vc_data * conp,struct display * p,int bottom_only)2030 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
2031 struct display *p, int bottom_only)
2032 {
2033 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2034 int sx, sy;
2035 u32 c;
2036
2037 DTRACE;
2038
2039 sx = conp->vc_cols * fontwidth(p); /* right margin */
2040 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2041 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
2042 c = c | (c << 16);
2043
2044 if (!bottom_only) { /* right margin top->bottom */
2045 PM3_WAIT(4);
2046
2047 PM3_WRITE_REG(PM3Config2D,
2048 PM3Config2D_UseConstantSource |
2049 PM3Config2D_ForegroundROPEnable |
2050 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2051 PM3Config2D_FBWriteEnable);
2052
2053 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2054 PM3_WRITE_REG(PM3ForegroundColor, c);
2055 else
2056 PM3_WRITE_REG(PM3FBBlockColor, c);
2057
2058 PM3_WRITE_REG(PM3RectanglePosition,
2059 (PM3RectanglePosition_XOffset
2060 (p->var.xoffset +
2061 sx)) | (PM3RectanglePosition_YOffset(p->
2062 var.
2063 yoffset)));
2064 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2065 PM3_WRITE_REG(PM3Render2D,
2066 PM3Render2D_XPositive |
2067 PM3Render2D_YPositive |
2068 PM3Render2D_Operation_Normal |
2069 PM3Render2D_SpanOperation |
2070 (PM3Render2D_Width(p->var.xres - sx)) |
2071 (PM3Render2D_Height(p->var.yres)));
2072 else
2073 PM3_WRITE_REG(PM3Render2D,
2074 PM3Render2D_XPositive |
2075 PM3Render2D_YPositive |
2076 PM3Render2D_Operation_Normal |
2077 (PM3Render2D_Width(p->var.xres - sx)) |
2078 (PM3Render2D_Height(p->var.yres)));
2079 }
2080
2081 /* bottom margin left -> right */
2082 PM3_WAIT(4);
2083
2084 PM3_WRITE_REG(PM3Config2D,
2085 PM3Config2D_UseConstantSource |
2086 PM3Config2D_ForegroundROPEnable |
2087 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2088 PM3Config2D_FBWriteEnable);
2089
2090 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2091 PM3_WRITE_REG(PM3ForegroundColor, c);
2092 else
2093 PM3_WRITE_REG(PM3FBBlockColor, c);
2094
2095
2096 PM3_WRITE_REG(PM3RectanglePosition,
2097 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2098 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2099
2100 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2101 PM3_WRITE_REG(PM3Render2D,
2102 PM3Render2D_XPositive |
2103 PM3Render2D_YPositive |
2104 PM3Render2D_Operation_Normal |
2105 PM3Render2D_SpanOperation |
2106 (PM3Render2D_Width(p->var.xres)) |
2107 (PM3Render2D_Height(p->var.yres - sy)));
2108 else
2109 PM3_WRITE_REG(PM3Render2D,
2110 PM3Render2D_XPositive |
2111 PM3Render2D_YPositive |
2112 PM3Render2D_Operation_Normal |
2113 (PM3Render2D_Width(p->var.xres)) |
2114 (PM3Render2D_Height(p->var.yres - sy)));
2115
2116 pm3fb_wait_pm3(l_fb_info);
2117 }
2118 #endif /* FBCON_HAS_CFB16 */
2119 #ifdef FBCON_HAS_CFB8
pm3fb_cfb8_clear(struct vc_data * conp,struct display * p,int sy,int sx,int height,int width)2120 static void pm3fb_cfb8_clear(struct vc_data *conp,
2121 struct display *p,
2122 int sy, int sx, int height, int width)
2123 {
2124 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2125 u32 c;
2126
2127 DTRACE;
2128
2129 sx = sx * fontwidth(p);
2130 width = width * fontwidth(p);
2131 sy = sy * fontheight(p);
2132 height = height * fontheight(p);
2133
2134 c = attr_bgcol_ec(p, conp);
2135 c |= c << 8;
2136 c |= c << 16;
2137
2138 PM3_WAIT(4);
2139
2140 PM3_WRITE_REG(PM3Config2D,
2141 PM3Config2D_UseConstantSource |
2142 PM3Config2D_ForegroundROPEnable |
2143 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2144 PM3Config2D_FBWriteEnable);
2145
2146 PM3_WRITE_REG(PM3ForegroundColor, c);
2147
2148 PM3_WRITE_REG(PM3RectanglePosition,
2149 (PM3RectanglePosition_XOffset(sx)) |
2150 (PM3RectanglePosition_YOffset(sy)));
2151
2152 PM3_WRITE_REG(PM3Render2D,
2153 PM3Render2D_XPositive |
2154 PM3Render2D_YPositive |
2155 PM3Render2D_Operation_Normal |
2156 PM3Render2D_SpanOperation |
2157 (PM3Render2D_Width(width)) |
2158 (PM3Render2D_Height(height)));
2159
2160 pm3fb_wait_pm3(l_fb_info);
2161 }
2162
pm3fb_cfb8_clear_margins(struct vc_data * conp,struct display * p,int bottom_only)2163 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
2164 struct display *p, int bottom_only)
2165 {
2166 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2167 int sx, sy;
2168 u32 c;
2169
2170 DTRACE;
2171
2172 sx = conp->vc_cols * fontwidth(p); /* right margin */
2173 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2174 c = attr_bgcol_ec(p, conp);
2175 c |= c << 8;
2176 c |= c << 16;
2177
2178 if (!bottom_only) { /* right margin top->bottom */
2179 PM3_WAIT(4);
2180
2181 PM3_WRITE_REG(PM3Config2D,
2182 PM3Config2D_UseConstantSource |
2183 PM3Config2D_ForegroundROPEnable |
2184 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2185 PM3Config2D_FBWriteEnable);
2186
2187 PM3_WRITE_REG(PM3ForegroundColor, c);
2188
2189 PM3_WRITE_REG(PM3RectanglePosition,
2190 (PM3RectanglePosition_XOffset
2191 (p->var.xoffset +
2192 sx)) | (PM3RectanglePosition_YOffset(p->
2193 var.
2194 yoffset)));
2195
2196 PM3_WRITE_REG(PM3Render2D,
2197 PM3Render2D_XPositive |
2198 PM3Render2D_YPositive |
2199 PM3Render2D_Operation_Normal |
2200 PM3Render2D_SpanOperation |
2201 (PM3Render2D_Width(p->var.xres - sx)) |
2202 (PM3Render2D_Height(p->var.yres)));
2203 }
2204
2205 /* bottom margin left -> right */
2206 PM3_WAIT(4);
2207
2208 PM3_WRITE_REG(PM3Config2D,
2209 PM3Config2D_UseConstantSource |
2210 PM3Config2D_ForegroundROPEnable |
2211 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2212 PM3Config2D_FBWriteEnable);
2213
2214 PM3_WRITE_REG(PM3ForegroundColor, c);
2215
2216 PM3_WRITE_REG(PM3RectanglePosition,
2217 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2218 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2219
2220 PM3_WRITE_REG(PM3Render2D,
2221 PM3Render2D_XPositive |
2222 PM3Render2D_YPositive |
2223 PM3Render2D_Operation_Normal |
2224 PM3Render2D_SpanOperation |
2225 (PM3Render2D_Width(p->var.xres)) |
2226 (PM3Render2D_Height(p->var.yres - sy)));
2227
2228 pm3fb_wait_pm3(l_fb_info);
2229 }
2230 #endif /* FBCON_HAS_CFB8 */
2231 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
pm3fb_cfbX_bmove(struct display * p,int sy,int sx,int dy,int dx,int height,int width)2232 static void pm3fb_cfbX_bmove(struct display *p,
2233 int sy, int sx,
2234 int dy, int dx, int height, int width)
2235 {
2236 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2237 int x_align, o_x, o_y;
2238
2239 DTRACE;
2240
2241 sx = sx * fontwidth(p);
2242 dx = dx * fontwidth(p);
2243 width = width * fontwidth(p);
2244 sy = sy * fontheight(p);
2245 dy = dy * fontheight(p);
2246 height = height * fontheight(p);
2247
2248 o_x = sx - dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
2249 o_y = sy - dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
2250
2251 x_align = (sx & 0x1f);
2252
2253 PM3_WAIT(6);
2254
2255 PM3_WRITE_REG(PM3Config2D,
2256 PM3Config2D_UserScissorEnable |
2257 PM3Config2D_ForegroundROPEnable |
2258 PM3Config2D_Blocking |
2259 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2260 PM3Config2D_FBWriteEnable);
2261
2262 PM3_WRITE_REG(PM3ScissorMinXY,
2263 ((dy & 0x0fff) << 16) | (dx & 0x0fff));
2264 PM3_WRITE_REG(PM3ScissorMaxXY,
2265 (((dy + height) & 0x0fff) << 16) |
2266 ((dx + width) & 0x0fff));
2267
2268 PM3_WRITE_REG(PM3FBSourceReadBufferOffset,
2269 PM3FBSourceReadBufferOffset_XOffset(o_x) |
2270 PM3FBSourceReadBufferOffset_YOffset(o_y));
2271
2272 PM3_WRITE_REG(PM3RectanglePosition,
2273 (PM3RectanglePosition_XOffset(dx - x_align)) |
2274 (PM3RectanglePosition_YOffset(dy)));
2275
2276 PM3_WRITE_REG(PM3Render2D,
2277 ((sx > dx) ? PM3Render2D_XPositive : 0) |
2278 ((sy > dy) ? PM3Render2D_YPositive : 0) |
2279 PM3Render2D_Operation_Normal |
2280 PM3Render2D_SpanOperation |
2281 PM3Render2D_FBSourceReadEnable |
2282 (PM3Render2D_Width(width + x_align)) |
2283 (PM3Render2D_Height(height)));
2284
2285 pm3fb_wait_pm3(l_fb_info);
2286 }
2287
pm3fb_cfbX_putc(struct vc_data * conp,struct display * p,int c,int yy,int xx)2288 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
2289 int c, int yy, int xx)
2290 {
2291 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2292 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2293 u32 fgx, bgx, ldat;
2294 int sx, sy, i;
2295
2296 DTRACE;
2297
2298 if (l_fb_info->current_par->depth == 8)
2299 fgx = attr_fgcol(p, c);
2300 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2301 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, c)];
2302 else
2303 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, c)];
2304
2305 PM3_COLOR(fgx);
2306
2307 if (l_fb_info->current_par->depth == 8)
2308 bgx = attr_bgcol(p, c);
2309 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2310 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, c)];
2311 else
2312 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, c)];
2313
2314 PM3_COLOR(bgx);
2315
2316 PM3_WAIT(4);
2317
2318 PM3_WRITE_REG(PM3Config2D,
2319 PM3Config2D_UseConstantSource |
2320 PM3Config2D_ForegroundROPEnable |
2321 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2322 PM3Config2D_FBWriteEnable | PM3Config2D_OpaqueSpan);
2323
2324 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2325 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2326
2327 /* WARNING : adress select X need to specify 8 bits for fontwidth <= 8 */
2328 /* and 16 bits for fontwidth <= 16 */
2329 /* same in _putcs, same for Y and fontheight */
2330 if (fontwidth(p) <= 8)
2331 asx = 2;
2332 else if (fontwidth(p) <= 16)
2333 asx = 3; /* look OK */
2334 if (fontheight(p) <= 8)
2335 asy = 2;
2336 else if (fontheight(p) <= 16)
2337 asy = 3; /* look OK */
2338 else if (fontheight(p) <= 32)
2339 asy = 4; /* look OK */
2340
2341 sx = xx * fontwidth(p);
2342 sy = yy * fontheight(p);
2343
2344 if (fontwidth(p) <= 8)
2345 o_x = (8 - (sx & 0x7)) & 0x7;
2346 else if (fontwidth(p) <= 16)
2347 o_x = (16 - (sx & 0xF)) & 0xF;
2348 if (fontheight(p) <= 8)
2349 o_y = (8 - (sy & 0x7)) & 0x7;
2350 else if (fontheight(p) <= 16)
2351 o_y = (16 - (sy & 0xF)) & 0xF;
2352 else if (fontheight(p) <= 32)
2353 o_y = (32 - (sy & 0x1F)) & 0x1F;
2354
2355 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2356 (1 << 18) | /* BE */
2357 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2358 (1 << 20)); /* OpaqueSpan */
2359
2360 if (fontwidth(p) <= 8) {
2361 cdat = p->fontdata + (c & p->charmask) * fontheight(p);
2362 } else {
2363 cdat =
2364 p->fontdata +
2365 ((c & p->charmask) * (fontheight(p) << 1));
2366 }
2367
2368 PM3_WAIT(2 + fontheight(p));
2369
2370 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2371 if (fontwidth(p) <= 8) {
2372 ldat = *cdat++;
2373 } else { /* assume fontwidth <= 16 ATM */
2374
2375 ldat = ((*cdat++) << 8);
2376 ldat |= *cdat++;
2377 }
2378 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2379 }
2380
2381 PM3_WRITE_REG(PM3RectanglePosition,
2382 (PM3RectanglePosition_XOffset(sx)) |
2383 (PM3RectanglePosition_YOffset(sy)));
2384
2385 PM3_WRITE_REG(PM3Render2D,
2386 PM3Render2D_AreaStippleEnable |
2387 PM3Render2D_XPositive |
2388 PM3Render2D_YPositive |
2389 PM3Render2D_Operation_Normal |
2390 PM3Render2D_SpanOperation |
2391 (PM3Render2D_Width(fontwidth(p))) |
2392 (PM3Render2D_Height(fontheight(p))));
2393
2394 pm3fb_wait_pm3(l_fb_info);
2395 }
2396
pm3fb_cfbX_putcs(struct vc_data * conp,struct display * p,const unsigned short * s,int count,int yy,int xx)2397 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
2398 const unsigned short *s, int count, int yy,
2399 int xx)
2400 {
2401 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2402 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2403 u32 fgx, bgx, ldat;
2404 int sx, sy, i, j;
2405 u16 sc;
2406
2407 DTRACE;
2408
2409 sc = scr_readw(s);
2410 if (l_fb_info->current_par->depth == 8)
2411 fgx = attr_fgcol(p, sc);
2412 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2413 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, sc)];
2414 else
2415 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, sc)];
2416
2417 PM3_COLOR(fgx);
2418
2419 if (l_fb_info->current_par->depth == 8)
2420 bgx = attr_bgcol(p, sc);
2421 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2422 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, sc)];
2423 else
2424 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, sc)];
2425
2426 PM3_COLOR(bgx);
2427
2428 PM3_WAIT(4);
2429
2430 PM3_WRITE_REG(PM3Config2D,
2431 PM3Config2D_UseConstantSource |
2432 PM3Config2D_ForegroundROPEnable |
2433 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2434 PM3Config2D_FBWriteEnable |
2435 PM3Config2D_OpaqueSpan);
2436
2437 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2438 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2439
2440 /* WARNING : adress select X need to specify 8 bits for fontwidth <= 8 */
2441 /* and 16 bits for fontwidth <= 16 */
2442 /* same in _putc, same for Y and fontheight */
2443 if (fontwidth(p) <= 8)
2444 asx = 2;
2445 else if (fontwidth(p) <= 16)
2446 asx = 3; /* look OK */
2447 if (fontheight(p) <= 8)
2448 asy = 2;
2449 else if (fontheight(p) <= 16)
2450 asy = 3; /* look OK */
2451 else if (fontheight(p) <= 32)
2452 asy = 4; /* look OK */
2453
2454 sy = yy * fontheight(p);
2455
2456 if (fontheight(p) <= 8)
2457 o_y = (8 - (sy & 0x7)) & 0x7;
2458 else if (fontheight(p) <= 16)
2459 o_y = (16 - (sy & 0xF)) & 0xF;
2460 else if (fontheight(p) <= 32)
2461 o_y = (32 - (sy & 0x1F)) & 0x1F;
2462
2463 for (j = 0; j < count; j++) {
2464 sc = scr_readw(s + j);
2465 if (fontwidth(p) <= 8)
2466 cdat = p->fontdata +
2467 (sc & p->charmask) * fontheight(p);
2468 else
2469 cdat = p->fontdata +
2470 ((sc & p->charmask) * fontheight(p) << 1);
2471
2472 sx = (xx + j) * fontwidth(p);
2473
2474 if (fontwidth(p) <= 8)
2475 o_x = (8 - (sx & 0x7)) & 0x7;
2476 else if (fontwidth(p) <= 16)
2477 o_x = (16 - (sx & 0xF)) & 0xF;
2478
2479 PM3_WAIT(3 + fontheight(p));
2480
2481 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2482 (1 << 18) | /* BE */
2483 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2484 (1 << 20)); /* OpaqueSpan */
2485
2486 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2487 if (fontwidth(p) <= 8) {
2488 ldat = *cdat++;
2489 } else { /* assume fontwidth <= 16 ATM */
2490 ldat = ((*cdat++) << 8);
2491 ldat |= *cdat++;
2492 }
2493 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2494 }
2495
2496 PM3_WRITE_REG(PM3RectanglePosition,
2497 (PM3RectanglePosition_XOffset(sx)) |
2498 (PM3RectanglePosition_YOffset(sy)));
2499
2500 PM3_WRITE_REG(PM3Render2D,
2501 PM3Render2D_AreaStippleEnable |
2502 PM3Render2D_XPositive |
2503 PM3Render2D_YPositive |
2504 PM3Render2D_Operation_Normal |
2505 PM3Render2D_SpanOperation |
2506 (PM3Render2D_Width(fontwidth(p))) |
2507 (PM3Render2D_Height(fontheight(p))));
2508 }
2509 pm3fb_wait_pm3(l_fb_info);
2510 }
2511
pm3fb_cfbX_revc(struct display * p,int xx,int yy)2512 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy)
2513 {
2514 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2515
2516 xx = xx * fontwidth(p);
2517 yy = yy * fontheight(p);
2518
2519 if (l_fb_info->current_par->depth == 8)
2520 {
2521 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2522 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0x0F0F0F0F);
2523 else
2524 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0x0F0F0F0F);
2525 }
2526
2527 PM3_WAIT(3);
2528
2529 PM3_WRITE_REG(PM3Config2D,
2530 PM3Config2D_UseConstantSource |
2531 PM3Config2D_ForegroundROPEnable |
2532 (PM3Config2D_ForegroundROP(0xa)) | /* Oxa is GXinvert */
2533 PM3Config2D_FBDestReadEnable |
2534 PM3Config2D_FBWriteEnable);
2535
2536 PM3_WRITE_REG(PM3RectanglePosition,
2537 (PM3RectanglePosition_XOffset(xx)) |
2538 (PM3RectanglePosition_YOffset(yy)));
2539
2540 PM3_WRITE_REG(PM3Render2D,
2541 PM3Render2D_XPositive |
2542 PM3Render2D_YPositive |
2543 PM3Render2D_Operation_Normal |
2544 PM3Render2D_SpanOperation |
2545 (PM3Render2D_Width(fontwidth(p))) |
2546 (PM3Render2D_Height(fontheight(p))));
2547
2548 pm3fb_wait_pm3(l_fb_info);
2549
2550 if (l_fb_info->current_par->depth == 8)
2551 {
2552 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2553 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xFFFFFFFF);
2554 else
2555 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xFFFFFFFF);
2556 }
2557 }
2558
2559 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
2560 #endif /* PM3FB_USE_ACCEL */
2561 /* *********************************** */
2562 /* ***** pre-init board(s) setup ***** */
2563 /* *********************************** */
2564
pm3fb_mode_setup(char * mode,unsigned long board_num)2565 static void pm3fb_mode_setup(char *mode, unsigned long board_num)
2566 {
2567 struct pm3fb_info *l_fb_info = &(fb_info[board_num]);
2568 struct pm3fb_par *l_fb_par = &(current_par[board_num]);
2569 unsigned long i = 0;
2570
2571 current_par_valid[board_num] = 0;
2572
2573 if (!strncmp(mode, "current", 7)) {
2574 l_fb_info->use_current = 1; /* default w/ OpenFirmware */
2575 } else {
2576 while ((mode_base[i].name[0])
2577 && (!current_par_valid[board_num])) {
2578 if (!
2579 (strncmp
2580 (mode, mode_base[i].name,
2581 strlen(mode_base[i].name)))) {
2582 memcpy(l_fb_par, &(mode_base[i].user_mode),
2583 sizeof(struct pm3fb_par));
2584 current_par_valid[board_num] = 1;
2585 DPRINTK(2, "Mode set to %s\n",
2586 mode_base[i].name);
2587 }
2588 i++;
2589 }
2590 DASSERT(current_par_valid[board_num],
2591 "Valid mode on command line\n");
2592 }
2593 }
2594
pm3fb_pciid_setup(char * pciid,unsigned long board_num)2595 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num)
2596 {
2597 short l_bus = -1, l_slot = -1, l_func = -1;
2598 char *next;
2599
2600 if (pciid) {
2601 l_bus = simple_strtoul(pciid, &next, 10);
2602 if (next && (next[0] == ':')) {
2603 pciid = next + 1;
2604 l_slot = simple_strtoul(pciid, &next, 10);
2605 if (next && (next[0] == ':')) {
2606 pciid = next + 1;
2607 l_func =
2608 simple_strtoul(pciid, (char **) NULL,
2609 10);
2610 }
2611 }
2612 } else
2613 return;
2614
2615 if ((l_bus >= 0) && (l_slot >= 0) && (l_func >= 0)) {
2616 bus[board_num] = l_bus;
2617 slot[board_num] = l_slot;
2618 func[board_num] = l_func;
2619 DPRINTK(2, "Board #%ld will be PciId: %hd:%hd:%hd\n",
2620 board_num, l_bus, l_slot, l_func);
2621 } else {
2622 DPRINTK(1, "Invalid PciId: %hd:%hd:%hd for board #%ld\n",
2623 l_bus, l_slot, l_func, board_num);
2624 }
2625 }
2626
pm3fb_font_setup(char * lf,unsigned long board_num)2627 static void pm3fb_font_setup(char *lf, unsigned long board_num)
2628 {
2629 unsigned long lfs = strlen(lf);
2630
2631 if (lfs > (PM3_FONTNAME_SIZE - 1)) {
2632 DPRINTK(1, "Fontname %s too long\n", lf);
2633 return;
2634 }
2635 strncpy(fontn[board_num], lf, lfs);
2636 fontn[board_num][lfs] = '\0';
2637 }
2638
pm3fb_bootdepth_setup(char * bds,unsigned long board_num)2639 static void pm3fb_bootdepth_setup(char *bds, unsigned long board_num)
2640 {
2641 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2642
2643 if (!(depth_supported(bd))) {
2644 printk(KERN_WARNING "pm3fb: ignoring invalid depth %s for board #%ld\n",
2645 bds, board_num);
2646 return;
2647 }
2648 depth[board_num] = bd;
2649 }
2650
pm3fb_forcesize_setup(char * bds,unsigned long board_num)2651 static void pm3fb_forcesize_setup(char *bds, unsigned long board_num)
2652 {
2653 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2654
2655 if (bd > 64) {
2656 printk(KERN_WARNING "pm3fb: ignoring invalid memory size %s for board #%ld\n",
2657 bds, board_num);
2658 return;
2659 }
2660 forcesize[board_num] = bd;
2661 }
2662
pm3fb_boardnum_setup(char * options,unsigned long * bn)2663 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn)
2664 {
2665 char *next;
2666
2667 if (!(CHAR_IS_NUM(options[0]))) {
2668 (*bn) = 0;
2669 return (options);
2670 }
2671
2672 (*bn) = simple_strtoul(options, &next, 10);
2673
2674 if (next && (next[0] == ':') && ((*bn) >= 0)
2675 && ((*bn) <= PM3_MAX_BOARD)) {
2676 DPRINTK(2, "Board_num seen as %ld\n", (*bn));
2677 return (next + 1);
2678 } else {
2679 (*bn) = 0;
2680 DPRINTK(2, "Board_num default to %ld\n", (*bn));
2681 return (options);
2682 }
2683 }
2684
pm3fb_real_setup(char * options)2685 static void pm3fb_real_setup(char *options)
2686 {
2687 char *next;
2688 unsigned long i, bn;
2689 struct pm3fb_info *l_fb_info;
2690
2691 DTRACE;
2692
2693 DPRINTK(2, "Options : %s\n", options);
2694
2695 for (i = 0; i < PM3_MAX_BOARD; i++) {
2696 l_fb_info = &(fb_info[i]);
2697 memset(l_fb_info, 0, sizeof(struct pm3fb_info));
2698 l_fb_info->gen.fbhw = &pm3fb_switch;
2699 l_fb_info->board_num = i;
2700 current_par_valid[i] = 0;
2701 slot[i] = -1;
2702 func[i] = -1;
2703 bus[i] = -1;
2704 disable[i] = 0;
2705 noaccel[i] = 0;
2706 fontn[i][0] = '\0';
2707 depth[i] = 0;
2708 l_fb_info->current_par = &(current_par[i]);
2709 }
2710
2711 /* eat up prefix pm3fb and whatever is used as separator i.e. :,= */
2712 if (!strncmp(options, "pm3fb", 5)) {
2713 options += 5;
2714 while (((*options) == ',') || ((*options) == ':')
2715 || ((*options) == '='))
2716 options++;
2717 }
2718
2719 while (options) {
2720 bn = 0;
2721 if ((next = strchr(options, ','))) {
2722 (*next) = '\0';
2723 next++;
2724 }
2725
2726 if (!strncmp(options, "mode:", 5)) {
2727 options = pm3fb_boardnum_setup(options + 5, &bn);
2728 DPRINTK(2, "Setting mode for board #%ld\n", bn);
2729 pm3fb_mode_setup(options, bn);
2730 } else if (!strncmp(options, "off:", 4)) {
2731 options = pm3fb_boardnum_setup(options + 4, &bn);
2732 DPRINTK(2, "Disabling board #%ld\n", bn);
2733 disable[bn] = 1;
2734 } else if (!strncmp(options, "off", 3)) { /* disable everything */
2735 for (i = 0; i < PM3_MAX_BOARD; i++)
2736 disable[i] = 1;
2737 } else if (!strncmp(options, "disable:", 8)) {
2738 options = pm3fb_boardnum_setup(options + 8, &bn);
2739 DPRINTK(2, "Disabling board #%ld\n", bn);
2740 disable[bn] = 1;
2741 } else if (!strncmp(options, "pciid:", 6)) {
2742 options = pm3fb_boardnum_setup(options + 6, &bn);
2743 DPRINTK(2, "Setting PciID for board #%ld\n", bn);
2744 pm3fb_pciid_setup(options, bn);
2745 } else if (!strncmp(options, "noaccel:", 8)) {
2746 options = pm3fb_boardnum_setup(options + 8, &bn);
2747 noaccel[bn] = 1;
2748 } else if (!strncmp(options, "font:", 5)) {
2749 options = pm3fb_boardnum_setup(options + 5, &bn);
2750 pm3fb_font_setup(options, bn);
2751 } else if (!strncmp(options, "depth:", 6)) {
2752 options = pm3fb_boardnum_setup(options + 6, &bn);
2753 pm3fb_bootdepth_setup(options, bn);
2754 } else if (!strncmp(options, "printtimings", 12)) {
2755 printtimings = 1;
2756 } else if (!strncmp(options, "flatpanel:", 10)) {
2757 options = pm3fb_boardnum_setup(options + 10, &bn);
2758 flatpanel[bn] = 1;
2759 } else if (!strncmp(options, "forcesize:", 10)) {
2760 options = pm3fb_boardnum_setup(options + 10, &bn);
2761 pm3fb_forcesize_setup(options, bn);
2762 }
2763 options = next;
2764 }
2765 }
2766
2767 /* ********************************************** */
2768 /* ***** framebuffer API standard functions ***** */
2769 /* ********************************************** */
2770
pm3fb_open(struct fb_info * info,int user)2771 static int pm3fb_open(struct fb_info *info, int user)
2772 {
2773 DTRACE;
2774
2775 MOD_INC_USE_COUNT;
2776
2777 return (0);
2778 }
2779
pm3fb_release(struct fb_info * info,int user)2780 static int pm3fb_release(struct fb_info *info, int user)
2781 {
2782 DTRACE;
2783
2784 MOD_DEC_USE_COUNT;
2785
2786 return (0);
2787 }
2788
pm3fb_encode_fix(struct fb_fix_screeninfo * fix,const void * par,struct fb_info_gen * info)2789 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
2790 const void *par, struct fb_info_gen *info)
2791 {
2792 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2793 struct pm3fb_par *p = (struct pm3fb_par *) par;
2794
2795 DTRACE;
2796
2797 strcpy(fix->id, permedia3_name);
2798 fix->smem_start = (unsigned long)l_fb_info->p_fb;
2799 fix->smem_len = l_fb_info->fb_size;
2800 fix->mmio_start = (unsigned long)l_fb_info->pIOBase;
2801 fix->mmio_len = PM3_REGS_SIZE;
2802 #ifdef PM3FB_USE_ACCEL
2803 if (!(noaccel[l_fb_info->board_num]))
2804 fix->accel = FB_ACCEL_3DLABS_PERMEDIA3;
2805 else
2806 #endif /* PM3FB_USE_ACCEL */
2807 fix->accel = FB_ACCEL_NONE;
2808 fix->type = FB_TYPE_PACKED_PIXELS;
2809 fix->visual =
2810 (p->depth == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
2811 if (current_par_valid[l_fb_info->board_num])
2812 fix->line_length =
2813 l_fb_info->current_par->width *
2814 depth2ByPP(l_fb_info->current_par->depth);
2815 else
2816 fix->line_length = 0;
2817 fix->xpanstep = 64 / depth2bpp(p->depth);
2818 fix->ypanstep = 1;
2819 fix->ywrapstep = 0;
2820 return (0);
2821 }
2822
pm3fb_decode_var(const struct fb_var_screeninfo * var,void * par,struct fb_info_gen * info)2823 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
2824 void *par, struct fb_info_gen *info)
2825 {
2826 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2827 struct pm3fb_par *p = (struct pm3fb_par *) par;
2828 struct pm3fb_par temp_p;
2829 u32 xres;
2830
2831 DTRACE;
2832
2833 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2834 DASSERT((p != NULL), "pm3fb_par* not NULL");
2835 DASSERT((l_fb_info != NULL), "pm3fb_info* not NULL");
2836
2837 memset(&temp_p, 0, sizeof(struct pm3fb_par));
2838 temp_p.width = (var->xres_virtual + 7) & ~7;
2839 temp_p.height = var->yres_virtual;
2840
2841 if (!(depth_supported(var->bits_per_pixel))) /* round unsupported up to a multiple of 8 */
2842 temp_p.depth = depth2bpp(var->bits_per_pixel);
2843 else
2844 temp_p.depth = var->bits_per_pixel;
2845
2846 temp_p.depth = (temp_p.depth > 32) ? 32 : temp_p.depth; /* max 32 */
2847 temp_p.depth = (temp_p.depth == 24) ? 32 : temp_p.depth; /* 24 unsupported, round-up to 32 */
2848
2849 if ((temp_p.depth == 16) && (var->red.length == 5) && (var->green.length == 5) && (var->blue.length == 5))
2850 temp_p.depth = 15; /* RGBA 5551 is stored as depth 15 */
2851
2852 if ((temp_p.depth == 16) && (var->red.length == 4) && (var->green.length == 4) && (var->blue.length == 4))
2853 temp_p.depth = 12; /* RGBA 4444 is stored as depth 12 */
2854
2855
2856 DPRINTK(2,
2857 "xres: %d, yres: %d, vxres: %d, vyres: %d ; xoffset:%d, yoffset: %d\n",
2858 var->xres, var->yres, var->xres_virtual, var->yres_virtual,
2859 var->xoffset, var->yoffset);
2860
2861 xres = (var->xres + 31) & ~31;
2862 if (temp_p.width < xres + var->xoffset)
2863 temp_p.width = xres + var->xoffset;
2864 if (temp_p.height < var->yres + var->yoffset)
2865 temp_p.height = var->yres + var->yoffset;
2866
2867 if (temp_p.width > 2048) {
2868 DPRINTK(1, "virtual width not supported: %u\n",
2869 temp_p.width);
2870 return (-EINVAL);
2871 }
2872 if (var->yres < 200) {
2873 DPRINTK(1, "height not supported: %u\n", (u32) var->yres);
2874 return (-EINVAL);
2875 }
2876 if (temp_p.height < 200 || temp_p.height > 4095) {
2877 DPRINTK(1, "virtual height not supported: %u\n",
2878 temp_p.height);
2879 return (-EINVAL);
2880 }
2881 if (!(depth_supported(temp_p.depth))) {
2882 DPRINTK(1, "depth not supported: %u\n", temp_p.depth);
2883 return (-EINVAL);
2884 }
2885 if ((temp_p.width * temp_p.height * depth2ByPP(temp_p.depth)) >
2886 l_fb_info->fb_size) {
2887 DPRINTK(1, "no memory for screen (%ux%ux%u)\n",
2888 temp_p.width, temp_p.height, temp_p.depth);
2889 return (-EINVAL);
2890 }
2891
2892 if ((!var->pixclock) ||
2893 (!var->right_margin) ||
2894 (!var->hsync_len) ||
2895 (!var->left_margin) ||
2896 (!var->lower_margin) ||
2897 (!var->vsync_len) || (!var->upper_margin)
2898 ) {
2899 unsigned long i = 0, done = 0;
2900 printk(KERN_WARNING "pm3fb: refusing to use a likely wrong timing\n");
2901
2902 while ((mode_base[i].user_mode.width) && !done) {
2903 if ((mode_base[i].user_mode.width == temp_p.width)
2904 && (mode_base[i].user_mode.height ==
2905 temp_p.height)) {
2906 printk(KERN_NOTICE "pm3fb: using close match %s\n",
2907 mode_base[i].name);
2908 temp_p = mode_base[i].user_mode;
2909 done = 1;
2910 }
2911 i++;
2912 }
2913 if (!done)
2914 return (-EINVAL);
2915 } else {
2916 temp_p.pixclock = PICOS2KHZ(var->pixclock);
2917 if (temp_p.pixclock > PM3_MAX_PIXCLOCK) {
2918 DPRINTK(1, "pixclock too high (%uKHz)\n",
2919 temp_p.pixclock);
2920 return (-EINVAL);
2921 }
2922
2923 temp_p.hsstart = var->right_margin;
2924 temp_p.hsend = var->right_margin + var->hsync_len;
2925 temp_p.hbend =
2926 var->right_margin + var->hsync_len + var->left_margin;
2927 temp_p.htotal = xres + temp_p.hbend;
2928
2929 temp_p.vsstart = var->lower_margin;
2930 temp_p.vsend = var->lower_margin + var->vsync_len;
2931 temp_p.vbend =
2932 var->lower_margin + var->vsync_len + var->upper_margin;
2933 temp_p.vtotal = var->yres + temp_p.vbend;
2934
2935 temp_p.stride = temp_p.width;
2936
2937 DPRINTK(2, "Using %d * %d, %d Khz, stride is %08x\n",
2938 temp_p.width, temp_p.height, temp_p.pixclock,
2939 temp_p.stride);
2940
2941 temp_p.base =
2942 pm3fb_Shiftbpp(l_fb_info, temp_p.depth,
2943 (var->yoffset * xres) + var->xoffset);
2944
2945 temp_p.video = 0;
2946
2947 if (var->sync & FB_SYNC_HOR_HIGH_ACT)
2948 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_HIGH;
2949 else
2950 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_LOW;
2951
2952 if (var->sync & FB_SYNC_VERT_HIGH_ACT)
2953 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_HIGH;
2954 else
2955 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_LOW;
2956
2957 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
2958 DPRINTK(1, "Interlaced mode not supported\n\n");
2959 return (-EINVAL);
2960 }
2961
2962 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
2963 temp_p.video |= PM3VideoControl_LINE_DOUBLE_ON;
2964 else
2965 temp_p.video |= PM3VideoControl_LINE_DOUBLE_OFF;
2966
2967 if (var->activate == FB_ACTIVATE_NOW)
2968 temp_p.video |= PM3VideoControl_ENABLE;
2969 else {
2970 temp_p.video |= PM3VideoControl_DISABLE;
2971 DPRINTK(2, "PM3Video disabled\n");
2972 }
2973
2974 switch (temp_p.depth) {
2975 case 8:
2976 temp_p.video |= PM3VideoControl_PIXELSIZE_8BIT;
2977 break;
2978 case 12:
2979 case 15:
2980 case 16:
2981 temp_p.video |= PM3VideoControl_PIXELSIZE_16BIT;
2982 break;
2983 case 32:
2984 temp_p.video |= PM3VideoControl_PIXELSIZE_32BIT;
2985 break;
2986 default:
2987 DPRINTK(1, "Unsupported depth\n");
2988 break;
2989 }
2990 }
2991 (*p) = temp_p;
2992
2993 #ifdef PM3FB_USE_ACCEL
2994 if (var->accel_flags & FB_ACCELF_TEXT)
2995 noaccel[l_fb_info->board_num] = 0;
2996 else
2997 noaccel[l_fb_info->board_num] = 1;
2998 #endif /* PM3FB_USE_ACCEL */
2999
3000 return (0);
3001 }
3002
pm3fb_encode_depth(struct fb_var_screeninfo * var,long d)3003 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d)
3004 {
3005 switch (d) {
3006 case 8:
3007 var->red.length = var->green.length = var->blue.length = 8;
3008 var->red.offset = var->green.offset = var->blue.offset = 0;
3009 var->transp.offset = var->transp.length = 0;
3010 break;
3011
3012 case 12:
3013 var->red.offset = 8;
3014 var->red.length = 4;
3015 var->green.offset = 4;
3016 var->green.length = 4;
3017 var->blue.offset = 0;
3018 var->blue.length = 4;
3019 var->transp.offset = 12;
3020 var->transp.length = 4;
3021 break;
3022
3023 case 15:
3024 var->red.offset = 10;
3025 var->red.length = 5;
3026 var->green.offset = 5;
3027 var->green.length = 5;
3028 var->blue.offset = 0;
3029 var->blue.length = 5;
3030 var->transp.offset = 15;
3031 var->transp.length = 1;
3032 break;
3033
3034 case 16:
3035 var->red.offset = 11;
3036 var->red.length = 5;
3037 var->green.offset = 5;
3038 var->green.length = 6;
3039 var->blue.offset = 0;
3040 var->blue.length = 5;
3041 var->transp.offset = var->transp.length = 0;
3042 break;
3043
3044 case 32:
3045 var->transp.offset = 24;
3046 var->red.offset = 16;
3047 var->green.offset = 8;
3048 var->blue.offset = 0;
3049 var->red.length = var->green.length =
3050 var->blue.length = var->transp.length = 8;
3051 break;
3052
3053 default:
3054 DPRINTK(1, "Unsupported depth %ld\n", d);
3055 break;
3056 }
3057 }
3058
pm3fb_encode_var(struct fb_var_screeninfo * var,const void * par,struct fb_info_gen * info)3059 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
3060 const void *par, struct fb_info_gen *info)
3061 {
3062 struct pm3fb_par *p = (struct pm3fb_par *) par;
3063 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3064
3065 u32 base;
3066
3067 DTRACE;
3068
3069 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
3070 DASSERT((p != NULL), "pm3fb_par* not NULL");
3071 DASSERT((info != NULL), "fb_info_gen* not NULL");
3072
3073 memset(var, 0, sizeof(struct fb_var_screeninfo));
3074
3075 #ifdef PM3FB_USE_ACCEL
3076 if (!(noaccel[l_fb_info->board_num]))
3077 var->accel_flags |= FB_ACCELF_TEXT;
3078 #endif /* PM3FB_USE_ACCEL */
3079
3080 var->xres_virtual = p->width;
3081 var->yres_virtual = p->height;
3082 var->xres = p->htotal - p->hbend;
3083 var->yres = p->vtotal - p->vbend;
3084
3085 DPRINTK(2, "xres = %d, yres : %d\n", var->xres, var->yres);
3086
3087 var->right_margin = p->hsstart;
3088 var->hsync_len = p->hsend - p->hsstart;
3089 var->left_margin = p->hbend - p->hsend;
3090 var->lower_margin = p->vsstart;
3091 var->vsync_len = p->vsend - p->vsstart;
3092 var->upper_margin = p->vbend - p->vsend;
3093 var->bits_per_pixel = depth2bpp(p->depth);
3094
3095 pm3fb_encode_depth(var, p->depth);
3096
3097 base = pm3fb_Unshiftbpp(l_fb_info, p->depth, p->base);
3098
3099 var->xoffset = base % var->xres;
3100 var->yoffset = base / var->xres;
3101
3102 var->height = var->width = -1;
3103
3104 var->pixclock = KHZ2PICOS(p->pixclock);
3105
3106 if ((p->video & PM3VideoControl_HSYNC_MASK) ==
3107 PM3VideoControl_HSYNC_ACTIVE_HIGH)
3108 var->sync |= FB_SYNC_HOR_HIGH_ACT;
3109 if ((p->video & PM3VideoControl_VSYNC_MASK) ==
3110 PM3VideoControl_VSYNC_ACTIVE_HIGH)
3111 var->sync |= FB_SYNC_VERT_HIGH_ACT;
3112 if (p->video & PM3VideoControl_LINE_DOUBLE_ON)
3113 var->vmode = FB_VMODE_DOUBLE;
3114
3115 return (0);
3116 }
3117
pm3fb_get_par(void * par,struct fb_info_gen * info)3118 static void pm3fb_get_par(void *par, struct fb_info_gen *info)
3119 {
3120 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3121
3122 DTRACE;
3123
3124 if (!current_par_valid[l_fb_info->board_num]) {
3125 if (l_fb_info->use_current)
3126 pm3fb_read_mode(l_fb_info, l_fb_info->current_par);
3127 else
3128 memcpy(l_fb_info->current_par,
3129 &(mode_base[0].user_mode),
3130 sizeof(struct pm3fb_par));
3131 current_par_valid[l_fb_info->board_num] = 1;
3132 }
3133 *((struct pm3fb_par *) par) = *(l_fb_info->current_par);
3134 }
3135
pm3fb_set_par(const void * par,struct fb_info_gen * info)3136 static void pm3fb_set_par(const void *par, struct fb_info_gen *info)
3137 {
3138 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3139
3140 DTRACE;
3141
3142 *(l_fb_info->current_par) = *((struct pm3fb_par *) par);
3143 current_par_valid[l_fb_info->board_num] = 1;
3144
3145 pm3fb_write_mode(l_fb_info);
3146
3147 #ifdef PM3FB_USE_ACCEL
3148 pm3fb_init_engine(l_fb_info);
3149 #endif /* PM3FB_USE_ACCEL */
3150 }
3151
pm3fb_set_color(struct pm3fb_info * l_fb_info,unsigned char regno,unsigned char r,unsigned char g,unsigned char b)3152 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
3153 unsigned char regno, unsigned char r,
3154 unsigned char g, unsigned char b)
3155 {
3156 DTRACE;
3157
3158 PM3_SLOW_WRITE_REG(PM3RD_PaletteWriteAddress, regno);
3159 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, r);
3160 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, g);
3161 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, b);
3162 }
3163
pm3fb_getcolreg(unsigned regno,unsigned * red,unsigned * green,unsigned * blue,unsigned * transp,struct fb_info * info)3164 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
3165 unsigned *blue, unsigned *transp,
3166 struct fb_info *info)
3167 {
3168 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3169
3170 DTRACE;
3171
3172 if (regno < 256) {
3173 *red =
3174 l_fb_info->palette[regno].red << 8 | l_fb_info->
3175 palette[regno].red;
3176 *green =
3177 l_fb_info->palette[regno].green << 8 | l_fb_info->
3178 palette[regno].green;
3179 *blue =
3180 l_fb_info->palette[regno].blue << 8 | l_fb_info->
3181 palette[regno].blue;
3182 *transp =
3183 l_fb_info->palette[regno].transp << 8 | l_fb_info->
3184 palette[regno].transp;
3185 }
3186 return (regno > 255);
3187 }
3188
pm3fb_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)3189 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
3190 unsigned blue, unsigned transp,
3191 struct fb_info *info)
3192 {
3193 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3194
3195 DTRACE;
3196
3197 if (regno < 16) {
3198 switch (l_fb_info->current_par->depth) {
3199 #ifdef FBCON_HAS_CFB8
3200 case 8:
3201 break;
3202 #endif
3203 #ifdef FBCON_HAS_CFB16
3204 case 12:
3205 l_fb_info->cmap.cmap12[regno] =
3206 (((u32) red & 0xf000) >> 4) |
3207 (((u32) green & 0xf000) >> 8) |
3208 (((u32) blue & 0xf000) >> 12);
3209 break;
3210
3211 case 15:
3212 l_fb_info->cmap.cmap15[regno] =
3213 (((u32) red & 0xf800) >> 1) |
3214 (((u32) green & 0xf800) >> 6) |
3215 (((u32) blue & 0xf800) >> 11);
3216 break;
3217
3218 case 16:
3219 l_fb_info->cmap.cmap16[regno] =
3220 ((u32) red & 0xf800) |
3221 (((u32) green & 0xfc00) >> 5) |
3222 (((u32) blue & 0xf800) >> 11);
3223 break;
3224 #endif
3225 #ifdef FBCON_HAS_CFB32
3226 case 32:
3227 l_fb_info->cmap.cmap32[regno] =
3228 (((u32) transp & 0xff00) << 16) |
3229 (((u32) red & 0xff00) << 8) |
3230 (((u32) green & 0xff00)) |
3231 (((u32) blue & 0xff00) >> 8);
3232 break;
3233 #endif
3234 default:
3235 DPRINTK(1, "bad depth %u\n",
3236 l_fb_info->current_par->depth);
3237 break;
3238 }
3239 }
3240 if (regno < 256) {
3241 l_fb_info->palette[regno].red = red >> 8;
3242 l_fb_info->palette[regno].green = green >> 8;
3243 l_fb_info->palette[regno].blue = blue >> 8;
3244 l_fb_info->palette[regno].transp = transp >> 8;
3245 if (l_fb_info->current_par->depth == 8)
3246 pm3fb_set_color(l_fb_info, regno, red >> 8,
3247 green >> 8, blue >> 8);
3248 }
3249 return (regno > 255);
3250 }
3251
pm3fb_blank(int blank_mode,struct fb_info_gen * info)3252 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info)
3253 {
3254 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3255 u32 video;
3256
3257 DTRACE;
3258
3259 if (!current_par_valid[l_fb_info->board_num])
3260 return (1);
3261
3262 video = l_fb_info->current_par->video;
3263
3264 /*
3265 * Oxygen VX1 - it appears that setting PM3VideoControl and
3266 * then PM3RD_SyncControl to the same SYNC settings undoes
3267 * any net change - they seem to xor together. Only set the
3268 * sync options in PM3RD_SyncControl. --rmk
3269 */
3270 video &= ~(PM3VideoControl_HSYNC_MASK |
3271 PM3VideoControl_VSYNC_MASK);
3272 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
3273 PM3VideoControl_VSYNC_ACTIVE_HIGH;
3274
3275 if (blank_mode > 0) {
3276 switch (blank_mode - 1) {
3277
3278 case VESA_NO_BLANKING: /* FIXME */
3279 video = video & ~(PM3VideoControl_ENABLE);
3280 break;
3281
3282 case VESA_HSYNC_SUSPEND:
3283 video = video & ~(PM3VideoControl_HSYNC_MASK |
3284 PM3VideoControl_BLANK_ACTIVE_LOW);
3285 break;
3286 case VESA_VSYNC_SUSPEND:
3287 video = video & ~(PM3VideoControl_VSYNC_MASK |
3288 PM3VideoControl_BLANK_ACTIVE_LOW);
3289 break;
3290 case VESA_POWERDOWN:
3291 video = video & ~(PM3VideoControl_HSYNC_MASK |
3292 PM3VideoControl_VSYNC_MASK |
3293 PM3VideoControl_BLANK_ACTIVE_LOW);
3294 break;
3295 default:
3296 DPRINTK(1, "Unsupported blanking %d\n",
3297 blank_mode);
3298 return (1);
3299 break;
3300 }
3301 }
3302
3303 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
3304
3305 return (0);
3306 }
3307
pm3fb_set_disp(const void * par,struct display * disp,struct fb_info_gen * info)3308 static void pm3fb_set_disp(const void *par, struct display *disp,
3309 struct fb_info_gen *info)
3310 {
3311 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3312 struct pm3fb_par *p = (struct pm3fb_par *) par;
3313 u32 flags;
3314
3315 DTRACE;
3316
3317 save_flags(flags);
3318 cli();
3319 disp->screen_base = l_fb_info->v_fb;
3320 switch (p->depth) {
3321 #ifdef FBCON_HAS_CFB8
3322 case 8:
3323 #ifdef PM3FB_USE_ACCEL
3324 if (!(noaccel[l_fb_info->board_num]))
3325 disp->dispsw = &pm3fb_cfb8;
3326 else
3327 #endif /* PM3FB_USE_ACCEL */
3328 disp->dispsw = &fbcon_cfb8;
3329 break;
3330 #endif
3331 #ifdef FBCON_HAS_CFB16
3332 case 12:
3333 #ifdef PM3FB_USE_ACCEL
3334 if (!(noaccel[l_fb_info->board_num]))
3335 disp->dispsw = &pm3fb_cfb16;
3336 else
3337 #endif /* PM3FB_USE_ACCEL */
3338 disp->dispsw = &fbcon_cfb16;
3339 disp->dispsw_data = l_fb_info->cmap.cmap12;
3340 break;
3341 case 15:
3342 #ifdef PM3FB_USE_ACCEL
3343 if (!(noaccel[l_fb_info->board_num]))
3344 disp->dispsw = &pm3fb_cfb16;
3345 else
3346 #endif /* PM3FB_USE_ACCEL */
3347 disp->dispsw = &fbcon_cfb16;
3348 disp->dispsw_data = l_fb_info->cmap.cmap15;
3349 break;
3350 case 16:
3351 #ifdef PM3FB_USE_ACCEL
3352 if (!(noaccel[l_fb_info->board_num]))
3353 disp->dispsw = &pm3fb_cfb16;
3354 else
3355 #endif /* PM3FB_USE_ACCEL */
3356 disp->dispsw = &fbcon_cfb16;
3357 disp->dispsw_data = l_fb_info->cmap.cmap16;
3358 break;
3359 #endif
3360 #ifdef FBCON_HAS_CFB32
3361 case 32:
3362 #ifdef PM3FB_USE_ACCEL
3363 if (!(noaccel[l_fb_info->board_num]))
3364 disp->dispsw = &pm3fb_cfb32;
3365 else
3366 #endif /* PM3FB_USE_ACCEL */
3367 disp->dispsw = &fbcon_cfb32;
3368 disp->dispsw_data = l_fb_info->cmap.cmap32;
3369 break;
3370 #endif /* FBCON_HAS_CFB32 */
3371 default:
3372 disp->dispsw = &fbcon_dummy;
3373 DPRINTK(1, "Invalid depth, using fbcon_dummy\n");
3374 break;
3375 }
3376 restore_flags(flags);
3377 }
3378
3379 /* */
pm3fb_detect(void)3380 static void pm3fb_detect(void)
3381 {
3382 struct pci_dev *dev_array[PM3_MAX_BOARD];
3383 struct pci_dev *dev = NULL;
3384 struct pm3fb_info *l_fb_info = &(fb_info[0]);
3385 unsigned long i, j, done;
3386
3387 DTRACE;
3388
3389 for (i = 0; i < PM3_MAX_BOARD; i++) {
3390 dev_array[i] = NULL;
3391 fb_info[i].dev = NULL;
3392 }
3393
3394 dev =
3395 pci_find_device(PCI_VENDOR_ID_3DLABS,
3396 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3397
3398 for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) {
3399 dev_array[i] = dev;
3400 dev =
3401 pci_find_device(PCI_VENDOR_ID_3DLABS,
3402 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3403 }
3404
3405 if (dev) { /* more than PM3_MAX_BOARD */
3406 printk(KERN_WARNING "pm3fb: Warning: more than %d boards found\n",
3407 PM3_MAX_BOARD);
3408 }
3409
3410 if (!dev_array[0]) { /* not a single board, abort */
3411 return;
3412 }
3413
3414 /* allocate user-defined boards */
3415 for (i = 0; i < PM3_MAX_BOARD; i++) {
3416 if ((bus[i] >= 0) && (slot[i] >= 0) && (func[i] >= 0)) {
3417 for (j = 0; j < PM3_MAX_BOARD; j++) {
3418 if ((dev_array[j] != NULL) &&
3419 (dev_array[j]->bus->number == bus[i])
3420 && (PCI_SLOT(dev_array[j]->devfn) ==
3421 slot[i])
3422 && (PCI_FUNC(dev_array[j]->devfn) ==
3423 func[i])) {
3424 fb_info[i].dev = dev_array[j];
3425 dev_array[j] = NULL;
3426 }
3427 }
3428 }
3429 }
3430 /* allocate remaining boards */
3431 for (i = 0; i < PM3_MAX_BOARD; i++) {
3432 if (fb_info[i].dev == NULL) {
3433 done = 0;
3434 for (j = 0; ((j < PM3_MAX_BOARD) && (!done)); j++) {
3435 if (dev_array[j] != NULL) {
3436 fb_info[i].dev = dev_array[j];
3437 dev_array[j] = NULL;
3438 done = 1;
3439 }
3440 }
3441 }
3442 }
3443
3444 /* at that point, all PCI Permedia3 are detected and allocated */
3445 /* now, initialize... or not */
3446 for (i = 0; i < PM3_MAX_BOARD; i++) {
3447 l_fb_info = &(fb_info[i]);
3448 if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */
3449 #ifdef SUPPORT_FB_OF
3450 struct device_node *dp =
3451 find_pci_device_OFnode(l_fb_info->dev->bus->
3452 number,
3453 l_fb_info->dev->devfn);
3454
3455 if ((dp) && (!strncmp(dp->name, "formacGA12", 10))) {
3456 /* do nothing, init of board is done in pm3fb_of_init */
3457 } else {
3458 #endif
3459 DPRINTK(2,
3460 "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n",
3461 (unsigned long) l_fb_info->dev,
3462 (unsigned long) l_fb_info->dev->
3463 vendor,
3464 (unsigned long) l_fb_info->dev->
3465 device,
3466 (unsigned long)
3467 pci_resource_start(l_fb_info->dev,
3468 0),
3469 (unsigned long)
3470 pci_resource_start(l_fb_info->dev,
3471 1),
3472 (unsigned long)
3473 pci_resource_start(l_fb_info->dev,
3474 2),
3475 (unsigned long)
3476 pci_resource_start(l_fb_info->dev,
3477 3),
3478 (unsigned long)
3479 pci_resource_start(l_fb_info->dev,
3480 4),
3481 (unsigned long)
3482 pci_resource_start(l_fb_info->dev,
3483 5),
3484 (unsigned long) l_fb_info->dev->
3485 irq);
3486
3487 l_fb_info->pIOBase =
3488 (unsigned char *)
3489 pci_resource_start(l_fb_info->dev, 0);
3490 #ifdef __BIG_ENDIAN
3491 l_fb_info->pIOBase += PM3_REGS_SIZE;
3492 #endif
3493 l_fb_info->vIOBase = (unsigned char *) -1;
3494 l_fb_info->p_fb =
3495 (unsigned char *)
3496 pci_resource_start(l_fb_info->dev, 1);
3497 l_fb_info->v_fb = (unsigned char *) -1;
3498
3499 #if (defined KERNEL_2_4) || (defined KERNEL_2_5) /* full resource management, new in linux-2.4.x */
3500 if (!request_mem_region
3501 ((unsigned long)l_fb_info->p_fb, 64 * 1024 * 1024, /* request full aperture size */
3502 "pm3fb")) {
3503 printk
3504 (KERN_ERR "pm3fb: Error: couldn't request framebuffer memory, board #%ld\n",
3505 l_fb_info->board_num);
3506 continue;
3507 }
3508 if (!request_mem_region
3509 ((unsigned long)l_fb_info->pIOBase, PM3_REGS_SIZE,
3510 "pm3fb I/O regs")) {
3511 printk
3512 (KERN_ERR "pm3fb: Error: couldn't request IObase memory, board #%ld\n",
3513 l_fb_info->board_num);
3514 continue;
3515 }
3516 #endif /* KERNEL_2_4 or KERNEL_2_5 */
3517 if (forcesize[l_fb_info->board_num])
3518 l_fb_info->fb_size = forcesize[l_fb_info->board_num];
3519
3520 l_fb_info->fb_size =
3521 pm3fb_size_memory(l_fb_info);
3522
3523 if (l_fb_info->fb_size) {
3524 (void) pci_enable_device(l_fb_info->dev);
3525 pm3fb_common_init(l_fb_info);
3526 } else
3527 printk(KERN_ERR "pm3fb: memory problem, not enabling board #%ld\n", l_fb_info->board_num);
3528
3529 #ifdef SUPPORT_FB_OF
3530 }
3531 #endif /* SUPPORT_FB_OF */
3532 }
3533 }
3534 }
3535
pm3fb_pan_display(const struct fb_var_screeninfo * var,struct fb_info_gen * info)3536 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
3537 struct fb_info_gen *info)
3538 {
3539 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3540
3541 DTRACE;
3542
3543 if (!current_par_valid[l_fb_info->board_num])
3544 return -EINVAL;
3545
3546 l_fb_info->current_par->base = /* in 128 bits chunk - i.e. AFTER Shiftbpp */
3547 pm3fb_Shiftbpp(l_fb_info,
3548 l_fb_info->current_par->depth,
3549 (var->yoffset * l_fb_info->current_par->width) +
3550 var->xoffset);
3551 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
3552 return 0;
3553 }
3554
pm3fb_ioctl(struct inode * inode,struct file * file,u_int cmd,u_long arg,int con,struct fb_info * info)3555 static int pm3fb_ioctl(struct inode *inode, struct file *file,
3556 u_int cmd, u_long arg, int con,
3557 struct fb_info *info)
3558 {
3559 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3560 u32 cm, i;
3561 #ifdef PM3FB_MASTER_DEBUG
3562 char cc[3];
3563 #endif /* PM3FB_MASTER_DEBUG */
3564
3565 switch(cmd)
3566 {
3567 #ifdef PM3FB_MASTER_DEBUG
3568 case PM3FBIO_CLEARMEMORY:
3569 if (copy_from_user(&cm, (void *)arg, sizeof(u32)))
3570 return(-EFAULT);
3571 pm3fb_clear_memory(l_fb_info, cm);
3572 return(0);
3573 break;
3574
3575 case PM3FBIO_CLEARCMAP:
3576 if (copy_from_user(cc, (void*)arg, 3 * sizeof(char)))
3577 return(-EFAULT);
3578 pm3fb_clear_colormap(l_fb_info, cc[0], cc[1], cc[2]);
3579 return(0);
3580 break;
3581 #endif /* PM3FB_MASTER_DEBUG */
3582
3583 case PM3FBIO_RESETCHIP:
3584 cm = 1;
3585 PM3_SLOW_WRITE_REG(PM3ResetStatus, 1);
3586 for (i = 0 ; (i < 10000) && cm ; i++)
3587 {
3588 PM3_DELAY(10);
3589 cm = PM3_READ_REG(PM3ResetStatus);
3590 }
3591 if (cm)
3592 {
3593 printk(KERN_ERR "pm3fb: chip reset failed with status 0x%x\n", cm);
3594 return(-EIO);
3595 }
3596 /* first thing first, reload memory timings */
3597 pm3fb_write_memory_timings(l_fb_info);
3598 #ifdef PM3FB_USE_ACCEL
3599 pm3fb_init_engine(l_fb_info);
3600 #endif /* PM3FB_USE_ACCEL */
3601 pm3fb_write_mode(l_fb_info);
3602 return(0);
3603 break;
3604
3605 default:
3606 DPRINTK(2, "unknown ioctl: %d (%x)\n", cmd, cmd);
3607 return(-EINVAL);
3608 }
3609 }
3610
3611 /* ****************************************** */
3612 /* ***** standard FB API init functions ***** */
3613 /* ****************************************** */
3614
3615 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
pm3fb_setup(char * options)3616 int __init pm3fb_setup(char *options)
3617 #endif
3618 #ifdef KERNEL_2_2
3619 __initfunc(void pm3fb_setup(char *options, int *ints))
3620 #endif
3621 {
3622 long opsi = strlen(options);
3623
3624 DTRACE;
3625
3626 memcpy(g_options, options,
3627 ((opsi + 1) >
3628 PM3_OPTIONS_SIZE) ? PM3_OPTIONS_SIZE : (opsi + 1));
3629 g_options[PM3_OPTIONS_SIZE - 1] = 0;
3630
3631 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3632 return (0);
3633 #endif
3634 }
3635
3636 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
pm3fb_init(void)3637 int __init pm3fb_init(void)
3638 #endif
3639 #ifdef KERNEL_2_2
3640 __initfunc(void pm3fb_init(void))
3641 #endif
3642 {
3643 DTRACE;
3644
3645 DPRINTK(2, "This is pm3fb.c, CVS version: $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $");
3646
3647 pm3fb_real_setup(g_options);
3648
3649 pm3fb_detect();
3650
3651 if (!fb_info[0].dev) { /* not even one board ??? */
3652 DPRINTK(1, "No PCI Permedia3 board detected\n");
3653 }
3654 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3655 return (0);
3656 #endif
3657 }
3658
3659 #ifdef SUPPORT_FB_OF /* linux-2.2.x only */
__initfunc(void pm3fb_of_init (struct device_node * dp))3660 __initfunc(void pm3fb_of_init(struct device_node *dp))
3661 {
3662 struct pm3fb_info *l_fb_info = NULL;
3663 unsigned long i;
3664 long bn = -1;
3665 struct device_node *dn;
3666
3667 DTRACE;
3668
3669 DPRINTK(2, "OpenFirmware board : %s\n", dp->full_name);
3670
3671 for (i = 0; i < dp->n_addrs; i++) {
3672 DPRINTK(2, "MemRange : 0x%08x - 0x%x\n",
3673 dp->addrs[i].address, dp->addrs[i].size);
3674 }
3675
3676 for (i = 0; i < PM3_MAX_BOARD; i++) { /* find which PCI board is the OF device */
3677 if (fb_info[i].dev) {
3678 dn = find_pci_device_OFnode(fb_info[i].dev->bus->
3679 number,
3680 fb_info[i].dev->devfn);
3681 if (dn == dp) {
3682 if (bn == -1)
3683 bn = i;
3684 else {
3685 DPRINTK(1,
3686 "Error: Multiple PCI device for a single OpenFirmware node\n");
3687 }
3688 }
3689 }
3690 }
3691
3692 if (bn == -1) {
3693 DPRINTK(1, "Warning: non-PCI Permedia3 found\n");
3694 i = 0;
3695 while (fb_info[i].dev && (i < PM3_MAX_BOARD))
3696 i++;
3697 if (i < PM3_MAX_BOARD)
3698 bn = i;
3699 else {
3700 printk
3701 (KERN_ERR "pm3fb: Error: Couldn't find room for OpenFirmware device");
3702 return;
3703 }
3704 }
3705
3706 l_fb_info = &(fb_info[bn]);
3707
3708 l_fb_info->dn = dp;
3709
3710 l_fb_info->pIOBase = (unsigned char *) dp->addrs[3].address;
3711 #ifdef __BIG_ENDIAN
3712 l_fb_info->pIOBase += PM3_REGS_SIZE;
3713 #endif
3714 l_fb_info->vIOBase = (unsigned char *) -1;
3715 l_fb_info->p_fb = (unsigned char *) dp->addrs[1].address;
3716 l_fb_info->v_fb = (unsigned char *) -1;
3717
3718 l_fb_info->fb_size = pm3fb_size_memory(l_fb_info); /* (unsigned long)dp->addrs[1].size; *//* OF is a liar ! it claims 256 Mb */
3719
3720 DPRINTK(2,
3721 "OpenFirmware board (#%ld) : IOBase 0x%08lx, p_fb 0x%08lx, fb_size %d KB\n",
3722 bn, (unsigned long) l_fb_info->pIOBase,
3723 (unsigned long) l_fb_info->p_fb, l_fb_info->fb_size >> 10);
3724
3725 l_fb_info->use_current = 1; /* will use current mode by default */
3726
3727 pm3fb_common_init(l_fb_info);
3728 }
3729 #endif /* SUPPORT_FB_OF */
3730
3731 /* ************************* */
3732 /* **** Module support ***** */
3733 /* ************************* */
3734
3735 #ifdef MODULE
3736 MODULE_AUTHOR("Romain Dolbeau");
3737 MODULE_DESCRIPTION("Permedia3 framebuffer device driver");
3738 static char *mode[PM3_MAX_BOARD];
3739 MODULE_PARM(mode,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3740 MODULE_PARM_DESC(mode,"video mode");
3741 MODULE_PARM(disable,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3742 MODULE_PARM_DESC(disable,"disable board");
3743 static short off[PM3_MAX_BOARD];
3744 MODULE_PARM(off,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3745 MODULE_PARM_DESC(off,"disable board");
3746 static char *pciid[PM3_MAX_BOARD];
3747 MODULE_PARM(pciid,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3748 MODULE_PARM_DESC(pciid,"board PCI Id");
3749 MODULE_PARM(noaccel,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3750 MODULE_PARM_DESC(noaccel,"disable accel");
3751 static char *font[PM3_MAX_BOARD];
3752 MODULE_PARM(font,PM3_MAX_BOARD_MODULE_ARRAY_STRING);
3753 MODULE_PARM_DESC(font,"choose font");
3754 MODULE_PARM(depth,PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3755 MODULE_PARM_DESC(depth,"boot-time depth");
3756 MODULE_PARM(printtimings, "h");
3757 MODULE_PARM_DESC(printtimings, "print the memory timings of the card(s)");
3758 MODULE_PARM(forcesize, PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3759 MODULE_PARM_DESC(forcesize, "force specified memory size");
3760 MODULE_PARM(flatpanel, PM3_MAX_BOARD_MODULE_ARRAY_SHORT);
3761 MODULE_PARM_DESC(flatpanel, "flatpanel (LCD) support (preliminary)");
3762 /*
3763 MODULE_SUPPORTED_DEVICE("Permedia3 PCI boards")
3764 MODULE_GENERIC_TABLE(gtype,name)
3765 MODULE_DEVICE_TABLE(type,name)
3766 */
3767
pm3fb_build_options(void)3768 void pm3fb_build_options(void)
3769 {
3770 int i;
3771 char ts[128];
3772
3773 strcpy(g_options, "pm3fb");
3774 for (i = 0; i < PM3_MAX_BOARD ; i++)
3775 {
3776 if (mode[i])
3777 {
3778 sprintf(ts, ",mode:%d:%s", i, mode[i]);
3779 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3780 }
3781 if (disable[i] || off[i])
3782 {
3783 sprintf(ts, ",disable:%d:", i);
3784 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3785 }
3786 if (pciid[i])
3787 {
3788 sprintf(ts, ",pciid:%d:%s", i, pciid[i]);
3789 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3790 }
3791 if (noaccel[i])
3792 {
3793 sprintf(ts, ",noaccel:%d:", i);
3794 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3795 }
3796 if (font[i])
3797 {
3798 sprintf(ts, ",font:%d:%s", i, font[i]);
3799 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3800 }
3801 if (depth[i])
3802 {
3803 sprintf(ts, ",depth:%d:%d", i, depth[i]);
3804 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3805 }
3806 if (flatpanel[i])
3807 {
3808 sprintf(ts, ",flatpanel:%d:", i);
3809 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3810 }
3811 }
3812 g_options[PM3_OPTIONS_SIZE - 1] = '\0';
3813 DPRINTK(1, "pm3fb use options: %s\n", g_options);
3814 }
3815
init_module(void)3816 int init_module(void)
3817 {
3818 DTRACE;
3819
3820 pm3fb_build_options();
3821
3822 pm3fb_init();
3823
3824 return (0);
3825 }
3826
cleanup_module(void)3827 void cleanup_module(void)
3828 {
3829 DTRACE;
3830 {
3831 unsigned long i;
3832 struct pm3fb_info *l_fb_info;
3833 for (i = 0; i < PM3_MAX_BOARD; i++) {
3834 l_fb_info = &(fb_info[i]);
3835 if ((l_fb_info->dev != NULL)
3836 && (!(disable[l_fb_info->board_num]))) {
3837 if (l_fb_info->vIOBase !=
3838 (unsigned char *) -1) {
3839 pm3fb_unmapIO(l_fb_info);
3840 #if (defined KERNEL_2_4) || (defined KERNEL_2_5)
3841 release_mem_region((u_long)l_fb_info->p_fb,
3842 l_fb_info->fb_size);
3843 release_mem_region((u_long)l_fb_info->pIOBase,
3844 PM3_REGS_SIZE);
3845 #endif /* KERNEL_2_4 or KERNEL_2_5 */
3846 }
3847 unregister_framebuffer(&l_fb_info->gen.
3848 info);
3849 }
3850 }
3851 }
3852 return;
3853 }
3854 #endif /* MODULE */
3855