1 /*
2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
3 * Copyright (C) 2001, 2002, 2003
4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
5 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 *
18 * Revision History:
19 * 1.0: Initial Release.
20 * 1.1: Add /proc SDTR status.
21 * Remove obsolete error handler nsp32_reset.
22 * Some clean up.
23 * 1.2: PowerPC (big endian) support.
24 */
25
26 #include <linux/version.h>
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/string.h>
33 #include <linux/timer.h>
34 #include <linux/ioport.h>
35 #include <linux/major.h>
36 #include <linux/blkdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/pci.h>
39 #include <linux/delay.h>
40 #include <linux/ctype.h>
41 #include <linux/interrupt.h>
42
43 #include <asm/dma.h>
44 #include <asm/system.h>
45 #include <asm/io.h>
46
47 #include "scsi.h"
48 #include "hosts.h"
49 #include <scsi/scsi_ioctl.h>
50 #include <scsi/scsi.h>
51
52 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
53 # include <linux/blk.h>
54 #endif
55
56 #include "nsp32.h"
57
58
59 /***********************************************************************
60 * Module parameters
61 */
62 static int trans_mode = 0; /* default: BIOS */
63 MODULE_PARM (trans_mode, "i");
64 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
65 #define ASYNC_MODE 1
66 #define ULTRA20M_MODE 2
67
68 static int auto_param = 0; /* default: ON */
69 MODULE_PARM (auto_param, "i");
70 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
71
72 static int disc_priv = 1; /* default: OFF */
73 MODULE_PARM (disc_priv, "i");
74 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
75
76 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
77 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
78 MODULE_LICENSE("GPL");
79
80 static const char *nsp32_release_version = "1.2";
81
82
83 /****************************************************************************
84 * Supported hardware
85 */
86 static struct pci_device_id nsp32_pci_table[] __devinitdata = {
87 {
88 .vendor = PCI_VENDOR_ID_IODATA,
89 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
90 .subvendor = PCI_ANY_ID,
91 .subdevice = PCI_ANY_ID,
92 .driver_data = MODEL_IODATA,
93 },
94 {
95 .vendor = PCI_VENDOR_ID_WORKBIT,
96 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
97 .subvendor = PCI_ANY_ID,
98 .subdevice = PCI_ANY_ID,
99 .driver_data = MODEL_KME,
100 },
101 {
102 .vendor = PCI_VENDOR_ID_WORKBIT,
103 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
104 .subvendor = PCI_ANY_ID,
105 .subdevice = PCI_ANY_ID,
106 .driver_data = MODEL_WORKBIT,
107 },
108 {
109 .vendor = PCI_VENDOR_ID_WORKBIT,
110 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
111 .subvendor = PCI_ANY_ID,
112 .subdevice = PCI_ANY_ID,
113 .driver_data = MODEL_PCI_WORKBIT,
114 },
115 {
116 .vendor = PCI_VENDOR_ID_WORKBIT,
117 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
118 .subvendor = PCI_ANY_ID,
119 .subdevice = PCI_ANY_ID,
120 .driver_data = MODEL_LOGITEC,
121 },
122 {
123 .vendor = PCI_VENDOR_ID_WORKBIT,
124 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
125 .subvendor = PCI_ANY_ID,
126 .subdevice = PCI_ANY_ID,
127 .driver_data = MODEL_PCI_LOGITEC,
128 },
129 {
130 .vendor = PCI_VENDOR_ID_WORKBIT,
131 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
132 .subvendor = PCI_ANY_ID,
133 .subdevice = PCI_ANY_ID,
134 .driver_data = MODEL_PCI_MELCO,
135 },
136 {
137 .vendor = PCI_VENDOR_ID_WORKBIT,
138 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
139 .subvendor = PCI_ANY_ID,
140 .subdevice = PCI_ANY_ID,
141 .driver_data = MODEL_PCI_MELCO,
142 },
143 {0,0,},
144 };
145 MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
146
147 static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
148
149
150 /*
151 * Period/AckWidth speed conversion table
152 *
153 * Note: This period/ackwidth speed table must be in descending order.
154 */
155 static nsp32_sync_table nsp32_sync_table_40M[] = {
156 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
157 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
158 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
159 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
160 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
161 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
162 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
163 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
164 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
165 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
166 {0xa, 3, 0x3f, 0x44, SMPL_10M}, /* 3.64: 275ns, 100ns */
167 {0xb, 3, 0x45, 0x4b, SMPL_10M}, /* 3.33: 300ns, 100ns */
168 {0xc, 3, 0x4c, 0x53, SMPL_10M}, /* 3.01: 325ns, 100ns */
169 {0xd, 3, 0x54, 0x57, SMPL_10M}, /* 2.86: 350ns, 100ns */
170 {0xe, 3, 0x58, 0x5d, SMPL_10M}, /* 2.67: 375ns, 100ns */
171 {0xf, 3, 0x5e, 0x64, SMPL_10M}, /* 2.5 : 400ns, 100ns */
172 };
173
174 static nsp32_sync_table nsp32_sync_table_20M[] = {
175 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
176 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
177 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
178 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
179 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
180 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
181 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
182 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
183 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
184 {0xa, 3, 0x7e, 0x89, SMPL_10M}, /* 1.82: 550ns, 200ns */
185 {0xb, 3, 0x8a, 0x95, SMPL_10M}, /* 1.67: 550ns, 200ns */
186 {0xc, 3, 0x96, 0xa2, SMPL_10M}, /* 1.54: 550ns, 200ns */
187 {0xd, 3, 0xa3, 0xae, SMPL_10M}, /* 1.43: 550ns, 200ns */
188 {0xe, 3, 0xaf, 0xbb, SMPL_10M}, /* 1.33: 550ns, 200ns */
189 {0xf, 3, 0xbc, 0xc8, SMPL_10M}, /* 1.25: 550ns, 200ns */
190 };
191
192 static nsp32_sync_table nsp32_sync_table_pci[] = {
193 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
194 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
195 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
196 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
197 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
198 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
199 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
200 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
201 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
202 {0xa, 3, 0x4c, 0x53, SMPL_10M}, /* 3.0 : 330ns, 120ns */
203 {0xb, 3, 0x54, 0x59, SMPL_10M}, /* 2.8 : 360ns, 120ns */
204 {0xc, 3, 0x5a, 0x60, SMPL_10M}, /* 2.6 : 390ns, 120ns */
205 {0xd, 3, 0x61, 0x68, SMPL_10M}, /* 2.4 : 420ns, 120ns */
206 {0xe, 3, 0x69, 0x71, SMPL_10M}, /* 2.2 : 450ns, 120ns */
207 {0xf, 3, 0x72, 0x77, SMPL_10M}, /* 2.1 : 480ns, 120ns */
208 };
209
210 /*
211 * function declaration
212 */
213 /* module entry point */
214 static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
215 static void __devexit nsp32_remove(struct pci_dev *);
216 static int __init init_nsp32 (void);
217 static void __exit exit_nsp32 (void);
218
219 /* struct Scsi_Host_Template */
220 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
221 static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
222 #else
223 static int nsp32_proc_info (char *, char **, off_t, int, int, int);
224 #endif
225
226 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
227 static int nsp32_detect (struct pci_dev *pdev);
228 #else
229 static int nsp32_detect (Scsi_Host_Template *);
230 #endif
231 static int nsp32_queuecommand(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
232 static const char *nsp32_info (struct Scsi_Host *);
233 static int nsp32_release (struct Scsi_Host *);
234
235 /* SCSI error handler */
236 static int nsp32_eh_abort (Scsi_Cmnd *);
237 static int nsp32_eh_bus_reset (Scsi_Cmnd *);
238 static int nsp32_eh_host_reset(Scsi_Cmnd *);
239
240 /* generate SCSI message */
241 static void nsp32_build_identify(Scsi_Cmnd *);
242 static void nsp32_build_nop (Scsi_Cmnd *);
243 static void nsp32_build_reject (Scsi_Cmnd *);
244 static void nsp32_build_sdtr (Scsi_Cmnd *, unsigned char, unsigned char);
245
246 /* SCSI message handler */
247 static int nsp32_busfree_occur(Scsi_Cmnd *, unsigned short);
248 static void nsp32_msgout_occur (Scsi_Cmnd *);
249 static void nsp32_msgin_occur (Scsi_Cmnd *, unsigned long, unsigned short);
250
251 static int nsp32_setup_sg_table (Scsi_Cmnd *);
252 static unsigned long nsp32_msgout_register (Scsi_Cmnd *);
253 static int nsp32_selection_autopara(Scsi_Cmnd *);
254 static int nsp32_selection_autoscsi(Scsi_Cmnd *);
255 static void nsp32_scsi_done (Scsi_Cmnd *);
256 static int nsp32_arbitration (Scsi_Cmnd *, unsigned int);
257 static int nsp32_reselection (Scsi_Cmnd *, unsigned char);
258 static void nsp32_adjust_busfree (Scsi_Cmnd *, unsigned int);
259 static void nsp32_restart_autoscsi (Scsi_Cmnd *, unsigned short);
260
261 /* SCSI SDTR */
262 static void nsp32_analyze_sdtr (Scsi_Cmnd *);
263 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
264 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
265 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
266 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
267
268 /* SCSI bus status handler */
269 static void nsp32_wait_req (nsp32_hw_data *, int);
270 static void nsp32_wait_sack (nsp32_hw_data *, int);
271 static void nsp32_sack_assert (nsp32_hw_data *);
272 static void nsp32_sack_negate (nsp32_hw_data *);
273 static void nsp32_do_bus_reset(nsp32_hw_data *);
274
275 /* hardware interrupt handler */
276 static irqreturn_t do_nsp32_isr(int, void *, struct pt_regs *);
277
278 /* initialize hardware */
279 static int nsp32hw_init(nsp32_hw_data *);
280
281 /* EEPROM handler */
282 static int nsp32_getprom_param (nsp32_hw_data *);
283 static int nsp32_getprom_at24 (nsp32_hw_data *);
284 static int nsp32_getprom_c16 (nsp32_hw_data *);
285 static void nsp32_prom_start (nsp32_hw_data *);
286 static void nsp32_prom_stop (nsp32_hw_data *);
287 static int nsp32_prom_read (nsp32_hw_data *, int);
288 static int nsp32_prom_read_bit (nsp32_hw_data *);
289 static void nsp32_prom_write_bit(nsp32_hw_data *, int);
290 static inline void nsp32_prom_set (nsp32_hw_data *, int, int);
291 static inline int nsp32_prom_get (nsp32_hw_data *, int);
292
293 /* debug/warning/info message */
294 static void nsp32_message (const char *, int, char *, char *, ...);
295 #ifdef NSP32_DEBUG
296 static void nsp32_dmessage(const char *, int, int, char *, ...);
297 #endif
298
299 /*
300 * max_sectors is currently limited up to 128.
301 */
302 static Scsi_Host_Template nsp32_template = {
303 .proc_name = "nsp32",
304 .name = "Workbit NinjaSCSI-32Bi/UDE",
305 .proc_info = nsp32_proc_info,
306 .info = nsp32_info,
307 .queuecommand = nsp32_queuecommand,
308 .can_queue = 1,
309 .sg_tablesize = NSP32_SG_SIZE,
310 .max_sectors = 128,
311 .cmd_per_lun = 1,
312 .this_id = NSP32_HOST_SCSIID,
313 .use_clustering = DISABLE_CLUSTERING,
314 .eh_abort_handler = nsp32_eh_abort,
315 /* .eh_device_reset_handler = NULL, */
316 .eh_bus_reset_handler = nsp32_eh_bus_reset,
317 .eh_host_reset_handler = nsp32_eh_host_reset,
318 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,74))
319 .detect = nsp32_detect,
320 .release = nsp32_release,
321 .use_new_eh_code = 1,
322 #else
323 /* .highmem_io = 1, */
324 #endif
325 };
326
327 #include "nsp32_io.h"
328
329 /***********************************************************************
330 * debug, error print
331 */
332 #ifndef NSP32_DEBUG
333 # define NSP32_DEBUG_MASK 0x000000
334 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
335 # define nsp32_dbg(mask, args...) /* */
336 #else
337 # define NSP32_DEBUG_MASK 0xffffff
338 # define nsp32_msg(type, args...) \
339 nsp32_message (__FUNCTION__, __LINE__, (type), args)
340 # define nsp32_dbg(mask, args...) \
341 nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
342 #endif
343
344 #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
345 #define NSP32_DEBUG_REGISTER BIT(1)
346 #define NSP32_DEBUG_AUTOSCSI BIT(2)
347 #define NSP32_DEBUG_INTR BIT(3)
348 #define NSP32_DEBUG_SGLIST BIT(4)
349 #define NSP32_DEBUG_BUSFREE BIT(5)
350 #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
351 #define NSP32_DEBUG_RESELECTION BIT(7)
352 #define NSP32_DEBUG_MSGINOCCUR BIT(8)
353 #define NSP32_DEBUG_EEPROM BIT(9)
354 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
355 #define NSP32_DEBUG_BUSRESET BIT(11)
356 #define NSP32_DEBUG_RESTART BIT(12)
357 #define NSP32_DEBUG_SYNC BIT(13)
358 #define NSP32_DEBUG_WAIT BIT(14)
359 #define NSP32_DEBUG_TARGETFLAG BIT(15)
360 #define NSP32_DEBUG_PROC BIT(16)
361 #define NSP32_DEBUG_INIT BIT(17)
362 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
363
364 #define NSP32_DEBUG_BUF_LEN 100
365
nsp32_message(const char * func,int line,char * type,char * fmt,...)366 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
367 {
368 va_list args;
369 char buf[NSP32_DEBUG_BUF_LEN];
370
371 va_start(args, fmt);
372 vsnprintf(buf, sizeof(buf), fmt, args);
373 va_end(args);
374
375 #ifndef NSP32_DEBUG
376 printk("%snsp32: %s\n", type, buf);
377 #else
378 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
379 #endif
380 }
381
382 #ifdef NSP32_DEBUG
nsp32_dmessage(const char * func,int line,int mask,char * fmt,...)383 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
384 {
385 va_list args;
386 char buf[NSP32_DEBUG_BUF_LEN];
387
388 va_start(args, fmt);
389 vsnprintf(buf, sizeof(buf), fmt, args);
390 va_end(args);
391
392 if (mask & NSP32_DEBUG_MASK) {
393 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
394 }
395 }
396 #endif
397
398 #ifdef NSP32_DEBUG
399 # include "nsp32_debug.c"
400 #else
401 # define show_command(arg) /* */
402 # define show_busphase(arg) /* */
403 # define show_autophase(arg) /* */
404 #endif
405
406 /*
407 * IDENTIFY Message
408 */
nsp32_build_identify(Scsi_Cmnd * SCpnt)409 static void nsp32_build_identify(Scsi_Cmnd *SCpnt)
410 {
411 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
412 int pos = data->msgout_len;
413 int mode = FALSE;
414
415 /* XXX: Auto DiscPriv detection is progressing... */
416 if (disc_priv == 0) {
417 /* mode = TRUE; */
418 }
419
420 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
421
422 data->msgout_len = pos;
423 }
424
425 /*
426 * SDTR Message Routine
427 */
nsp32_build_sdtr(Scsi_Cmnd * SCpnt,unsigned char period,unsigned char offset)428 static void nsp32_build_sdtr(Scsi_Cmnd *SCpnt,
429 unsigned char period,
430 unsigned char offset)
431 {
432 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
433 int pos = data->msgout_len;
434
435 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
436 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
437 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
438 data->msgoutbuf[pos] = period; pos++;
439 data->msgoutbuf[pos] = offset; pos++;
440
441 data->msgout_len = pos;
442 }
443
444 /*
445 * No Operation Message
446 */
nsp32_build_nop(Scsi_Cmnd * SCpnt)447 static void nsp32_build_nop(Scsi_Cmnd *SCpnt)
448 {
449 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
450 int pos = data->msgout_len;
451
452 if (pos != 0) {
453 nsp32_msg(KERN_WARNING,
454 "Some messages are already contained!");
455 return;
456 }
457
458 data->msgoutbuf[pos] = NOP; pos++;
459 data->msgout_len = pos;
460 }
461
462 /*
463 * Reject Message
464 */
nsp32_build_reject(Scsi_Cmnd * SCpnt)465 static void nsp32_build_reject(Scsi_Cmnd *SCpnt)
466 {
467 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
468 int pos = data->msgout_len;
469
470 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
471 data->msgout_len = pos;
472 }
473
474 /*
475 * Start hardware timer
476 */
477 #if 0
478 static void nsp32_start_timer(Scsi_Cmnd *SCpnt, int time)
479 {
480 unsigned int base = SCpnt->host->io_port;
481
482 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
483
484 if (time & (~TIMER_CNT_MASK)) {
485 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
486 }
487
488 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
489 }
490 #endif
491
492 /*
493 * Generate msgout register value based on the number of messages.
494 */
nsp32_msgout_register(Scsi_Cmnd * SCpnt)495 static unsigned long nsp32_msgout_register(Scsi_Cmnd *SCpnt)
496 {
497 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
498 unsigned long msgout;
499 int i;
500
501 /*
502 * message out
503 *
504 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
505 * over 3 messages needs another routine.
506 */
507 if (data->msgout_len > 0 && data->msgout_len <= 3) {
508 msgout = 0;
509 for (i = 0; i < data->msgout_len; i++) {
510 /*
511 * msgout register layout:
512 * bit: 31-24 23-16 15-08 07 06-02 01-00
513 * MSG#2 MSG#1 MSG#0 MV <void> len
514 *
515 * the sending order of the message is:
516 * len = 3: MSG#0 -> MSG#1 -> MSG#2
517 * len = 2: MSG#1 -> MSG#2
518 * len = 1: MSG#2
519 */
520 msgout >>= 8;
521 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
522 }
523 msgout |= MSGOUT_VALID; /* Message out Valid */
524 msgout |= data->msgout_len; /* len */
525 } else {
526 /* data->msgout_len > 3 || data->msgout_len <= 0*/
527 msgout = 0;
528 }
529
530 return msgout;
531 }
532
533 /*
534 * set SCSI command and other parameter to asic, and start selection phase
535 */
nsp32_selection_autopara(Scsi_Cmnd * SCpnt)536 static int nsp32_selection_autopara(Scsi_Cmnd *SCpnt)
537 {
538 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
539 unsigned int base = SCpnt->device->host->io_port;
540 unsigned int host_id = SCpnt->device->host->this_id;
541 unsigned char target = SCpnt->device->id;
542 nsp32_autoparam *param = data->autoparam;
543 unsigned char phase;
544 int i, ret;
545 unsigned long msgout_reg;
546 unsigned short transfer_reg;
547
548 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
549
550 /*
551 * check bus free
552 */
553 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
554 if (phase != BUSMON_BUS_FREE) {
555 nsp32_msg(KERN_WARNING, "bus busy");
556 show_busphase(phase & BUSMON_PHASE_MASK);
557 SCpnt->result = DID_BUS_BUSY << 16;
558 return FALSE;
559 }
560
561 /*
562 * message out
563 */
564 if (data->msgout_len == 0) {
565 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
566 SCpnt->result = DID_ERROR << 16;
567 return FALSE;
568 } else {
569 msgout_reg = nsp32_msgout_register(SCpnt);
570 }
571
572 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
573 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
574
575 /*
576 * setup asic parameter
577 */
578 memset(param, 0, sizeof(nsp32_autoparam));
579
580 /* cdb */
581 for (i = 0; i < SCpnt->cmd_len; i++) {
582 param->cdb[4 * i] = SCpnt->cmnd[i];
583 }
584
585 /* outgoing messages */
586 param->msgout = cpu_to_le32(msgout_reg);
587
588 /* syncreg, ackwidth, target id, SREQ sampling rate */
589 param->syncreg = data->cur_target->syncreg;
590 param->ackwidth = data->cur_target->ackwidth;
591 param->target_id = BIT(host_id) | BIT(target);
592 param->sample_reg = data->cur_target->sample_reg;
593
594 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
595
596 /* command control */
597 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
598 AUTOSCSI_START |
599 AUTO_MSGIN_00_OR_04 |
600 AUTO_MSGIN_02 |
601 AUTO_ATN );
602
603
604 /* transfer control */
605 transfer_reg = 0;
606 switch (data->trans_method) {
607 case NSP32_TRANSFER_BUSMASTER:
608 transfer_reg |= BM_START;
609 break;
610 case NSP32_TRANSFER_MMIO:
611 transfer_reg |= CB_MMIO_MODE;
612 break;
613 case NSP32_TRANSFER_PIO:
614 transfer_reg |= CB_IO_MODE;
615 break;
616 default:
617 nsp32_msg(KERN_ERR, "unknown trans_method");
618 break;
619 }
620 /*
621 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
622 * For bus master transfer, it's taken off.
623 */
624 transfer_reg |= (TRANSFER_GO | ALL_COUNTER_CLR);
625 param->transfer_control = cpu_to_le16(transfer_reg);
626
627 /* sg table addr */
628 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
629
630 /*
631 * transfer parameter to ASIC
632 */
633 nsp32_write4(base, SGT_ADR, data->auto_paddr);
634 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
635 AUTO_PARAMETER );
636
637 /*
638 * Check arbitration
639 */
640 ret = nsp32_arbitration(SCpnt, base);
641
642 return ret;
643 }
644
645
646 /*
647 * Selection with AUTO SCSI (without AUTO PARAMETER)
648 */
nsp32_selection_autoscsi(Scsi_Cmnd * SCpnt)649 static int nsp32_selection_autoscsi(Scsi_Cmnd *SCpnt)
650 {
651 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
652 unsigned int base = SCpnt->device->host->io_port;
653 unsigned int host_id = SCpnt->device->host->this_id;
654 unsigned char target = SCpnt->device->id;
655 unsigned char phase;
656 int status;
657 unsigned short command = 0;
658 unsigned long msgout = 0;
659 unsigned short execph;
660 int i;
661
662 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
663
664 /*
665 * IRQ disable
666 */
667 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
668
669 /*
670 * check bus line
671 */
672 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
673 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
674 nsp32_msg(KERN_WARNING, "bus busy");
675 SCpnt->result = DID_BUS_BUSY << 16;
676 status = 1;
677 goto out;
678 }
679
680 /*
681 * clear execph
682 */
683 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
684
685 /*
686 * clear FIFO counter to set CDBs
687 */
688 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
689
690 /*
691 * set CDB0 - CDB15
692 */
693 for (i = 0; i < SCpnt->cmd_len; i++) {
694 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
695 }
696 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
697
698 /*
699 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
700 */
701 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
702
703 /*
704 * set SCSI MSGOUT REG
705 */
706 if (data->msgout_len == 0) {
707 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
708 SCpnt->result = DID_ERROR << 16;
709 status = 1;
710 goto out;
711 } else {
712 msgout = nsp32_msgout_register(SCpnt);
713 nsp32_write4(base, SCSI_MSG_OUT, msgout);
714 }
715
716 /*
717 * set selection timeout(= 250ms)
718 */
719 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
720
721 /*
722 * set SREQ hazard killer sampling rate
723 *
724 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
725 * check other internal clock!
726 */
727 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
728
729 /*
730 * clear Arbit
731 */
732 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
733
734 /*
735 * set SYNCREG
736 * Don't set BM_START_ADR before setting this register.
737 */
738 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
739
740 /*
741 * set ACKWIDTH
742 */
743 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
744
745 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
746 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
747 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
748 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
749 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
750 data->msgout_len, msgout);
751
752 /*
753 * set SGT ADDR (physical address)
754 */
755 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
756
757 /*
758 * set TRANSFER CONTROL REG
759 */
760 command = 0;
761 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
762 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
763 if (SCpnt->request_bufflen > 0) {
764 command |= BM_START;
765 }
766 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
767 command |= CB_MMIO_MODE;
768 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
769 command |= CB_IO_MODE;
770 }
771 nsp32_write2(base, TRANSFER_CONTROL, command);
772
773 /*
774 * start AUTO SCSI, kick off arbitration
775 */
776 command = (CLEAR_CDB_FIFO_POINTER |
777 AUTOSCSI_START |
778 AUTO_MSGIN_00_OR_04 |
779 AUTO_MSGIN_02 |
780 AUTO_ATN );
781 nsp32_write2(base, COMMAND_CONTROL, command);
782
783 /*
784 * Check arbitration
785 */
786 status = nsp32_arbitration(SCpnt, base);
787
788 out:
789 /*
790 * IRQ enable
791 */
792 nsp32_write2(base, IRQ_CONTROL, 0);
793
794 return status;
795 }
796
797
798 /*
799 * Arbitration Status Check
800 *
801 * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
802 * Using udelay(1) consumes CPU time and system time, but
803 * arbitration delay time is defined minimal 2.4us in SCSI
804 * specification, thus udelay works as coarse grained wait timer.
805 */
nsp32_arbitration(Scsi_Cmnd * SCpnt,unsigned int base)806 static int nsp32_arbitration(Scsi_Cmnd *SCpnt, unsigned int base)
807 {
808 unsigned char arbit;
809 int status = TRUE;
810 int time = 0;
811
812 do {
813 arbit = nsp32_read1(base, ARBIT_STATUS);
814 time++;
815 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
816 (time <= ARBIT_TIMEOUT_TIME));
817
818 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
819 "arbit: 0x%x, delay time: %d", arbit, time);
820
821 if (arbit & ARBIT_WIN) {
822 /* Arbitration succeeded */
823 SCpnt->result = DID_OK << 16;
824 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
825 } else if (arbit & ARBIT_FAIL) {
826 /* Arbitration failed */
827 SCpnt->result = DID_BUS_BUSY << 16;
828 status = FALSE;
829 } else {
830 /*
831 * unknown error or ARBIT_GO timeout,
832 * something lock up! guess no connection.
833 */
834 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
835 SCpnt->result = DID_NO_CONNECT << 16;
836 status = FALSE;
837 }
838
839 /*
840 * clear Arbit
841 */
842 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
843
844 return status;
845 }
846
847
848 /*
849 * reselection
850 *
851 * Note: This reselection routine is called from msgin_occur,
852 * reselection target id&lun must be already set.
853 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
854 */
nsp32_reselection(Scsi_Cmnd * SCpnt,unsigned char newlun)855 static int nsp32_reselection(Scsi_Cmnd *SCpnt, unsigned char newlun)
856 {
857 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
858 unsigned int host_id = SCpnt->device->host->this_id;
859 unsigned int base = SCpnt->device->host->io_port;
860 unsigned char tmpid, newid;
861
862 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
863
864 /*
865 * calculate reselected SCSI ID
866 */
867 tmpid = nsp32_read1(base, RESELECT_ID);
868 tmpid &= (~BIT(host_id));
869 newid = 0;
870 while (tmpid) {
871 if (tmpid & 1) {
872 break;
873 }
874 tmpid >>= 1;
875 newid++;
876 }
877
878 /*
879 * If reselected New ID:LUN is not existed
880 * or current nexus is not existed, unexpected
881 * reselection is occurred. Send reject message.
882 */
883 if (newid >= NUMBER(data->lunt) || newlun >= NUMBER(data->lunt[0])) {
884 nsp32_msg(KERN_WARNING, "unknown id/lun");
885 return FALSE;
886 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
887 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
888 return FALSE;
889 }
890
891 data->cur_id = newid;
892 data->cur_lun = newlun;
893 data->cur_target = &(data->target[newid]);
894 data->cur_lunt = &(data->lunt[newid][newlun]);
895
896 /* reset SACK/SavedACK counter (or ALL clear?) */
897 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
898
899 return TRUE;
900 }
901
902
903 /*
904 * nsp32_setup_sg_table - build scatter gather list for transfer data
905 * with bus master.
906 *
907 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
908 */
nsp32_setup_sg_table(Scsi_Cmnd * SCpnt)909 static int nsp32_setup_sg_table(Scsi_Cmnd *SCpnt)
910 {
911 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
912 struct scatterlist *sgl;
913 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
914 int num, i;
915 u32 l;
916
917 if (SCpnt->request_bufflen == 0) {
918 return TRUE;
919 }
920
921 if (sgt == NULL) {
922 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
923 return FALSE;
924 }
925
926 if (SCpnt->use_sg) {
927 sgl = (struct scatterlist *)SCpnt->request_buffer;
928 num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg,
929 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
930 for (i = 0; i < num; i++) {
931 /*
932 * Build nsp32_sglist, substitute sg dma addresses.
933 */
934 sgt[i].addr = cpu_to_le32(sg_dma_address(sgl));
935 sgt[i].len = cpu_to_le32(sg_dma_len(sgl));
936 sgl++;
937
938 if (le32_to_cpu(sgt[i].len) > 0x10000) {
939 nsp32_msg(KERN_ERR,
940 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
941 return FALSE;
942 }
943 nsp32_dbg(NSP32_DEBUG_SGLIST,
944 "num 0x%x : addr 0x%lx len 0x%lx",
945 i,
946 le32_to_cpu(sgt[i].addr),
947 le32_to_cpu(sgt[i].len ));
948 }
949
950 /* set end mark */
951 l = le32_to_cpu(sgt[num-1].len);
952 sgt[num-1].len = cpu_to_le32(l | SGTEND);
953
954 } else {
955 SCpnt->SCp.have_data_in = pci_map_single(data->Pci,
956 SCpnt->request_buffer, SCpnt->request_bufflen,
957 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
958
959 sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in);
960 sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */
961
962 if (SCpnt->request_bufflen > 0x10000) {
963 nsp32_msg(KERN_ERR,
964 "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen);
965 return FALSE;
966 }
967 nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx",
968 le32_to_cpu(sgt[0].addr),
969 le32_to_cpu(sgt[0].len ));
970 }
971
972 return TRUE;
973 }
974
nsp32_queuecommand(Scsi_Cmnd * SCpnt,void (* done)(Scsi_Cmnd *))975 static int nsp32_queuecommand(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
976 {
977 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
978 nsp32_target *target;
979 nsp32_lunt *cur_lunt;
980 int ret;
981
982 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
983 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
984 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
985 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
986 SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen);
987
988 if (data->CurrentSC != NULL) {
989 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
990 data->CurrentSC = NULL;
991 SCpnt->result = DID_NO_CONNECT << 16;
992 done(SCpnt);
993
994 return SCSI_MLQUEUE_HOST_BUSY;
995 }
996
997 /* check target ID is not same as this initiator ID */
998 if (SCpnt->device->id == SCpnt->device->host->this_id) {
999 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
1000 SCpnt->result = DID_BAD_TARGET << 16;
1001 done(SCpnt);
1002 return SCSI_MLQUEUE_DEVICE_BUSY;
1003 }
1004
1005 /* check target LUN is allowable value */
1006 if (SCpnt->device->lun >= MAX_LUN) {
1007 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
1008 SCpnt->result = DID_BAD_TARGET << 16;
1009 done(SCpnt);
1010 return SCSI_MLQUEUE_DEVICE_BUSY;
1011 }
1012
1013 show_command(SCpnt);
1014
1015 SCpnt->scsi_done = done;
1016 data->CurrentSC = SCpnt;
1017 SCpnt->SCp.Status = CHECK_CONDITION;
1018 SCpnt->SCp.Message = 0;
1019 SCpnt->resid = SCpnt->request_bufflen;
1020
1021 SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
1022 SCpnt->SCp.this_residual = SCpnt->request_bufflen;
1023 SCpnt->SCp.buffer = NULL;
1024 SCpnt->SCp.buffers_residual = 0;
1025
1026 /* initialize data */
1027 data->msgout_len = 0;
1028 data->msgin_len = 0;
1029 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
1030 cur_lunt->SCpnt = SCpnt;
1031 cur_lunt->save_datp = 0;
1032 cur_lunt->msgin03 = FALSE;
1033 data->cur_lunt = cur_lunt;
1034 data->cur_id = SCpnt->device->id;
1035 data->cur_lun = SCpnt->device->lun;
1036
1037 ret = nsp32_setup_sg_table(SCpnt);
1038 if (ret == FALSE) {
1039 nsp32_msg(KERN_ERR, "SGT fail");
1040 SCpnt->result = DID_ERROR << 16;
1041 nsp32_scsi_done(SCpnt);
1042 return SCSI_MLQUEUE_HOST_BUSY;
1043 }
1044
1045 /* Build IDENTIFY */
1046 nsp32_build_identify(SCpnt);
1047
1048 /*
1049 * If target is the first time to transfer after the reset
1050 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
1051 * message SDTR is needed to do synchronous transfer.
1052 */
1053 target = &data->target[SCpnt->device->id];
1054 data->cur_target = target;
1055
1056 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
1057 unsigned char period, offset;
1058
1059 if (trans_mode != ASYNC_MODE) {
1060 nsp32_set_max_sync(data, target, &period, &offset);
1061 nsp32_build_sdtr(SCpnt, period, offset);
1062 target->sync_flag |= SDTR_INITIATOR;
1063 } else {
1064 nsp32_set_async(data, target);
1065 target->sync_flag |= SDTR_DONE;
1066 }
1067
1068 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1069 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1070 target->limit_entry, period, offset);
1071 } else if (target->sync_flag & SDTR_INITIATOR) {
1072 /*
1073 * It was negotiating SDTR with target, sending from the
1074 * initiator, but there are no chance to remove this flag.
1075 * Set async because we don't get proper negotiation.
1076 */
1077 nsp32_set_async(data, target);
1078 target->sync_flag &= ~SDTR_INITIATOR;
1079 target->sync_flag |= SDTR_DONE;
1080
1081 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1082 "SDTR_INITIATOR: fall back to async");
1083 } else if (target->sync_flag & SDTR_TARGET) {
1084 /*
1085 * It was negotiating SDTR with target, sending from target,
1086 * but there are no chance to remove this flag. Set async
1087 * because we don't get proper negotiation.
1088 */
1089 nsp32_set_async(data, target);
1090 target->sync_flag &= ~SDTR_TARGET;
1091 target->sync_flag |= SDTR_DONE;
1092
1093 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1094 "Unknown SDTR from target is reached, fall back to async.");
1095 }
1096
1097 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1098 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1099 SCpnt->device->id, target->sync_flag, target->syncreg,
1100 target->ackwidth);
1101
1102 /* Selection */
1103 if (auto_param == 0) {
1104 ret = nsp32_selection_autopara(SCpnt);
1105 } else {
1106 ret = nsp32_selection_autoscsi(SCpnt);
1107 }
1108
1109 if (ret != TRUE) {
1110 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1111 nsp32_scsi_done(SCpnt);
1112 return SCSI_MLQUEUE_DEVICE_BUSY;
1113 }
1114
1115 return 0;
1116 }
1117
1118 /* initialize asic */
nsp32hw_init(nsp32_hw_data * data)1119 static int nsp32hw_init(nsp32_hw_data *data)
1120 {
1121 unsigned int base = data->BaseAddress;
1122 unsigned short irq_stat;
1123 unsigned long lc_reg;
1124 unsigned char power;
1125
1126 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1127 if ((lc_reg & 0xff00) == 0) {
1128 lc_reg |= (0x20 << 8);
1129 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1130 }
1131
1132 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1133 nsp32_write2(base, TRANSFER_CONTROL, 0);
1134 nsp32_write4(base, BM_CNT, 0);
1135 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1136
1137 do {
1138 irq_stat = nsp32_read2(base, IRQ_STATUS);
1139 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1140 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1141
1142 /*
1143 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
1144 * designated by specification.
1145 */
1146 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1147 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1148 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1149 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1150 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1151 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1152 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1153 } else {
1154 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1155 }
1156
1157 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1158 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1159 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1160
1161 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1162 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1163 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
1164
1165 /*
1166 * initialize MISC_WRRD register
1167 *
1168 * Note: Designated parameters is obeyed as following:
1169 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
1170 * MISC_MASTER_TERMINATION_SELECT: It must be set.
1171 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
1172 * MISC_AUTOSEL_TIMING_SEL: It should be set.
1173 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
1174 * MISC_DELAYED_BMSTART: It's selected for safety.
1175 *
1176 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
1177 * we have to set TRANSFERCONTROL_BM_START as 0 and set
1178 * appropriate value before restarting bus master transfer.
1179 */
1180 nsp32_index_write2(base, MISC_WR,
1181 (SCSI_DIRECTION_DETECTOR_SELECT |
1182 DELAYED_BMSTART |
1183 MASTER_TERMINATION_SELECT |
1184 BMREQ_NEGATE_TIMING_SEL |
1185 AUTOSEL_TIMING_SEL |
1186 BMSTOP_CHANGE2_NONDATA_PHASE));
1187
1188 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1189 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1190 if (!(power & SENSE)) {
1191 nsp32_msg(KERN_INFO, "term power on");
1192 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1193 }
1194
1195 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1196 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
1197
1198 nsp32_write1(base, SYNC_REG, 0);
1199 nsp32_write1(base, ACK_WIDTH, 0);
1200 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1201
1202 /*
1203 * enable to select designated IRQ (except for
1204 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
1205 */
1206 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1207 IRQSELECT_SCSIRESET_IRQ |
1208 IRQSELECT_FIFO_SHLD_IRQ |
1209 IRQSELECT_RESELECT_IRQ |
1210 IRQSELECT_PHASE_CHANGE_IRQ |
1211 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1212 // IRQSELECT_BMCNTERR_IRQ |
1213 IRQSELECT_TARGET_ABORT_IRQ |
1214 IRQSELECT_MASTER_ABORT_IRQ );
1215 nsp32_write2(base, IRQ_CONTROL, 0);
1216
1217 /* PCI LED off */
1218 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1219 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1220
1221 return TRUE;
1222 }
1223
1224
1225 /* interrupt routine */
do_nsp32_isr(int irq,void * dev_id,struct pt_regs * regs)1226 static irqreturn_t do_nsp32_isr(int irq, void *dev_id, struct pt_regs *regs)
1227 {
1228 nsp32_hw_data *data = dev_id;
1229 unsigned int base = data->BaseAddress;
1230 Scsi_Cmnd *SCpnt = data->CurrentSC;
1231 unsigned short auto_stat, irq_stat, trans_stat;
1232 unsigned char busmon, busphase;
1233 unsigned long flags;
1234 int ret;
1235 int handled = 0;
1236
1237 spin_lock_irqsave(HOST_LOCK, flags);
1238
1239 /*
1240 * IRQ check, then enable IRQ mask
1241 */
1242 irq_stat = nsp32_read2(base, IRQ_STATUS);
1243 nsp32_dbg(NSP32_DEBUG_INTR,
1244 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1245 /* is this interrupt comes from Ninja asic? */
1246 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1247 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1248 goto out2;
1249 }
1250 handled = 1;
1251 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1252
1253 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1254 busphase = busmon & BUSMON_PHASE_MASK;
1255
1256 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1257 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1258 nsp32_msg(KERN_INFO, "card disconnect");
1259 if (data->CurrentSC != NULL) {
1260 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1261 SCpnt->result = DID_BAD_TARGET << 16;
1262 nsp32_scsi_done(SCpnt);
1263 }
1264 goto out;
1265 }
1266
1267 /* Timer IRQ */
1268 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1269 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1270 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1271 goto out;
1272 }
1273
1274 /* SCSI reset */
1275 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1276 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1277 nsp32_do_bus_reset(data);
1278 if (SCpnt != NULL) {
1279 SCpnt->result = DID_RESET << 16;
1280 nsp32_scsi_done(SCpnt);
1281 }
1282 goto out;
1283 }
1284
1285 if (SCpnt == NULL) {
1286 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1287 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1288 goto out;
1289 }
1290
1291 /*
1292 * AutoSCSI Interrupt.
1293 * Note: This interrupt is occurred when AutoSCSI is finished. Then
1294 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
1295 * recorded when AutoSCSI sequencer has been processed.
1296 */
1297 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1298 /* getting SCSI executed phase */
1299 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1300 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1301
1302 /* Selection Timeout, go busfree phase. */
1303 if (auto_stat & SELECTION_TIMEOUT) {
1304 nsp32_dbg(NSP32_DEBUG_INTR,
1305 "selection timeout occurred");
1306
1307 SCpnt->result = DID_TIME_OUT << 16;
1308 nsp32_scsi_done(SCpnt);
1309 goto out;
1310 }
1311
1312 if (auto_stat & MSGOUT_PHASE) {
1313 /*
1314 * MsgOut phase was processed.
1315 * If MSG_IN_OCCUER is not set, then MsgOut phase is
1316 * completed. Thus, msgout_len must reset. Otherwise,
1317 * nothing to do here. If MSG_OUT_OCCUER is occurred,
1318 * then we will encounter the condition and check.
1319 */
1320 if (!(auto_stat & MSG_IN_OCCUER) &&
1321 (data->msgout_len <= 3)) {
1322 /*
1323 * !MSG_IN_OCCUER && msgout_len <=3
1324 * ---> AutoSCSI with MSGOUTreg is processed.
1325 */
1326 data->msgout_len = 0;
1327 };
1328
1329 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1330 }
1331
1332 if ((auto_stat & DATA_IN_PHASE) &&
1333 (SCpnt->resid > 0) &&
1334 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1335 printk( "auto+fifo\n");
1336 //nsp32_pio_read(SCpnt);
1337 }
1338
1339 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1340 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
1341 nsp32_dbg(NSP32_DEBUG_INTR,
1342 "Data in/out phase processed");
1343
1344 /* read BMCNT, SGT pointer addr */
1345 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1346 nsp32_read4(base, BM_CNT));
1347 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1348 nsp32_read4(base, SGT_ADR));
1349 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1350 nsp32_read4(base, SACK_CNT));
1351 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1352 nsp32_read4(base, SAVED_SACK_CNT));
1353
1354 SCpnt->resid = 0; /* all data transfered! */
1355 }
1356
1357 /*
1358 * MsgIn Occur
1359 */
1360 if (auto_stat & MSG_IN_OCCUER) {
1361 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1362 }
1363
1364 /*
1365 * MsgOut Occur
1366 */
1367 if (auto_stat & MSG_OUT_OCCUER) {
1368 nsp32_msgout_occur(SCpnt);
1369 }
1370
1371 /*
1372 * Bus Free Occur
1373 */
1374 if (auto_stat & BUS_FREE_OCCUER) {
1375 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1376 if (ret == TRUE) {
1377 goto out;
1378 }
1379 }
1380
1381 if (auto_stat & STATUS_PHASE) {
1382 /*
1383 * Read CSB and substitute CSB for SCpnt->result
1384 * to save status phase stutas byte.
1385 * scsi error handler checks host_byte (DID_*:
1386 * low level driver to indicate status), then checks
1387 * status_byte (SCSI status byte).
1388 */
1389 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1390 }
1391
1392 if (auto_stat & ILLEGAL_PHASE) {
1393 /* Illegal phase is detected. SACK is not back. */
1394 nsp32_msg(KERN_WARNING,
1395 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1396
1397 /* TODO: currently we don't have any action... bus reset? */
1398
1399 /*
1400 * To send back SACK, assert, wait, and negate.
1401 */
1402 nsp32_sack_assert(data);
1403 nsp32_wait_req(data, NEGATE);
1404 nsp32_sack_negate(data);
1405
1406 }
1407
1408 if (auto_stat & COMMAND_PHASE) {
1409 /* nothing to do */
1410 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1411 }
1412
1413 if (auto_stat & AUTOSCSI_BUSY) {
1414 /* AutoSCSI is running */
1415 }
1416
1417 show_autophase(auto_stat);
1418 }
1419
1420 /* FIFO_SHLD_IRQ */
1421 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1422 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1423
1424 switch(busphase) {
1425 case BUSPHASE_DATA_OUT:
1426 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1427
1428 //nsp32_pio_write(SCpnt);
1429
1430 break;
1431
1432 case BUSPHASE_DATA_IN:
1433 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1434
1435 //nsp32_pio_read(SCpnt);
1436
1437 break;
1438
1439 case BUSPHASE_STATUS:
1440 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1441
1442 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1443
1444 break;
1445 default:
1446 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1447 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1448 show_busphase(busphase);
1449 break;
1450 }
1451
1452 goto out;
1453 }
1454
1455 /* Phase Change IRQ */
1456 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1457 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1458
1459 switch(busphase) {
1460 case BUSPHASE_MESSAGE_IN:
1461 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1462 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1463 break;
1464 default:
1465 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1466 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1467 irq_stat, trans_stat);
1468 show_busphase(busphase);
1469 break;
1470 }
1471 goto out;
1472 }
1473
1474 /* PCI_IRQ */
1475 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1476 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1477 /* Do nothing */
1478 }
1479
1480 /* BMCNTERR_IRQ */
1481 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1482 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1483 /*
1484 * TODO: To be implemented improving bus master
1485 * transfer reliablity when BMCNTERR is occurred in
1486 * AutoSCSI phase described in specification.
1487 */
1488 }
1489
1490 #if 0
1491 nsp32_dbg(NSP32_DEBUG_INTR,
1492 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1493 show_busphase(busphase);
1494 #endif
1495
1496 out:
1497 /* disable IRQ mask */
1498 nsp32_write2(base, IRQ_CONTROL, 0);
1499
1500 out2:
1501 spin_unlock_irqrestore(HOST_LOCK, flags);
1502
1503 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1504
1505 return IRQ_RETVAL(handled);
1506 }
1507
1508 #undef SPRINTF
1509 #define SPRINTF(args...) \
1510 do { \
1511 if(length > (pos - buffer)) { \
1512 pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
1513 nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
1514 } \
1515 } while(0)
nsp32_proc_info(struct Scsi_Host * host,char * buffer,char ** start,off_t offset,int length,int hostno,int inout)1516 static int nsp32_proc_info(
1517 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1518 struct Scsi_Host *host,
1519 #endif
1520 char *buffer,
1521 char **start,
1522 off_t offset,
1523 int length,
1524 #if !(LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1525 int hostno,
1526 #endif
1527 int inout)
1528 {
1529 char *pos = buffer;
1530 int thislength;
1531 unsigned long flags;
1532 nsp32_hw_data *data;
1533 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1534 int hostno;
1535 #else
1536 struct Scsi_Host *host;
1537 #endif
1538 unsigned int base;
1539 unsigned char mode_reg;
1540 int id, speed;
1541 long model;
1542
1543 /* Write is not supported, just return. */
1544 if (inout == TRUE) {
1545 return -EINVAL;
1546 }
1547
1548 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
1549 hostno = host->host_no;
1550 #else
1551 /* search this HBA host */
1552 host = scsi_host_hn_get(hostno);
1553 if (host == NULL) {
1554 return -ESRCH;
1555 }
1556 #endif
1557 data = (nsp32_hw_data *)host->hostdata;
1558 base = host->io_port;
1559
1560 SPRINTF("NinjaSCSI-32 status\n\n");
1561 SPRINTF("Driver version: %s, $Revision: 1.34 $\n", nsp32_release_version);
1562 SPRINTF("SCSI host No.: %d\n", hostno);
1563 SPRINTF("IRQ: %d\n", host->irq);
1564 SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1565 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1566 SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
1567 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1568
1569 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1570 model = data->pci_devid->driver_data;
1571
1572 #ifdef CONFIG_PM
1573 SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1574 #endif
1575 SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1576
1577 spin_lock_irqsave(&(data->Lock), flags);
1578 SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
1579 spin_unlock_irqrestore(&(data->Lock), flags);
1580
1581
1582 SPRINTF("SDTR status\n");
1583 for(id = 0; id < NUMBER(data->target); id++) {
1584
1585 SPRINTF("id %d: ", id);
1586
1587 if (id == host->this_id) {
1588 SPRINTF("----- NinjaSCSI-32 host adapter\n");
1589 continue;
1590 }
1591
1592 if (data->target[id].sync_flag == SDTR_DONE) {
1593 if (data->target[id].period == 0 &&
1594 data->target[id].offset == ASYNC_OFFSET ) {
1595 SPRINTF("async");
1596 } else {
1597 SPRINTF(" sync");
1598 }
1599 } else {
1600 SPRINTF(" none");
1601 }
1602
1603 if (data->target[id].period != 0) {
1604
1605 speed = 1000000 / (data->target[id].period * 4);
1606
1607 SPRINTF(" transfer %d.%dMB/s, offset %d",
1608 speed / 1000,
1609 speed % 1000,
1610 data->target[id].offset
1611 );
1612 }
1613 SPRINTF("\n");
1614 }
1615
1616
1617 thislength = pos - (buffer + offset);
1618
1619 if(thislength < 0) {
1620 *start = 0;
1621 return 0;
1622 }
1623
1624
1625 thislength = MIN(thislength, length);
1626 *start = buffer + offset;
1627
1628 return thislength;
1629 }
1630 #undef SPRINTF
1631
1632
1633
1634 /*
1635 * Reset parameters and call scsi_done for data->cur_lunt.
1636 * Be careful setting SCpnt->result = DID_* before calling this function.
1637 */
nsp32_scsi_done(Scsi_Cmnd * SCpnt)1638 static void nsp32_scsi_done(Scsi_Cmnd *SCpnt)
1639 {
1640 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1641 unsigned int base = SCpnt->device->host->io_port;
1642
1643 /*
1644 * unmap pci
1645 */
1646 if (SCpnt->request_bufflen == 0) {
1647 goto skip;
1648 }
1649
1650 if (SCpnt->use_sg) {
1651 pci_unmap_sg(data->Pci,
1652 (struct scatterlist *)SCpnt->buffer,
1653 SCpnt->use_sg,
1654 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
1655 } else {
1656 pci_unmap_single(data->Pci,
1657 (u32)SCpnt->SCp.have_data_in,
1658 SCpnt->request_bufflen,
1659 scsi_to_pci_dma_dir(SCpnt->sc_data_direction));
1660 }
1661
1662 skip:
1663 /*
1664 * clear TRANSFERCONTROL_BM_START
1665 */
1666 nsp32_write2(base, TRANSFER_CONTROL, 0);
1667 nsp32_write4(base, BM_CNT, 0);
1668
1669 /*
1670 * call scsi_done
1671 */
1672 (*SCpnt->scsi_done)(SCpnt);
1673
1674 /*
1675 * reset parameters
1676 */
1677 data->cur_lunt->SCpnt = NULL;
1678 data->cur_lunt = NULL;
1679 data->cur_target = NULL;
1680 data->CurrentSC = NULL;
1681 }
1682
1683
1684 /*
1685 * Bus Free Occur
1686 *
1687 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
1688 * with ACK reply when below condition is matched:
1689 * MsgIn 00: Command Complete.
1690 * MsgIn 02: Save Data Pointer.
1691 * MsgIn 04: Diconnect.
1692 * In other case, unexpected BUSFREE is detected.
1693 */
nsp32_busfree_occur(Scsi_Cmnd * SCpnt,unsigned short execph)1694 static int nsp32_busfree_occur(Scsi_Cmnd *SCpnt, unsigned short execph)
1695 {
1696 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1697 unsigned int base = SCpnt->device->host->io_port;
1698
1699 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1700 show_autophase(execph);
1701
1702 nsp32_write4(base, BM_CNT, 0);
1703 nsp32_write2(base, TRANSFER_CONTROL, 0);
1704
1705 /*
1706 * MsgIn 02: Save Data Pointer
1707 *
1708 * VALID:
1709 * Save Data Pointer is received. Adjust pointer.
1710 *
1711 * NO-VALID:
1712 * SCSI-3 says if Save Data Pointer is not received, then we restart
1713 * processing and we can't adjust any SCSI data pointer in next data
1714 * phase.
1715 */
1716 if (execph & MSGIN_02_VALID) {
1717 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1718
1719 /*
1720 * Check sack_cnt/saved_sack_cnt, then adjust sg table if
1721 * needed.
1722 */
1723 if (!(execph & MSGIN_00_VALID) &&
1724 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1725 unsigned int sacklen, s_sacklen;
1726
1727 /*
1728 * Read SACK count and SAVEDSACK count, then compare.
1729 */
1730 sacklen = nsp32_read4(base, SACK_CNT );
1731 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1732
1733 /*
1734 * If SAVEDSACKCNT == 0, it means SavedDataPointer is
1735 * come after data transfering.
1736 */
1737 if (s_sacklen > 0) {
1738 /*
1739 * Comparing between sack and savedsack to
1740 * check the condition of AutoMsgIn03.
1741 *
1742 * If they are same, set msgin03 == TRUE,
1743 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
1744 * reselection. On the other hand, if they
1745 * aren't same, set msgin03 == FALSE, and
1746 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
1747 * reselection.
1748 */
1749 if (sacklen != s_sacklen) {
1750 data->cur_lunt->msgin03 = FALSE;
1751 } else {
1752 data->cur_lunt->msgin03 = TRUE;
1753 }
1754
1755 nsp32_adjust_busfree(SCpnt, s_sacklen);
1756 }
1757 }
1758
1759 /* This value has not substitude with valid value yet... */
1760 //data->cur_lunt->save_datp = data->cur_datp;
1761 } else {
1762 /*
1763 * no processing.
1764 */
1765 }
1766
1767 if (execph & MSGIN_03_VALID) {
1768 /* MsgIn03 was valid to be processed. No need processing. */
1769 }
1770
1771 /*
1772 * target SDTR check
1773 */
1774 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1775 /*
1776 * SDTR negotiation pulled by the initiator has not
1777 * finished yet. Fall back to ASYNC mode.
1778 */
1779 nsp32_set_async(data, data->cur_target);
1780 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1781 data->cur_target->sync_flag |= SDTR_DONE;
1782 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1783 /*
1784 * SDTR negotiation pulled by the target has been
1785 * negotiating.
1786 */
1787 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1788 /*
1789 * If valid message is received, then
1790 * negotiation is succeeded.
1791 */
1792 } else {
1793 /*
1794 * On the contrary, if unexpected bus free is
1795 * occurred, then negotiation is failed. Fall
1796 * back to ASYNC mode.
1797 */
1798 nsp32_set_async(data, data->cur_target);
1799 }
1800 data->cur_target->sync_flag &= ~SDTR_TARGET;
1801 data->cur_target->sync_flag |= SDTR_DONE;
1802 }
1803
1804 /*
1805 * It is always ensured by SCSI standard that initiator
1806 * switches into Bus Free Phase after
1807 * receiving message 00 (Command Complete), 04 (Disconnect).
1808 * It's the reason that processing here is valid.
1809 */
1810 if (execph & MSGIN_00_VALID) {
1811 /* MsgIn 00: Command Complete */
1812 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1813
1814 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1815 SCpnt->SCp.Message = 0;
1816 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1817 "normal end stat=0x%x resid=0x%x\n",
1818 SCpnt->SCp.Status, SCpnt->resid);
1819 SCpnt->result = (DID_OK << 16) |
1820 (SCpnt->SCp.Message << 8) |
1821 (SCpnt->SCp.Status << 0);
1822 nsp32_scsi_done(SCpnt);
1823 /* All operation is done */
1824 return TRUE;
1825 } else if (execph & MSGIN_04_VALID) {
1826 /* MsgIn 04: Disconnect */
1827 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1828 SCpnt->SCp.Message = 4;
1829
1830 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1831 return TRUE;
1832 } else {
1833 /* Unexpected bus free */
1834 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1835
1836 /* DID_ERROR? */
1837 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
1838 SCpnt->result = DID_ERROR << 16;
1839 nsp32_scsi_done(SCpnt);
1840 return TRUE;
1841 }
1842 return FALSE;
1843 }
1844
1845
1846 /*
1847 * nsp32_adjust_busfree - adjusting SG table
1848 *
1849 * Note: This driver adjust the SG table using SCSI ACK
1850 * counter instead of BMCNT counter!
1851 */
nsp32_adjust_busfree(Scsi_Cmnd * SCpnt,unsigned int s_sacklen)1852 static void nsp32_adjust_busfree(Scsi_Cmnd *SCpnt, unsigned int s_sacklen)
1853 {
1854 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1855 int old_entry = data->cur_entry;
1856 int new_entry;
1857 int sg_num = data->cur_lunt->sg_num;
1858 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1859 unsigned int restlen, sentlen;
1860 u32 len, addr;
1861
1862 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid);
1863
1864 /* adjust saved SACK count with 4 byte start address boundary */
1865 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1866
1867 /*
1868 * calculate new_entry from sack count and each sgt[].len
1869 * calculate the byte which is intent to send
1870 */
1871 sentlen = 0;
1872 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1873 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1874 if (sentlen > s_sacklen) {
1875 break;
1876 }
1877 }
1878
1879 /* all sgt is processed */
1880 if (new_entry == sg_num) {
1881 goto last;
1882 }
1883
1884 if (sentlen == s_sacklen) {
1885 /* XXX: confirm it's ok or not */
1886 /* In this case, it's ok because we are at
1887 the head element of the sg. restlen is correctly calculated. */
1888 }
1889
1890 /* calculate the rest length for transfering */
1891 restlen = sentlen - s_sacklen;
1892
1893 /* update adjusting current SG table entry */
1894 len = le32_to_cpu(sgt[new_entry].len);
1895 addr = le32_to_cpu(sgt[new_entry].addr);
1896 addr += (len - restlen);
1897 sgt[new_entry].addr = cpu_to_le32(addr);
1898 sgt[new_entry].len = cpu_to_le32(restlen);
1899
1900 /* set cur_entry with new_entry */
1901 data->cur_entry = new_entry;
1902
1903 return;
1904
1905 last:
1906 if (SCpnt->resid < sentlen) {
1907 nsp32_msg(KERN_ERR, "resid underflow");
1908 }
1909
1910 SCpnt->resid -= sentlen;
1911 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid);
1912
1913 /* update hostdata and lun */
1914
1915 return;
1916 }
1917
1918
1919 /*
1920 * It's called MsgOut phase occur.
1921 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
1922 * message out phase. It, however, has more than 3 messages,
1923 * HBA creates the interrupt and we have to process by hand.
1924 */
nsp32_msgout_occur(Scsi_Cmnd * SCpnt)1925 static void nsp32_msgout_occur(Scsi_Cmnd *SCpnt)
1926 {
1927 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1928 unsigned int base = SCpnt->device->host->io_port;
1929 //unsigned short command;
1930 long new_sgtp;
1931 int i;
1932
1933 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1934 "enter: msgout_len: 0x%x", data->msgout_len);
1935
1936 /*
1937 * If MsgOut phase is occurred without having any
1938 * message, then No_Operation is sent (SCSI-2).
1939 */
1940 if (data->msgout_len == 0) {
1941 nsp32_build_nop(SCpnt);
1942 }
1943
1944 /*
1945 * Set SGTP ADDR current entry for restarting AUTOSCSI,
1946 * because SGTP is incremented next point.
1947 * There is few statement in the specification...
1948 */
1949 new_sgtp = data->cur_lunt->sglun_paddr +
1950 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1951
1952 /*
1953 * send messages
1954 */
1955 for (i = 0; i < data->msgout_len; i++) {
1956 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1957 "%d : 0x%x", i, data->msgoutbuf[i]);
1958
1959 /*
1960 * Check REQ is asserted.
1961 */
1962 nsp32_wait_req(data, ASSERT);
1963
1964 if (i == (data->msgout_len - 1)) {
1965 /*
1966 * If the last message, set the AutoSCSI restart
1967 * before send back the ack message. AutoSCSI
1968 * restart automatically negate ATN signal.
1969 */
1970 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
1971 //nsp32_restart_autoscsi(SCpnt, command);
1972 nsp32_write2(base, COMMAND_CONTROL,
1973 (CLEAR_CDB_FIFO_POINTER |
1974 AUTO_COMMAND_PHASE |
1975 AUTOSCSI_RESTART |
1976 AUTO_MSGIN_00_OR_04 |
1977 AUTO_MSGIN_02 ));
1978 }
1979 /*
1980 * Write data with SACK, then wait sack is
1981 * automatically negated.
1982 */
1983 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1984 nsp32_wait_sack(data, NEGATE);
1985
1986 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1987 nsp32_read1(base, SCSI_BUS_MONITOR));
1988 };
1989
1990 data->msgout_len = 0;
1991
1992 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1993 }
1994
1995 /*
1996 * Restart AutoSCSI
1997 *
1998 * Note: Restarting AutoSCSI needs set:
1999 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
2000 */
nsp32_restart_autoscsi(Scsi_Cmnd * SCpnt,unsigned short command)2001 static void nsp32_restart_autoscsi(Scsi_Cmnd *SCpnt, unsigned short command)
2002 {
2003 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2004 unsigned int base = data->BaseAddress;
2005 unsigned short transfer = 0;
2006
2007 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
2008
2009 if (data->cur_target == NULL || data->cur_lunt == NULL) {
2010 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
2011 }
2012
2013 /*
2014 * set SYNC_REG
2015 * Don't set BM_START_ADR before setting this register.
2016 */
2017 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
2018
2019 /*
2020 * set ACKWIDTH
2021 */
2022 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
2023
2024 /*
2025 * set SREQ hazard killer sampling rate
2026 */
2027 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
2028
2029 /*
2030 * set SGT ADDR (physical address)
2031 */
2032 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
2033
2034 /*
2035 * set TRANSFER CONTROL REG
2036 */
2037 transfer = 0;
2038 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
2039 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
2040 if (SCpnt->request_bufflen > 0) {
2041 transfer |= BM_START;
2042 }
2043 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
2044 transfer |= CB_MMIO_MODE;
2045 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
2046 transfer |= CB_IO_MODE;
2047 }
2048 nsp32_write2(base, TRANSFER_CONTROL, transfer);
2049
2050 /*
2051 * restart AutoSCSI
2052 *
2053 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
2054 */
2055 command |= (CLEAR_CDB_FIFO_POINTER |
2056 AUTO_COMMAND_PHASE |
2057 AUTOSCSI_RESTART );
2058 nsp32_write2(base, COMMAND_CONTROL, command);
2059
2060 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
2061 }
2062
2063
2064 /*
2065 * cannot run automatically message in occur
2066 */
nsp32_msgin_occur(Scsi_Cmnd * SCpnt,unsigned long irq_status,unsigned short execph)2067 static void nsp32_msgin_occur(Scsi_Cmnd *SCpnt,
2068 unsigned long irq_status,
2069 unsigned short execph)
2070 {
2071 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2072 unsigned int base = SCpnt->device->host->io_port;
2073 unsigned char msg;
2074 unsigned char msgtype;
2075 unsigned char newlun;
2076 unsigned short command = 0;
2077 int msgclear = TRUE;
2078 long new_sgtp;
2079 int ret;
2080
2081 /*
2082 * read first message
2083 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
2084 * of Message-In have to be processed before sending back SCSI ACK.
2085 */
2086 msg = nsp32_read1(base, SCSI_DATA_IN);
2087 data->msginbuf[(unsigned char)data->msgin_len] = msg;
2088 msgtype = data->msginbuf[0];
2089 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
2090 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
2091 data->msgin_len, msg, msgtype);
2092
2093 /*
2094 * TODO: We need checking whether bus phase is message in?
2095 */
2096
2097 /*
2098 * assert SCSI ACK
2099 */
2100 nsp32_sack_assert(data);
2101
2102 /*
2103 * processing IDENTIFY
2104 */
2105 if (msgtype & 0x80) {
2106 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
2107 /* Invalid (non reselect) phase */
2108 goto reject;
2109 }
2110
2111 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
2112 ret = nsp32_reselection(SCpnt, newlun);
2113 if (ret == TRUE) {
2114 goto restart;
2115 } else {
2116 goto reject;
2117 }
2118 }
2119
2120 /*
2121 * processing messages except for IDENTIFY
2122 *
2123 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
2124 */
2125 switch (msgtype) {
2126 /*
2127 * 1-byte message
2128 */
2129 case COMMAND_COMPLETE:
2130 case DISCONNECT:
2131 /*
2132 * These messages should not be occurred.
2133 * They should be processed on AutoSCSI sequencer.
2134 */
2135 nsp32_msg(KERN_WARNING,
2136 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
2137 break;
2138
2139 case RESTORE_POINTERS:
2140 /*
2141 * AutoMsgIn03 is disabled, and HBA gets this message.
2142 */
2143
2144 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2145 unsigned int s_sacklen;
2146
2147 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2148 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2149 nsp32_adjust_busfree(SCpnt, s_sacklen);
2150 } else {
2151 /* No need to rewrite SGT */
2152 }
2153 }
2154 data->cur_lunt->msgin03 = FALSE;
2155
2156 /* Update with the new value */
2157
2158 /* reset SACK/SavedACK counter (or ALL clear?) */
2159 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2160
2161 /*
2162 * set new sg pointer
2163 */
2164 new_sgtp = data->cur_lunt->sglun_paddr +
2165 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2166 nsp32_write4(base, SGT_ADR, new_sgtp);
2167
2168 break;
2169
2170 case SAVE_POINTERS:
2171 /*
2172 * These messages should not be occurred.
2173 * They should be processed on AutoSCSI sequencer.
2174 */
2175 nsp32_msg (KERN_WARNING,
2176 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2177
2178 break;
2179
2180 case MESSAGE_REJECT:
2181 /* If previous message_out is sending SDTR, and get
2182 message_reject from target, SDTR negotiation is failed */
2183 if (data->cur_target->sync_flag &
2184 (SDTR_INITIATOR | SDTR_TARGET)) {
2185 /*
2186 * Current target is negotiating SDTR, but it's
2187 * failed. Fall back to async transfer mode, and set
2188 * SDTR_DONE.
2189 */
2190 nsp32_set_async(data, data->cur_target);
2191 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2192 data->cur_target->sync_flag |= SDTR_DONE;
2193
2194 }
2195 break;
2196
2197 case LINKED_CMD_COMPLETE:
2198 case LINKED_FLG_CMD_COMPLETE:
2199 /* queue tag is not supported currently */
2200 nsp32_msg (KERN_WARNING,
2201 "unsupported message: 0x%x", msgtype);
2202 break;
2203
2204 case INITIATE_RECOVERY:
2205 /* staring ECA (Extended Contingent Allegiance) state. */
2206 /* This message is declined in SPI2 or later. */
2207
2208 goto reject;
2209
2210 /*
2211 * 2-byte message
2212 */
2213 case SIMPLE_QUEUE_TAG:
2214 case 0x23:
2215 /*
2216 * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
2217 * No support is needed.
2218 */
2219 if (data->msgin_len >= 1) {
2220 goto reject;
2221 }
2222
2223 /* current position is 1-byte of 2 byte */
2224 msgclear = FALSE;
2225
2226 break;
2227
2228 /*
2229 * extended message
2230 */
2231 case EXTENDED_MESSAGE:
2232 if (data->msgin_len < 1) {
2233 /*
2234 * Current position does not reach 2-byte
2235 * (2-byte is extended message length).
2236 */
2237 msgclear = FALSE;
2238 break;
2239 }
2240
2241 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2242 /*
2243 * Current extended message has msginbuf[1] + 2
2244 * (msgin_len starts counting from 0, so buf[1] + 1).
2245 * If current message position is not finished,
2246 * continue receiving message.
2247 */
2248 msgclear = FALSE;
2249 break;
2250 }
2251
2252 /*
2253 * Reach here means regular length of each type of
2254 * extended messages.
2255 */
2256 switch (data->msginbuf[2]) {
2257 case EXTENDED_MODIFY_DATA_POINTER:
2258 /* TODO */
2259 goto reject; /* not implemented yet */
2260 break;
2261
2262 case EXTENDED_SDTR:
2263 /*
2264 * Exchange this message between initiator and target.
2265 */
2266 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2267 /*
2268 * received inappropriate message.
2269 */
2270 goto reject;
2271 break;
2272 }
2273
2274 nsp32_analyze_sdtr(SCpnt);
2275
2276 break;
2277
2278 case EXTENDED_EXTENDED_IDENTIFY:
2279 /* SCSI-I only, not supported. */
2280 goto reject; /* not implemented yet */
2281
2282 break;
2283
2284 case EXTENDED_WDTR:
2285 goto reject; /* not implemented yet */
2286
2287 break;
2288
2289 default:
2290 goto reject;
2291 }
2292 break;
2293
2294 default:
2295 goto reject;
2296 }
2297
2298 restart:
2299 if (msgclear == TRUE) {
2300 data->msgin_len = 0;
2301
2302 /*
2303 * If restarting AutoSCSI, but there are some message to out
2304 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
2305 * (MSGOUT_VALID = 0). When commandcontrol is written with
2306 * AutoSCSI restart, at the same time MsgOutOccur should be
2307 * happened (however, such situation is really possible...?).
2308 */
2309 if (data->msgout_len > 0) {
2310 nsp32_write4(base, SCSI_MSG_OUT, 0);
2311 command |= AUTO_ATN;
2312 }
2313
2314 /*
2315 * restart AutoSCSI
2316 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
2317 */
2318 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2319
2320 /*
2321 * If current msgin03 is TRUE, then flag on.
2322 */
2323 if (data->cur_lunt->msgin03 == TRUE) {
2324 command |= AUTO_MSGIN_03;
2325 }
2326 data->cur_lunt->msgin03 = FALSE;
2327 } else {
2328 data->msgin_len++;
2329 }
2330
2331 /*
2332 * restart AutoSCSI
2333 */
2334 nsp32_restart_autoscsi(SCpnt, command);
2335
2336 /*
2337 * wait SCSI REQ negate for REQ-ACK handshake
2338 */
2339 nsp32_wait_req(data, NEGATE);
2340
2341 /*
2342 * negate SCSI ACK
2343 */
2344 nsp32_sack_negate(data);
2345
2346 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2347
2348 return;
2349
2350 reject:
2351 nsp32_msg(KERN_WARNING,
2352 "invalid or unsupported MessageIn, rejected. "
2353 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2354 msg, data->msgin_len, msgtype);
2355 nsp32_build_reject(SCpnt);
2356 data->msgin_len = 0;
2357
2358 goto restart;
2359 }
2360
2361 /*
2362 *
2363 */
nsp32_analyze_sdtr(Scsi_Cmnd * SCpnt)2364 static void nsp32_analyze_sdtr(Scsi_Cmnd *SCpnt)
2365 {
2366 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2367 nsp32_target *target = data->cur_target;
2368 nsp32_sync_table *synct;
2369 unsigned char get_period = data->msginbuf[3];
2370 unsigned char get_offset = data->msginbuf[4];
2371 int entry;
2372 int syncnum;
2373
2374 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2375
2376 synct = data->synct;
2377 syncnum = data->syncnum;
2378
2379 /*
2380 * If this inititor sent the SDTR message, then target responds SDTR,
2381 * initiator SYNCREG, ACKWIDTH from SDTR parameter.
2382 * Messages are not appropriate, then send back reject message.
2383 * If initiator did not send the SDTR, but target sends SDTR,
2384 * initiator calculator the appropriate parameter and send back SDTR.
2385 */
2386 if (target->sync_flag & SDTR_INITIATOR) {
2387 /*
2388 * Initiator sent SDTR, the target responds and
2389 * send back negotiation SDTR.
2390 */
2391 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2392
2393 target->sync_flag &= ~SDTR_INITIATOR;
2394 target->sync_flag |= SDTR_DONE;
2395
2396 /*
2397 * offset:
2398 */
2399 if (get_offset > MAX_OFFSET) {
2400 /*
2401 * Negotiation is failed, the target send back
2402 * unexpected offset value.
2403 */
2404 goto reject;
2405 }
2406
2407 if (get_offset == ASYNC_OFFSET) {
2408 /*
2409 * Negotiation is succeeded, the target want
2410 * to fall back into asynchronous transfer mode.
2411 */
2412 goto async;
2413 }
2414
2415 /*
2416 * period:
2417 * Check whether sync period is too short. If too short,
2418 * fall back to async mode. If it's ok, then investigate
2419 * the received sync period. If sync period is acceptable
2420 * between sync table start_period and end_period, then
2421 * set this I_T nexus as sent offset and period.
2422 * If it's not acceptable, send back reject and fall back
2423 * to async mode.
2424 */
2425 if (get_period < data->synct[0].period_num) {
2426 /*
2427 * Negotiation is failed, the target send back
2428 * unexpected period value.
2429 */
2430 goto reject;
2431 }
2432
2433 entry = nsp32_search_period_entry(data, target, get_period);
2434
2435 if (entry < 0) {
2436 /*
2437 * Target want to use long period which is not
2438 * acceptable NinjaSCSI-32Bi/UDE.
2439 */
2440 goto reject;
2441 }
2442
2443 /*
2444 * Set new sync table and offset in this I_T nexus.
2445 */
2446 nsp32_set_sync_entry(data, target, entry, get_offset);
2447 } else {
2448 /* Target send SDTR to initiator. */
2449 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2450
2451 target->sync_flag |= SDTR_INITIATOR;
2452
2453 /* offset: */
2454 if (get_offset > MAX_OFFSET) {
2455 /* send back as MAX_OFFSET */
2456 get_offset = MAX_OFFSET;
2457 }
2458
2459 /* period: */
2460 if (get_period < data->synct[0].period_num) {
2461 get_period = data->synct[0].period_num;
2462 }
2463
2464 entry = nsp32_search_period_entry(data, target, get_period);
2465
2466 if (get_offset == ASYNC_OFFSET || entry < 0) {
2467 nsp32_set_async(data, target);
2468 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2469 } else {
2470 nsp32_set_sync_entry(data, target, entry, get_offset);
2471 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2472 }
2473 }
2474
2475 target->period = get_period;
2476 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2477 return;
2478
2479 reject:
2480 /*
2481 * If the current message is unacceptable, send back to the target
2482 * with reject message.
2483 */
2484 nsp32_build_reject(SCpnt);
2485
2486 async:
2487 nsp32_set_async(data, target); /* set as ASYNC transfer mode */
2488
2489 target->period = 0;
2490 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2491 return;
2492 }
2493
2494
2495 /*
2496 * Search config entry number matched in sync_table from given
2497 * target and speed period value. If failed to search, return negative value.
2498 */
nsp32_search_period_entry(nsp32_hw_data * data,nsp32_target * target,unsigned char period)2499 static int nsp32_search_period_entry(nsp32_hw_data *data,
2500 nsp32_target *target,
2501 unsigned char period)
2502 {
2503 int i;
2504
2505 if (target->limit_entry >= data->syncnum) {
2506 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2507 target->limit_entry = 0;
2508 }
2509
2510 for (i = target->limit_entry; i < data->syncnum; i++) {
2511 if (period >= data->synct[i].start_period &&
2512 period <= data->synct[i].end_period) {
2513 break;
2514 }
2515 }
2516
2517 /*
2518 * Check given period value is over the sync_table value.
2519 * If so, return max value.
2520 */
2521 if (i == data->syncnum) {
2522 i = -1;
2523 }
2524
2525 return i;
2526 }
2527
2528
2529 /*
2530 * target <-> initiator use ASYNC transfer
2531 */
nsp32_set_async(nsp32_hw_data * data,nsp32_target * target)2532 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2533 {
2534 unsigned char period = data->synct[target->limit_entry].period_num;
2535
2536 target->offset = ASYNC_OFFSET;
2537 target->period = 0;
2538 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2539 target->ackwidth = 0;
2540 target->sample_reg = 0;
2541
2542 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2543 }
2544
2545
2546 /*
2547 * target <-> initiator use maximum SYNC transfer
2548 */
nsp32_set_max_sync(nsp32_hw_data * data,nsp32_target * target,unsigned char * period,unsigned char * offset)2549 static void nsp32_set_max_sync(nsp32_hw_data *data,
2550 nsp32_target *target,
2551 unsigned char *period,
2552 unsigned char *offset)
2553 {
2554 unsigned char period_num, ackwidth;
2555
2556 period_num = data->synct[target->limit_entry].period_num;
2557 *period = data->synct[target->limit_entry].start_period;
2558 ackwidth = data->synct[target->limit_entry].ackwidth;
2559 *offset = MAX_OFFSET;
2560
2561 target->syncreg = TO_SYNCREG(period_num, *offset);
2562 target->ackwidth = ackwidth;
2563 target->offset = *offset;
2564 target->sample_reg = 0; /* disable SREQ sampling */
2565 }
2566
2567
2568 /*
2569 * target <-> initiator use entry number speed
2570 */
nsp32_set_sync_entry(nsp32_hw_data * data,nsp32_target * target,int entry,unsigned char offset)2571 static void nsp32_set_sync_entry(nsp32_hw_data *data,
2572 nsp32_target *target,
2573 int entry,
2574 unsigned char offset)
2575 {
2576 unsigned char period, ackwidth, sample_rate;
2577
2578 period = data->synct[entry].period_num;
2579 ackwidth = data->synct[entry].ackwidth;
2580 offset = offset;
2581 sample_rate = data->synct[entry].sample_rate;
2582
2583 target->syncreg = TO_SYNCREG(period, offset);
2584 target->ackwidth = ackwidth;
2585 target->offset = offset;
2586 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2587
2588 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2589 }
2590
2591
2592 /*
2593 * It waits until SCSI REQ becomes assertion or negation state.
2594 *
2595 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
2596 * connected target responds SCSI REQ negation. We have to wait
2597 * SCSI REQ becomes negation in order to negate SCSI ACK signal for
2598 * REQ-ACK handshake.
2599 */
nsp32_wait_req(nsp32_hw_data * data,int state)2600 static void nsp32_wait_req(nsp32_hw_data *data, int state)
2601 {
2602 unsigned int base = data->BaseAddress;
2603 int wait_time = 0;
2604 unsigned char bus, req_bit;
2605
2606 if (!((state == ASSERT) || (state == NEGATE))) {
2607 nsp32_msg(KERN_ERR, "unknown state designation");
2608 }
2609 /* REQ is BIT(5) */
2610 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2611
2612 do {
2613 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2614 if ((bus & BUSMON_REQ) == req_bit) {
2615 nsp32_dbg(NSP32_DEBUG_WAIT,
2616 "wait_time: %d", wait_time);
2617 return;
2618 }
2619 udelay(1);
2620 wait_time++;
2621 } while (wait_time < REQSACK_TIMEOUT_TIME);
2622
2623 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2624 }
2625
2626 /*
2627 * It waits until SCSI SACK becomes assertion or negation state.
2628 */
nsp32_wait_sack(nsp32_hw_data * data,int state)2629 static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2630 {
2631 unsigned int base = data->BaseAddress;
2632 int wait_time = 0;
2633 unsigned char bus, ack_bit;
2634
2635 if (!((state == ASSERT) || (state == NEGATE))) {
2636 nsp32_msg(KERN_ERR, "unknown state designation");
2637 }
2638 /* ACK is BIT(4) */
2639 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2640
2641 do {
2642 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2643 if ((bus & BUSMON_ACK) == ack_bit) {
2644 nsp32_dbg(NSP32_DEBUG_WAIT,
2645 "wait_time: %d", wait_time);
2646 return;
2647 }
2648 udelay(1);
2649 wait_time++;
2650 } while (wait_time < REQSACK_TIMEOUT_TIME);
2651
2652 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2653 }
2654
2655 /*
2656 * assert SCSI ACK
2657 *
2658 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
2659 */
nsp32_sack_assert(nsp32_hw_data * data)2660 static void nsp32_sack_assert(nsp32_hw_data *data)
2661 {
2662 unsigned int base = data->BaseAddress;
2663 unsigned char busctrl;
2664
2665 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2666 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2667 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2668 }
2669
2670 /*
2671 * negate SCSI ACK
2672 */
nsp32_sack_negate(nsp32_hw_data * data)2673 static void nsp32_sack_negate(nsp32_hw_data *data)
2674 {
2675 unsigned int base = data->BaseAddress;
2676 unsigned char busctrl;
2677
2678 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2679 busctrl &= ~BUSCTL_ACK;
2680 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2681 }
2682
2683
2684
2685 /*
2686 * Note: n_io_port is defined as 0x7f because I/O register port is
2687 * assigned as:
2688 * 0x800-0x8ff: memory mapped I/O port
2689 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
2690 * 0xc00-0xfff: CardBus status registers
2691 */
2692 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2693 #define DETECT_OK 0
2694 #define DETECT_NG 1
2695 #define PCIDEV pdev
nsp32_detect(struct pci_dev * pdev)2696 static int nsp32_detect(struct pci_dev *pdev)
2697 #else
2698 #define DETECT_OK 1
2699 #define DETECT_NG 0
2700 #define PCIDEV (data->Pci)
2701 static int nsp32_detect(Scsi_Host_Template *sht)
2702 #endif
2703 {
2704 struct Scsi_Host *host; /* registered host structure */
2705 struct resource *res;
2706 nsp32_hw_data *data;
2707 int ret;
2708 int n_target, n_lun, i;
2709
2710 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2711
2712 /*
2713 * register this HBA as SCSI device
2714 */
2715 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2716 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2717 #else
2718 host = scsi_register(sht, sizeof(nsp32_hw_data));
2719 #endif
2720 if (host == NULL) {
2721 nsp32_msg (KERN_ERR, "failed to scsi register");
2722 goto err;
2723 }
2724
2725 /*
2726 * set nsp32_hw_data
2727 */
2728 data = (nsp32_hw_data *)host->hostdata;
2729
2730 *data = nsp32_data_base;
2731
2732 host->irq = data->IrqNumber;
2733 host->io_port = data->BaseAddress;
2734 host->unique_id = data->BaseAddress;
2735 host->n_io_port = data->NumAddress;
2736 host->base = data->MmioAddress;
2737 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,63))
2738 scsi_set_device(host, &PCIDEV->dev);
2739 #else
2740 scsi_set_pci_device(host, PCIDEV);
2741 #endif
2742
2743 data->Host = host;
2744 spin_lock_init(&(data->Lock));
2745
2746 data->cur_lunt = NULL;
2747 data->cur_target = NULL;
2748
2749 /*
2750 * Bus master transfer mode is supported currently.
2751 */
2752 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2753
2754 /*
2755 * Set clock div, CLOCK_4 (HBA has own external clock, and
2756 * dividing * 100ns/4).
2757 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
2758 */
2759 data->clock = CLOCK_4;
2760
2761 /*
2762 * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
2763 */
2764 switch (data->clock) {
2765 case CLOCK_4:
2766 /* If data->clock is CLOCK_4, then select 40M sync table. */
2767 data->synct = nsp32_sync_table_40M;
2768 data->syncnum = NUMBER(nsp32_sync_table_40M);
2769 break;
2770 case CLOCK_2:
2771 /* If data->clock is CLOCK_2, then select 20M sync table. */
2772 data->synct = nsp32_sync_table_20M;
2773 data->syncnum = NUMBER(nsp32_sync_table_20M);
2774 break;
2775 case PCICLK:
2776 /* If data->clock is PCICLK, then select pci sync table. */
2777 data->synct = nsp32_sync_table_pci;
2778 data->syncnum = NUMBER(nsp32_sync_table_pci);
2779 break;
2780 default:
2781 nsp32_msg(KERN_WARNING,
2782 "Invalid clock div is selected, set CLOCK_4.");
2783 /* Use default value CLOCK_4 */
2784 data->clock = CLOCK_4;
2785 data->synct = nsp32_sync_table_40M;
2786 data->syncnum = NUMBER(nsp32_sync_table_40M);
2787 }
2788
2789 /*
2790 * setup nsp32_lunt
2791 */
2792
2793 /*
2794 * setup DMA
2795 */
2796 if (pci_set_dma_mask(PCIDEV, 0xffffffffUL) != 0) {
2797 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2798 goto scsi_unregister;
2799 }
2800
2801 /*
2802 * allocate autoparam DMA resource.
2803 */
2804 data->autoparam = pci_alloc_consistent(PCIDEV, sizeof(nsp32_autoparam), &(data->auto_paddr));
2805 if (data->autoparam == NULL) {
2806 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2807 goto scsi_unregister;
2808 }
2809
2810 /*
2811 * allocate scatter-gather DMA resource.
2812 */
2813 data->sg_list = pci_alloc_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2814 &(data->sg_paddr));
2815 if (data->sg_list == NULL) {
2816 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2817 goto free_autoparam;
2818 }
2819
2820 for (n_target = 0; n_target < NUMBER(data->lunt); n_target++) {
2821 for (n_lun = 0; n_lun < NUMBER(data->lunt[0]); n_lun++) {
2822 int offset = n_target * NUMBER(data->lunt[0]) + n_lun;
2823 nsp32_lunt tmp = {
2824 SCpnt: NULL,
2825 save_datp: 0,
2826 msgin03: FALSE,
2827 sg_num: 0,
2828 cur_entry: 0,
2829 sglun: &(data->sg_list[offset]),
2830 sglun_paddr: data->sg_paddr + ARRAY_OFFSET(nsp32_sglun, offset),
2831 };
2832
2833 data->lunt[n_target][n_lun] = tmp;
2834 }
2835 }
2836
2837 /*
2838 * setup target
2839 */
2840 for (i = 0; i < NUMBER(data->target); i++) {
2841 nsp32_target *target = &(data->target[i]);
2842
2843 target->limit_entry = 0;
2844 target->sync_flag = SDTR_NONE;
2845 nsp32_set_async(data, target);
2846 }
2847
2848 /*
2849 * EEPROM check
2850 */
2851 ret = nsp32_getprom_param(data);
2852 if (ret == FALSE) {
2853 data->resettime = 3; /* default 3 */
2854 }
2855
2856 /*
2857 * setup HBA
2858 */
2859 nsp32hw_init(data);
2860
2861 snprintf(data->info_str, sizeof(data->info_str),
2862 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2863 host->irq, host->io_port, host->n_io_port);
2864
2865 /*
2866 * SCSI bus reset
2867 *
2868 * Note: It's important to reset SCSI bus in initialization phase.
2869 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
2870 * system is coming up, so SCSI devices connected to HBA is set as
2871 * un-asynchronous mode. It brings the merit that this HBA is
2872 * ready to start synchronous transfer without any preparation,
2873 * but we are difficult to control transfer speed. In addition,
2874 * it prevents device transfer speed from effecting EEPROM start-up
2875 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
2876 * Auto Mode, then FAST-10M is selected when SCSI devices are
2877 * connected same or more than 4 devices. It should be avoided
2878 * depending on this specification. Thus, resetting the SCSI bus
2879 * restores all connected SCSI devices to asynchronous mode, then
2880 * this driver set SDTR safely later, and we can control all SCSI
2881 * device transfer mode.
2882 */
2883 nsp32_do_bus_reset(data);
2884
2885 ret = request_irq(host->irq, do_nsp32_isr,
2886 SA_SHIRQ | SA_SAMPLE_RANDOM, "nsp32", data);
2887 if (ret < 0) {
2888 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2889 "SCSI PCI controller. Interrupt: %d", host->irq);
2890 goto free_sg_list;
2891 }
2892
2893 /*
2894 * PCI IO register
2895 */
2896 res = request_region(host->io_port, host->n_io_port, "nsp32");
2897 if (res == NULL) {
2898 nsp32_msg(KERN_ERR,
2899 "I/O region 0x%lx+0x%lx is already used",
2900 data->BaseAddress, data->NumAddress);
2901 goto free_irq;
2902 }
2903
2904 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
2905 scsi_add_host (host, &PCIDEV->dev);
2906 scsi_scan_host(host);
2907 #endif
2908 pci_set_drvdata(PCIDEV, host);
2909 return DETECT_OK;
2910
2911 free_irq:
2912 free_irq(host->irq, data);
2913
2914 free_sg_list:
2915 pci_free_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
2916 data->sg_list, data->sg_paddr);
2917
2918 free_autoparam:
2919 pci_free_consistent(PCIDEV, sizeof(nsp32_autoparam),
2920 data->autoparam, data->auto_paddr);
2921
2922 scsi_unregister:
2923 scsi_host_put(host);
2924
2925 err:
2926 return DETECT_NG;
2927 }
2928 #undef DETECT_OK
2929 #undef DETECT_NG
2930 #undef PCIDEV
2931
nsp32_release(struct Scsi_Host * host)2932 static int nsp32_release(struct Scsi_Host *host)
2933 {
2934 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2935
2936 if (data->autoparam) {
2937 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
2938 data->autoparam, data->auto_paddr);
2939 }
2940
2941 if (data->sg_list) {
2942 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
2943 data->sg_list, data->sg_paddr);
2944 }
2945
2946 if (host->irq) {
2947 free_irq(host->irq, data);
2948 }
2949
2950 if (host->io_port && host->n_io_port) {
2951 release_region(host->io_port, host->n_io_port);
2952 }
2953
2954 if (data->MmioAddress != 0) {
2955 iounmap((void *)(data->MmioAddress));
2956 }
2957
2958 return 0;
2959 }
2960
nsp32_info(struct Scsi_Host * shpnt)2961 static const char *nsp32_info(struct Scsi_Host *shpnt)
2962 {
2963 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2964
2965 return data->info_str;
2966 }
2967
2968
2969 /****************************************************************************
2970 * error handler
2971 */
nsp32_eh_abort(Scsi_Cmnd * SCpnt)2972 static int nsp32_eh_abort(Scsi_Cmnd *SCpnt)
2973 {
2974 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2975 unsigned int base = SCpnt->device->host->io_port;
2976
2977 nsp32_msg(KERN_WARNING, "abort");
2978
2979 if (data->cur_lunt->SCpnt == NULL) {
2980 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2981 return FAILED;
2982 }
2983
2984 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2985 /* reset SDTR negotiation */
2986 data->cur_target->sync_flag = SDTR_NONE;
2987 nsp32_set_async(data, data->cur_target);
2988 }
2989
2990 nsp32_write2(base, TRANSFER_CONTROL, 0);
2991 nsp32_write2(base, BM_CNT, 0);
2992
2993 SCpnt->result = DID_ABORT << 16;
2994 nsp32_scsi_done(SCpnt);
2995
2996 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2997 return SUCCESS;
2998 }
2999
nsp32_eh_bus_reset(Scsi_Cmnd * SCpnt)3000 static int nsp32_eh_bus_reset(Scsi_Cmnd *SCpnt)
3001 {
3002 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
3003 unsigned int base = SCpnt->device->host->io_port;
3004
3005 nsp32_msg(KERN_INFO, "Bus Reset");
3006 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
3007
3008 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
3009 nsp32_do_bus_reset(data);
3010 nsp32_write2(base, IRQ_CONTROL, 0);
3011
3012 return SUCCESS; /* SCSI bus reset is succeeded at any time. */
3013 }
3014
nsp32_do_bus_reset(nsp32_hw_data * data)3015 static void nsp32_do_bus_reset(nsp32_hw_data *data)
3016 {
3017 unsigned int base = data->BaseAddress;
3018 unsigned short intrdat;
3019 int i;
3020
3021 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
3022
3023 /*
3024 * stop all transfer
3025 * clear TRANSFERCONTROL_BM_START
3026 * clear counter
3027 */
3028 nsp32_write2(base, TRANSFER_CONTROL, 0);
3029 nsp32_write4(base, BM_CNT, 0);
3030 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
3031
3032 /*
3033 * fall back to asynchronous transfer mode
3034 * initialize SDTR negotiation flag
3035 */
3036 for (i = 0; i < NUMBER(data->target); i++) {
3037 nsp32_target *target = &data->target[i];
3038
3039 target->sync_flag = SDTR_NONE;
3040 nsp32_set_async(data, target);
3041 }
3042
3043 /*
3044 * reset SCSI bus
3045 */
3046 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
3047 udelay(RESET_HOLD_TIME);
3048 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
3049 for(i = 0; i < 5; i++) {
3050 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
3051 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
3052 }
3053
3054 data->CurrentSC = NULL;
3055 }
3056
nsp32_eh_host_reset(Scsi_Cmnd * SCpnt)3057 static int nsp32_eh_host_reset(Scsi_Cmnd *SCpnt)
3058 {
3059 struct Scsi_Host *host = SCpnt->device->host;
3060 unsigned int base = SCpnt->device->host->io_port;
3061 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3062
3063 nsp32_msg(KERN_INFO, "Host Reset");
3064 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
3065
3066 nsp32hw_init(data);
3067 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
3068 nsp32_do_bus_reset(data);
3069 nsp32_write2(base, IRQ_CONTROL, 0);
3070
3071 return SUCCESS; /* Host reset is succeeded at any time. */
3072 }
3073
3074
3075 /**************************************************************************
3076 * EEPROM handler
3077 */
3078
3079 /*
3080 * getting EEPROM parameter
3081 */
nsp32_getprom_param(nsp32_hw_data * data)3082 static int nsp32_getprom_param(nsp32_hw_data *data)
3083 {
3084 int vendor = data->pci_devid->vendor;
3085 int device = data->pci_devid->device;
3086 int ret;
3087 #ifdef NSP32_DEBUG
3088 int i;
3089 #define NSP32_DEBUG_PROM_BUF_SIZE 0x20
3090 unsigned char buf[NSP32_DEBUG_PROM_BUF_SIZE];
3091 #endif
3092
3093 /*
3094 * EEPROM checking.
3095 */
3096 ret = nsp32_prom_read(data, 0x7e);
3097 if (ret != 0x55) {
3098 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
3099 return FALSE;
3100 }
3101 ret = nsp32_prom_read(data, 0x7f);
3102 if (ret != 0xaa) {
3103 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
3104 return FALSE;
3105 }
3106
3107 /*
3108 * check EEPROM type
3109 */
3110 if (vendor == PCI_VENDOR_ID_WORKBIT &&
3111 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
3112 ret = nsp32_getprom_c16(data);
3113 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3114 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
3115 ret = nsp32_getprom_at24(data);
3116 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
3117 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
3118 ret = nsp32_getprom_at24(data);
3119 } else {
3120 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
3121 ret = FALSE;
3122 }
3123
3124 #ifdef NSP32_DEBUG
3125 /* for debug : SPROM data full checking */
3126 nsp32_dbg(NSP32_DEBUG_EEPROM, "rom dump");
3127 for (i = 0; i < sizeof(buf); i++) {
3128 buf[i] = nsp32_prom_read(data, i);
3129 }
3130 nsp32_byte_dump(buf, 0, sizeof(buf));
3131 #endif
3132
3133 return ret;
3134 }
3135 #undef NSP32_DEBUG_PROM_BUF_SIZE
3136
3137
3138 /*
3139 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
3140 *
3141 * ROMADDR
3142 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3143 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
3144 * 0x07 : HBA Synchronous Transfer Period
3145 * Value 0: AutoSync, 1: Manual Setting
3146 * 0x08 - 0x0f : Not Used? (0x0)
3147 * 0x10 : Bus Termination
3148 * Value 0: Auto[ON], 1: ON, 2: OFF
3149 * 0x11 : Not Used? (0)
3150 * 0x12 : Bus Reset Delay Time (0x03)
3151 * 0x13 : Bootable CD Support
3152 * Value 0: Disable, 1: Enable
3153 * 0x14 : Device Scan
3154 * Bit 7 6 5 4 3 2 1 0
3155 * | <----------------->
3156 * | SCSI ID: Value 0: Skip, 1: YES
3157 * |-> Value 0: ALL scan, Value 1: Manual
3158 * 0x15 - 0x1b : Not Used? (0)
3159 * 0x1c : Constant? (0x01) (clock div?)
3160 * 0x1d - 0x7c : Not Used (0xff)
3161 * 0x7d : Not Used? (0xff)
3162 * 0x7e : Constant (0x55), Validity signature
3163 * 0x7f : Constant (0xaa), Validity signature
3164 */
nsp32_getprom_at24(nsp32_hw_data * data)3165 static int nsp32_getprom_at24(nsp32_hw_data *data)
3166 {
3167 int ret, i;
3168 int auto_sync;
3169 nsp32_target *target;
3170 int entry;
3171
3172 /*
3173 * Reset time which is designated by EEPROM.
3174 *
3175 * TODO: Not used yet.
3176 */
3177 data->resettime = nsp32_prom_read(data, 0x12);
3178
3179 /*
3180 * HBA Synchronous Transfer Period
3181 *
3182 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
3183 * that if auto_sync is 0 (auto), and connected SCSI devices are
3184 * same or lower than 3, then transfer speed is set as ULTRA-20M.
3185 * On the contrary if connected SCSI devices are same or higher
3186 * than 4, then transfer speed is set as FAST-10M.
3187 *
3188 * I break this rule. The number of connected SCSI devices are
3189 * only ignored. If auto_sync is 0 (auto), then transfer speed is
3190 * forced as ULTRA-20M.
3191 */
3192 ret = nsp32_prom_read(data, 0x07);
3193 switch (ret) {
3194 case 0:
3195 auto_sync = TRUE;
3196 break;
3197 case 1:
3198 auto_sync = FALSE;
3199 break;
3200 default:
3201 nsp32_msg(KERN_WARNING,
3202 "Unsupported Auto Sync mode. Fall back to manual mode.");
3203 auto_sync = TRUE;
3204 }
3205
3206 if (trans_mode == ULTRA20M_MODE) {
3207 auto_sync = TRUE;
3208 }
3209
3210 /*
3211 * each device Synchronous Transfer Period
3212 */
3213 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3214 target = &data->target[i];
3215 if (auto_sync == TRUE) {
3216 target->limit_entry = 0; /* set as ULTRA20M */
3217 } else {
3218 ret = nsp32_prom_read(data, i);
3219 entry = nsp32_search_period_entry(data, target, ret);
3220 if (entry < 0) {
3221 /* search failed... set maximum speed */
3222 entry = 0;
3223 }
3224 target->limit_entry = entry;
3225 }
3226 }
3227
3228 return TRUE;
3229 }
3230
3231
3232 /*
3233 * C16 110 (I-O Data: SC-NBD) data map:
3234 *
3235 * ROMADDR
3236 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
3237 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
3238 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
3239 * 0x08 - 0x0f : Not Used? (0x0)
3240 * 0x10 : Transfer Mode
3241 * Value 0: PIO, 1: Busmater
3242 * 0x11 : Bus Reset Delay Time (0x00-0x20)
3243 * 0x12 : Bus Termination
3244 * Value 0: Disable, 1: Enable
3245 * 0x13 - 0x19 : Disconnection
3246 * Value 0: Disable, 1: Enable
3247 * 0x1a - 0x7c : Not Used? (0)
3248 * 0x7d : Not Used? (0xf8)
3249 * 0x7e : Constant (0x55), Validity signature
3250 * 0x7f : Constant (0xaa), Validity signature
3251 */
nsp32_getprom_c16(nsp32_hw_data * data)3252 static int nsp32_getprom_c16(nsp32_hw_data *data)
3253 {
3254 int ret, i;
3255 nsp32_target *target;
3256 int entry, val;
3257
3258 /*
3259 * Reset time which is designated by EEPROM.
3260 *
3261 * TODO: Not used yet.
3262 */
3263 data->resettime = nsp32_prom_read(data, 0x11);
3264
3265 /*
3266 * each device Synchronous Transfer Period
3267 */
3268 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3269 target = &data->target[i];
3270 ret = nsp32_prom_read(data, i);
3271 switch (ret) {
3272 case 0: /* 20MB/s */
3273 val = 0x0c;
3274 break;
3275 case 1: /* 10MB/s */
3276 val = 0x19;
3277 break;
3278 case 2: /* 5MB/s */
3279 val = 0x32;
3280 break;
3281 case 3: /* ASYNC */
3282 val = 0x00;
3283 break;
3284 default: /* default 20MB/s */
3285 val = 0x0c;
3286 break;
3287 }
3288 entry = nsp32_search_period_entry(data, target, val);
3289 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3290 /* search failed... set maximum speed */
3291 entry = 0;
3292 }
3293 target->limit_entry = entry;
3294 }
3295
3296 return TRUE;
3297 }
3298
3299
3300 /*
3301 * Atmel AT24C01A (drived in 5V) serial EEPROM routines
3302 */
nsp32_prom_read(nsp32_hw_data * data,int romaddr)3303 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3304 {
3305 int i, val;
3306
3307 /* start condition */
3308 nsp32_prom_start(data);
3309
3310 /* device address */
3311 nsp32_prom_write_bit(data, 1); /* 1 */
3312 nsp32_prom_write_bit(data, 0); /* 0 */
3313 nsp32_prom_write_bit(data, 1); /* 1 */
3314 nsp32_prom_write_bit(data, 0); /* 0 */
3315 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3316 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3317 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3318
3319 /* R/W: W for dummy write */
3320 nsp32_prom_write_bit(data, 0);
3321
3322 /* ack */
3323 nsp32_prom_write_bit(data, 0);
3324
3325 /* word address */
3326 for (i = 7; i >= 0; i--) {
3327 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3328 }
3329
3330 /* ack */
3331 nsp32_prom_write_bit(data, 0);
3332
3333 /* start condition */
3334 nsp32_prom_start(data);
3335
3336 /* device address */
3337 nsp32_prom_write_bit(data, 1); /* 1 */
3338 nsp32_prom_write_bit(data, 0); /* 0 */
3339 nsp32_prom_write_bit(data, 1); /* 1 */
3340 nsp32_prom_write_bit(data, 0); /* 0 */
3341 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3342 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3343 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3344
3345 /* R/W: R */
3346 nsp32_prom_write_bit(data, 1);
3347
3348 /* ack */
3349 nsp32_prom_write_bit(data, 0);
3350
3351 /* data... */
3352 val = 0;
3353 for (i = 7; i >= 0; i--) {
3354 int bit = nsp32_prom_read_bit(data) ? 1 : 0;
3355
3356 val |= (bit << i);
3357 }
3358
3359 /* no ack */
3360 nsp32_prom_write_bit(data, 1);
3361
3362 /* stop condition */
3363 nsp32_prom_stop(data);
3364
3365 return val;
3366 }
3367
nsp32_prom_set(nsp32_hw_data * data,int bit,int val)3368 static inline void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3369 {
3370 unsigned int base = data->BaseAddress;
3371 int tmp;
3372
3373 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3374
3375 if (val == 0) {
3376 tmp &= ~bit;
3377 } else {
3378 tmp |= bit;
3379 }
3380
3381 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3382
3383 udelay(10);
3384 }
3385
nsp32_prom_get(nsp32_hw_data * data,int bit)3386 static inline int nsp32_prom_get(nsp32_hw_data *data, int bit)
3387 {
3388 unsigned int base = data->BaseAddress;
3389 int tmp, ret;
3390
3391 if (bit != SROM_DATA) {
3392 nsp32_msg(KERN_ERR, "return value is not appropriate");
3393 return 0;
3394 }
3395
3396
3397 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3398
3399 if (tmp == 0) {
3400 ret = 0;
3401 } else {
3402 ret = 1;
3403 }
3404
3405 udelay(10);
3406
3407 return ret;
3408 }
3409
nsp32_prom_start(nsp32_hw_data * data)3410 static void nsp32_prom_start (nsp32_hw_data *data)
3411 {
3412 /* start condition */
3413 nsp32_prom_set(data, SROM_CTL, 1);
3414 nsp32_prom_set(data, SROM_DATA, 1);
3415 nsp32_prom_set(data, SROM_ENABLE, 1); /* output mode */
3416 nsp32_prom_set(data, SROM_DATA, 0); /* keeping SROM_CTL=1 and transiting
3417 * SROM_DATA 1->0 is start condition */
3418 nsp32_prom_set(data, SROM_CTL, 0);
3419 }
3420
nsp32_prom_stop(nsp32_hw_data * data)3421 static void nsp32_prom_stop (nsp32_hw_data *data)
3422 {
3423 /* stop condition */
3424 nsp32_prom_set(data, SROM_CTL, 1);
3425 nsp32_prom_set(data, SROM_DATA, 0);
3426 nsp32_prom_set(data, SROM_ENABLE, 1); /* output mode */
3427 nsp32_prom_set(data, SROM_DATA, 1);
3428 nsp32_prom_set(data, SROM_CTL, 0);
3429 }
3430
nsp32_prom_write_bit(nsp32_hw_data * data,int val)3431 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3432 {
3433 /* write */
3434 nsp32_prom_set(data, SROM_DATA, val);
3435 nsp32_prom_set(data, SROM_CTL, 1 );
3436 nsp32_prom_set(data, SROM_CTL, 0 );
3437 }
3438
nsp32_prom_read_bit(nsp32_hw_data * data)3439 static int nsp32_prom_read_bit(nsp32_hw_data *data)
3440 {
3441 int val;
3442
3443 /* read */
3444 nsp32_prom_set(data, SROM_ENABLE, 0); /* input mode */
3445 nsp32_prom_set(data, SROM_CTL, 1);
3446
3447 val = nsp32_prom_get(data, SROM_DATA);
3448
3449 nsp32_prom_set(data, SROM_CTL, 0);
3450 nsp32_prom_set(data, SROM_ENABLE, 1); /* output mode */
3451
3452 return val;
3453 }
3454
3455 /**************************************************************************
3456 * Power Management
3457 */
3458 #ifdef CONFIG_PM
3459 /* Save Device Context */
nsp32_save_state(struct pci_dev * pdev,u32 state)3460 static int nsp32_save_state(struct pci_dev *pdev, u32 state)
3461 {
3462 struct Scsi_Host *host = pci_get_drvdata(pdev);
3463
3464 nsp32_msg(KERN_INFO, "pci-save_state: stub, pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3465
3466 return 0;
3467 }
3468
3469 /* Device suspended */
nsp32_suspend(struct pci_dev * pdev,u32 state)3470 static int nsp32_suspend(struct pci_dev *pdev, u32 state)
3471 {
3472 struct Scsi_Host *host = pci_get_drvdata(pdev);
3473 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3474
3475 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3476
3477 pci_save_state (pdev, data->PciState);
3478 pci_disable_device (pdev);
3479 pci_set_power_state(pdev, state);
3480
3481 return 0;
3482 }
3483
3484 /* Device woken up */
nsp32_resume(struct pci_dev * pdev)3485 static int nsp32_resume(struct pci_dev *pdev)
3486 {
3487 struct Scsi_Host *host = pci_get_drvdata(pdev);
3488 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3489 unsigned short reg;
3490
3491 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3492
3493 pci_set_power_state(pdev, 0);
3494 pci_enable_wake (pdev, 0, 0);
3495 pci_restore_state (pdev, data->PciState);
3496
3497 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3498
3499 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3500
3501 if (reg == 0xffff) {
3502 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3503 return 0;
3504 }
3505
3506 nsp32hw_init (data);
3507 nsp32_do_bus_reset(data);
3508
3509 nsp32_msg(KERN_INFO, "resume success");
3510
3511 return 0;
3512 }
3513
3514 /* Enable wake event */
nsp32_enable_wake(struct pci_dev * pdev,u32 state,int enable)3515 static int nsp32_enable_wake(struct pci_dev *pdev, u32 state, int enable)
3516 {
3517 struct Scsi_Host *host = pci_get_drvdata(pdev);
3518
3519 nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
3520
3521 return 0;
3522 }
3523 #endif
3524
3525 /************************************************************************
3526 * PCI/Cardbus probe/remove routine
3527 */
nsp32_probe(struct pci_dev * pdev,const struct pci_device_id * id)3528 static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3529 {
3530 int ret;
3531 nsp32_hw_data *data = &nsp32_data_base;
3532
3533 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3534
3535 ret = pci_enable_device(pdev);
3536 if (ret) {
3537 nsp32_msg(KERN_ERR, "failed to enable pci device");
3538 return ret;
3539 }
3540
3541 data->Pci = pdev;
3542 data->pci_devid = id;
3543 data->IrqNumber = pdev->irq;
3544 data->BaseAddress = pci_resource_start(pdev, 0);
3545 data->NumAddress = pci_resource_len (pdev, 0);
3546 data->MmioAddress =
3547 (unsigned long)ioremap_nocache(pci_resource_start(pdev, 1),
3548 pci_resource_len (pdev, 1));
3549 data->MmioLength = pci_resource_len (pdev, 1);
3550
3551 pci_set_master(pdev);
3552
3553 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3554 ret = nsp32_detect(pdev);
3555 #else
3556 ret = scsi_register_host(&nsp32_template);
3557 #endif
3558
3559 nsp32_msg(KERN_INFO, "irq: %i mmio: 0x%lx+0x%lx slot: %s model: %s",
3560 pdev->irq,
3561 data->MmioAddress, data->MmioLength,
3562 pci_name(pdev),
3563 nsp32_model[id->driver_data]);
3564
3565 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3566
3567 return ret;
3568 }
3569
nsp32_remove(struct pci_dev * pdev)3570 static void __devexit nsp32_remove(struct pci_dev *pdev)
3571 {
3572 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3573 struct Scsi_Host *host = pci_get_drvdata(pdev);
3574 #endif
3575
3576 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3577
3578 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
3579 scsi_remove_host(host);
3580
3581 nsp32_release(host);
3582
3583 scsi_host_put(host);
3584 #else
3585 scsi_unregister_host(&nsp32_template);
3586 #endif
3587 }
3588
3589
3590
3591 static struct pci_driver nsp32_driver = {
3592 .name = "nsp32",
3593 .id_table = nsp32_pci_table,
3594 .probe = nsp32_probe,
3595 .remove = __devexit_p(nsp32_remove),
3596 #ifdef CONFIG_PM
3597 .save_state = nsp32_save_state,
3598 .suspend = nsp32_suspend,
3599 .resume = nsp32_resume,
3600 .enable_wake = nsp32_enable_wake,
3601 #endif
3602 };
3603
3604 /*********************************************************************
3605 * Moule entry point
3606 */
init_nsp32(void)3607 static int __init init_nsp32(void) {
3608 nsp32_msg(KERN_INFO, "loading...");
3609 return pci_module_init(&nsp32_driver);
3610 }
3611
exit_nsp32(void)3612 static void __exit exit_nsp32(void) {
3613 nsp32_msg(KERN_INFO, "unloading...");
3614 pci_unregister_driver(&nsp32_driver);
3615 }
3616
3617 module_init(init_nsp32);
3618 module_exit(exit_nsp32);
3619
3620 /* end */
3621