1 /* $Id: esp.c,v 1.99 2001/02/13 01:17:01 davem Exp $
2  * esp.c:  EnhancedScsiProcessor Sun SCSI driver code.
3  *
4  * Copyright (C) 1995, 1998 David S. Miller (davem@caip.rutgers.edu)
5  */
6 
7 /* TODO:
8  *
9  * 1) Maybe disable parity checking in config register one for SCSI1
10  *    targets.  (Gilmore says parity error on the SBus can lock up
11  *    old sun4c's)
12  * 2) Add support for DMA2 pipelining.
13  * 3) Add tagged queueing.
14  */
15 
16 #include <linux/config.h>
17 #include <linux/kernel.h>
18 #include <linux/delay.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <linux/slab.h>
22 #include <linux/blk.h>
23 #include <linux/proc_fs.h>
24 #include <linux/stat.h>
25 #include <linux/init.h>
26 #include <linux/spinlock.h>
27 
28 #include "scsi.h"
29 #include "hosts.h"
30 #include "esp.h"
31 
32 #include <asm/sbus.h>
33 #include <asm/dma.h>
34 #include <asm/system.h>
35 #include <asm/ptrace.h>
36 #include <asm/pgtable.h>
37 #include <asm/oplib.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
40 
41 #ifndef __sparc_v9__
42 #include <asm/machines.h>
43 #include <asm/idprom.h>
44 #endif
45 
46 #include <linux/module.h>
47 
48 #define DEBUG_ESP
49 /* #define DEBUG_ESP_HME */
50 /* #define DEBUG_ESP_DATA */
51 /* #define DEBUG_ESP_QUEUE */
52 /* #define DEBUG_ESP_DISCONNECT */
53 /* #define DEBUG_ESP_STATUS */
54 /* #define DEBUG_ESP_PHASES */
55 /* #define DEBUG_ESP_WORKBUS */
56 /* #define DEBUG_STATE_MACHINE */
57 /* #define DEBUG_ESP_CMDS */
58 /* #define DEBUG_ESP_IRQS */
59 /* #define DEBUG_SDTR */
60 /* #define DEBUG_ESP_SG */
61 
62 /* Use the following to sprinkle debugging messages in a way which
63  * suits you if combinations of the above become too verbose when
64  * trying to track down a specific problem.
65  */
66 /* #define DEBUG_ESP_MISC */
67 
68 #if defined(DEBUG_ESP)
69 #define ESPLOG(foo)  printk foo
70 #else
71 #define ESPLOG(foo)
72 #endif /* (DEBUG_ESP) */
73 
74 #if defined(DEBUG_ESP_HME)
75 #define ESPHME(foo)  printk foo
76 #else
77 #define ESPHME(foo)
78 #endif
79 
80 #if defined(DEBUG_ESP_DATA)
81 #define ESPDATA(foo)  printk foo
82 #else
83 #define ESPDATA(foo)
84 #endif
85 
86 #if defined(DEBUG_ESP_QUEUE)
87 #define ESPQUEUE(foo)  printk foo
88 #else
89 #define ESPQUEUE(foo)
90 #endif
91 
92 #if defined(DEBUG_ESP_DISCONNECT)
93 #define ESPDISC(foo)  printk foo
94 #else
95 #define ESPDISC(foo)
96 #endif
97 
98 #if defined(DEBUG_ESP_STATUS)
99 #define ESPSTAT(foo)  printk foo
100 #else
101 #define ESPSTAT(foo)
102 #endif
103 
104 #if defined(DEBUG_ESP_PHASES)
105 #define ESPPHASE(foo)  printk foo
106 #else
107 #define ESPPHASE(foo)
108 #endif
109 
110 #if defined(DEBUG_ESP_WORKBUS)
111 #define ESPBUS(foo)  printk foo
112 #else
113 #define ESPBUS(foo)
114 #endif
115 
116 #if defined(DEBUG_ESP_IRQS)
117 #define ESPIRQ(foo)  printk foo
118 #else
119 #define ESPIRQ(foo)
120 #endif
121 
122 #if defined(DEBUG_SDTR)
123 #define ESPSDTR(foo)  printk foo
124 #else
125 #define ESPSDTR(foo)
126 #endif
127 
128 #if defined(DEBUG_ESP_MISC)
129 #define ESPMISC(foo)  printk foo
130 #else
131 #define ESPMISC(foo)
132 #endif
133 
134 /* Command phase enumeration. */
135 enum {
136 	not_issued    = 0x00,  /* Still in the issue_SC queue.          */
137 
138 	/* Various forms of selecting a target. */
139 #define in_slct_mask    0x10
140 	in_slct_norm  = 0x10,  /* ESP is arbitrating, normal selection  */
141 	in_slct_stop  = 0x11,  /* ESP will select, then stop with IRQ   */
142 	in_slct_msg   = 0x12,  /* select, then send a message           */
143 	in_slct_tag   = 0x13,  /* select and send tagged queue msg      */
144 	in_slct_sneg  = 0x14,  /* select and acquire sync capabilities  */
145 
146 	/* Any post selection activity. */
147 #define in_phases_mask  0x20
148 	in_datain     = 0x20,  /* Data is transferring from the bus     */
149 	in_dataout    = 0x21,  /* Data is transferring to the bus       */
150 	in_data_done  = 0x22,  /* Last DMA data operation done (maybe)  */
151 	in_msgin      = 0x23,  /* Eating message from target            */
152 	in_msgincont  = 0x24,  /* Eating more msg bytes from target     */
153 	in_msgindone  = 0x25,  /* Decide what to do with what we got    */
154 	in_msgout     = 0x26,  /* Sending message to target             */
155 	in_msgoutdone = 0x27,  /* Done sending msg out                  */
156 	in_cmdbegin   = 0x28,  /* Sending cmd after abnormal selection  */
157 	in_cmdend     = 0x29,  /* Done sending slow cmd                 */
158 	in_status     = 0x2a,  /* Was in status phase, finishing cmd    */
159 	in_freeing    = 0x2b,  /* freeing the bus for cmd cmplt or disc */
160 	in_the_dark   = 0x2c,  /* Don't know what bus phase we are in   */
161 
162 	/* Special states, ie. not normal bus transitions... */
163 #define in_spec_mask    0x80
164 	in_abortone   = 0x80,  /* Aborting one command currently        */
165 	in_abortall   = 0x81,  /* Blowing away all commands we have     */
166 	in_resetdev   = 0x82,  /* SCSI target reset in progress         */
167 	in_resetbus   = 0x83,  /* SCSI bus reset in progress            */
168 	in_tgterror   = 0x84,  /* Target did something stupid           */
169 };
170 
171 enum {
172 	/* Zero has special meaning, see skipahead[12]. */
173 /*0*/	do_never,
174 
175 /*1*/	do_phase_determine,
176 /*2*/	do_reset_bus,
177 /*3*/	do_reset_complete,
178 /*4*/	do_work_bus,
179 /*5*/	do_intr_end
180 };
181 
182 /* The master ring of all esp hosts we are managing in this driver. */
183 static struct esp *espchain;
184 static spinlock_t espchain_lock = SPIN_LOCK_UNLOCKED;
185 static int esps_running = 0;
186 
187 /* Forward declarations. */
188 static void esp_intr(int irq, void *dev_id, struct pt_regs *pregs);
189 
190 /* Debugging routines */
191 struct esp_cmdstrings {
192 	u8 cmdchar;
193 	char *text;
194 } esp_cmd_strings[] = {
195 	/* Miscellaneous */
196 	{ ESP_CMD_NULL, "ESP_NOP", },
197 	{ ESP_CMD_FLUSH, "FIFO_FLUSH", },
198 	{ ESP_CMD_RC, "RSTESP", },
199 	{ ESP_CMD_RS, "RSTSCSI", },
200 	/* Disconnected State Group */
201 	{ ESP_CMD_RSEL, "RESLCTSEQ", },
202 	{ ESP_CMD_SEL, "SLCTNATN", },
203 	{ ESP_CMD_SELA, "SLCTATN", },
204 	{ ESP_CMD_SELAS, "SLCTATNSTOP", },
205 	{ ESP_CMD_ESEL, "ENSLCTRESEL", },
206 	{ ESP_CMD_DSEL, "DISSELRESEL", },
207 	{ ESP_CMD_SA3, "SLCTATN3", },
208 	{ ESP_CMD_RSEL3, "RESLCTSEQ", },
209 	/* Target State Group */
210 	{ ESP_CMD_SMSG, "SNDMSG", },
211 	{ ESP_CMD_SSTAT, "SNDSTATUS", },
212 	{ ESP_CMD_SDATA, "SNDDATA", },
213 	{ ESP_CMD_DSEQ, "DISCSEQ", },
214 	{ ESP_CMD_TSEQ, "TERMSEQ", },
215 	{ ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
216 	{ ESP_CMD_DCNCT, "DISC", },
217 	{ ESP_CMD_RMSG, "RCVMSG", },
218 	{ ESP_CMD_RCMD, "RCVCMD", },
219 	{ ESP_CMD_RDATA, "RCVDATA", },
220 	{ ESP_CMD_RCSEQ, "RCVCMDSEQ", },
221 	/* Initiator State Group */
222 	{ ESP_CMD_TI, "TRANSINFO", },
223 	{ ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
224 	{ ESP_CMD_MOK, "MSGACCEPTED", },
225 	{ ESP_CMD_TPAD, "TPAD", },
226 	{ ESP_CMD_SATN, "SATN", },
227 	{ ESP_CMD_RATN, "RATN", },
228 };
229 #define NUM_ESP_COMMANDS  ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
230 
231 /* Print textual representation of an ESP command */
esp_print_cmd(u8 espcmd)232 static inline void esp_print_cmd(u8 espcmd)
233 {
234 	u8 dma_bit = espcmd & ESP_CMD_DMA;
235 	int i;
236 
237 	espcmd &= ~dma_bit;
238 	for (i = 0; i < NUM_ESP_COMMANDS; i++)
239 		if (esp_cmd_strings[i].cmdchar == espcmd)
240 			break;
241 	if (i == NUM_ESP_COMMANDS)
242 		printk("ESP_Unknown");
243 	else
244 		printk("%s%s", esp_cmd_strings[i].text,
245 		       ((dma_bit) ? "+DMA" : ""));
246 }
247 
248 /* Print the status register's value */
esp_print_statreg(u8 statreg)249 static inline void esp_print_statreg(u8 statreg)
250 {
251 	u8 phase;
252 
253 	printk("STATUS<");
254 	phase = statreg & ESP_STAT_PMASK;
255 	printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
256 		       (phase == ESP_DIP ? "DATA-IN" :
257 			(phase == ESP_CMDP ? "COMMAND" :
258 			 (phase == ESP_STATP ? "STATUS" :
259 			  (phase == ESP_MOP ? "MSG-OUT" :
260 			   (phase == ESP_MIP ? "MSG_IN" :
261 			    "unknown")))))));
262 	if (statreg & ESP_STAT_TDONE)
263 		printk("TRANS_DONE,");
264 	if (statreg & ESP_STAT_TCNT)
265 		printk("TCOUNT_ZERO,");
266 	if (statreg & ESP_STAT_PERR)
267 		printk("P_ERROR,");
268 	if (statreg & ESP_STAT_SPAM)
269 		printk("SPAM,");
270 	if (statreg & ESP_STAT_INTR)
271 		printk("IRQ,");
272 	printk(">");
273 }
274 
275 /* Print the interrupt register's value */
esp_print_ireg(u8 intreg)276 static inline void esp_print_ireg(u8 intreg)
277 {
278 	printk("INTREG< ");
279 	if (intreg & ESP_INTR_S)
280 		printk("SLCT_NATN ");
281 	if (intreg & ESP_INTR_SATN)
282 		printk("SLCT_ATN ");
283 	if (intreg & ESP_INTR_RSEL)
284 		printk("RSLCT ");
285 	if (intreg & ESP_INTR_FDONE)
286 		printk("FDONE ");
287 	if (intreg & ESP_INTR_BSERV)
288 		printk("BSERV ");
289 	if (intreg & ESP_INTR_DC)
290 		printk("DISCNCT ");
291 	if (intreg & ESP_INTR_IC)
292 		printk("ILL_CMD ");
293 	if (intreg & ESP_INTR_SR)
294 		printk("SCSI_BUS_RESET ");
295 	printk(">");
296 }
297 
298 /* Print the sequence step registers contents */
esp_print_seqreg(u8 stepreg)299 static inline void esp_print_seqreg(u8 stepreg)
300 {
301 	stepreg &= ESP_STEP_VBITS;
302 	printk("STEP<%s>",
303 	       (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
304 		(stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
305 		 (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
306 		  (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
307 		   (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
308 		    "UNKNOWN"))))));
309 }
310 
phase_string(int phase)311 static char *phase_string(int phase)
312 {
313 	switch (phase) {
314 	case not_issued:
315 		return "UNISSUED";
316 	case in_slct_norm:
317 		return "SLCTNORM";
318 	case in_slct_stop:
319 		return "SLCTSTOP";
320 	case in_slct_msg:
321 		return "SLCTMSG";
322 	case in_slct_tag:
323 		return "SLCTTAG";
324 	case in_slct_sneg:
325 		return "SLCTSNEG";
326 	case in_datain:
327 		return "DATAIN";
328 	case in_dataout:
329 		return "DATAOUT";
330 	case in_data_done:
331 		return "DATADONE";
332 	case in_msgin:
333 		return "MSGIN";
334 	case in_msgincont:
335 		return "MSGINCONT";
336 	case in_msgindone:
337 		return "MSGINDONE";
338 	case in_msgout:
339 		return "MSGOUT";
340 	case in_msgoutdone:
341 		return "MSGOUTDONE";
342 	case in_cmdbegin:
343 		return "CMDBEGIN";
344 	case in_cmdend:
345 		return "CMDEND";
346 	case in_status:
347 		return "STATUS";
348 	case in_freeing:
349 		return "FREEING";
350 	case in_the_dark:
351 		return "CLUELESS";
352 	case in_abortone:
353 		return "ABORTONE";
354 	case in_abortall:
355 		return "ABORTALL";
356 	case in_resetdev:
357 		return "RESETDEV";
358 	case in_resetbus:
359 		return "RESETBUS";
360 	case in_tgterror:
361 		return "TGTERROR";
362 	default:
363 		return "UNKNOWN";
364 	};
365 }
366 
367 #ifdef DEBUG_STATE_MACHINE
esp_advance_phase(Scsi_Cmnd * s,int newphase)368 static inline void esp_advance_phase(Scsi_Cmnd *s, int newphase)
369 {
370 	ESPLOG(("<%s>", phase_string(newphase)));
371 	s->SCp.sent_command = s->SCp.phase;
372 	s->SCp.phase = newphase;
373 }
374 #else
375 #define esp_advance_phase(__s, __newphase) \
376 	(__s)->SCp.sent_command = (__s)->SCp.phase; \
377 	(__s)->SCp.phase = (__newphase);
378 #endif
379 
380 #ifdef DEBUG_ESP_CMDS
esp_cmd(struct esp * esp,u8 cmd)381 static inline void esp_cmd(struct esp *esp, u8 cmd)
382 {
383 	esp->espcmdlog[esp->espcmdent] = cmd;
384 	esp->espcmdent = (esp->espcmdent + 1) & 31;
385 	sbus_writeb(cmd, esp->eregs + ESP_CMD);
386 }
387 #else
388 #define esp_cmd(__esp, __cmd)	\
389 	sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD)
390 #endif
391 
392 #define ESP_INTSOFF(__dregs)	\
393 	sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR)
394 #define ESP_INTSON(__dregs)	\
395 	sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR)
396 #define ESP_IRQ_P(__dregs)	\
397 	(sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR))
398 
399 /* How we use the various Linux SCSI data structures for operation.
400  *
401  * struct scsi_cmnd:
402  *
403  *   We keep track of the synchronous capabilities of a target
404  *   in the device member, using sync_min_period and
405  *   sync_max_offset.  These are the values we directly write
406  *   into the ESP registers while running a command.  If offset
407  *   is zero the ESP will use asynchronous transfers.
408  *   If the borken flag is set we assume we shouldn't even bother
409  *   trying to negotiate for synchronous transfer as this target
410  *   is really stupid.  If we notice the target is dropping the
411  *   bus, and we have been allowing it to disconnect, we clear
412  *   the disconnect flag.
413  */
414 
415 
416 /* Manipulation of the ESP command queues.  Thanks to the aha152x driver
417  * and its author, Juergen E. Fischer, for the methods used here.
418  * Note that these are per-ESP queues, not global queues like
419  * the aha152x driver uses.
420  */
append_SC(Scsi_Cmnd ** SC,Scsi_Cmnd * new_SC)421 static inline void append_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
422 {
423 	Scsi_Cmnd *end;
424 
425 	new_SC->host_scribble = (unsigned char *) NULL;
426 	if (!*SC)
427 		*SC = new_SC;
428 	else {
429 		for (end=*SC;end->host_scribble;end=(Scsi_Cmnd *)end->host_scribble)
430 			;
431 		end->host_scribble = (unsigned char *) new_SC;
432 	}
433 }
434 
prepend_SC(Scsi_Cmnd ** SC,Scsi_Cmnd * new_SC)435 static inline void prepend_SC(Scsi_Cmnd **SC, Scsi_Cmnd *new_SC)
436 {
437 	new_SC->host_scribble = (unsigned char *) *SC;
438 	*SC = new_SC;
439 }
440 
remove_first_SC(Scsi_Cmnd ** SC)441 static inline Scsi_Cmnd *remove_first_SC(Scsi_Cmnd **SC)
442 {
443 	Scsi_Cmnd *ptr;
444 	ptr = *SC;
445 	if (ptr)
446 		*SC = (Scsi_Cmnd *) (*SC)->host_scribble;
447 	return ptr;
448 }
449 
remove_SC(Scsi_Cmnd ** SC,int target,int lun)450 static inline Scsi_Cmnd *remove_SC(Scsi_Cmnd **SC, int target, int lun)
451 {
452 	Scsi_Cmnd *ptr, *prev;
453 
454 	for (ptr = *SC, prev = NULL;
455 	     ptr && ((ptr->target != target) || (ptr->lun != lun));
456 	     prev = ptr, ptr = (Scsi_Cmnd *) ptr->host_scribble)
457 		;
458 	if (ptr) {
459 		if (prev)
460 			prev->host_scribble=ptr->host_scribble;
461 		else
462 			*SC=(Scsi_Cmnd *)ptr->host_scribble;
463 	}
464 	return ptr;
465 }
466 
467 /* Resetting various pieces of the ESP scsi driver chipset/buses. */
esp_reset_dma(struct esp * esp)468 static void esp_reset_dma(struct esp *esp)
469 {
470 	unsigned long flags;
471 	int can_do_burst16, can_do_burst32, can_do_burst64;
472 	int can_do_sbus64;
473 	u32 tmp;
474 
475 	can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
476 	can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
477 	can_do_burst64 = 0;
478 	can_do_sbus64 = 0;
479 	if (sbus_can_dma_64bit(esp->sdev))
480 		can_do_sbus64 = 1;
481 	if (sbus_can_burst64(esp->sdev))
482 		can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
483 
484 	/* Punt the DVMA into a known state. */
485 	if (esp->dma->revision != dvmahme) {
486 		tmp = sbus_readl(esp->dregs + DMA_CSR);
487 		sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR);
488 		sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR);
489 	}
490 	switch (esp->dma->revision) {
491 	case dvmahme:
492 		/* This is the HME DVMA gate array. */
493 
494 		save_flags(flags); cli(); /* I really hate this chip. */
495 
496 		sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR);
497 		sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
498 
499 		esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB);
500 		esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ);
501 
502 		if (can_do_burst64)
503 			esp->prev_hme_dmacsr |= DMA_BRST64;
504 		else if (can_do_burst32)
505 			esp->prev_hme_dmacsr |= DMA_BRST32;
506 
507 		if (can_do_sbus64) {
508 			esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
509 			sbus_set_sbus64(esp->sdev, esp->bursts);
510 		}
511 
512 		/* This chip is horrible. */
513 		while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ)
514 			udelay(1);
515 
516 		sbus_writel(0, esp->dregs + DMA_CSR);
517 		sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
518 
519 		/* This is necessary to avoid having the SCSI channel
520 		 * engine lock up on us.
521 		 */
522 		sbus_writel(0, esp->dregs + DMA_ADDR);
523 
524 		restore_flags(flags);
525 		break;
526 	case dvmarev2:
527 		/* This is the gate array found in the sun4m
528 		 * NCR SBUS I/O subsystem.
529 		 */
530 		if (esp->erev != esp100) {
531 			tmp = sbus_readl(esp->dregs + DMA_CSR);
532 			sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR);
533 		}
534 		break;
535 	case dvmarev3:
536 		tmp = sbus_readl(esp->dregs + DMA_CSR);
537 		tmp &= ~DMA_3CLKS;
538 		tmp |= DMA_2CLKS;
539 		if (can_do_burst32) {
540 			tmp &= ~DMA_BRST_SZ;
541 			tmp |= DMA_BRST32;
542 		}
543 		sbus_writel(tmp, esp->dregs + DMA_CSR);
544 		break;
545 	case dvmaesc1:
546 		/* This is the DMA unit found on SCSI/Ether cards. */
547 		tmp = sbus_readl(esp->dregs + DMA_CSR);
548 		tmp |= DMA_ADD_ENABLE;
549 		tmp &= ~DMA_BCNT_ENAB;
550 		if (!can_do_burst32 && can_do_burst16) {
551 			tmp |= DMA_ESC_BURST;
552 		} else {
553 			tmp &= ~(DMA_ESC_BURST);
554 		}
555 		sbus_writel(tmp, esp->dregs + DMA_CSR);
556 		break;
557 	default:
558 		break;
559 	};
560 	ESP_INTSON(esp->dregs);
561 }
562 
563 /* Reset the ESP chip, _not_ the SCSI bus. */
esp_reset_esp(struct esp * esp)564 static void __init esp_reset_esp(struct esp *esp)
565 {
566 	u8 family_code, version;
567 	int i;
568 
569 	/* Now reset the ESP chip */
570 	esp_cmd(esp, ESP_CMD_RC);
571 	esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
572 	esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
573 
574 	/* Reload the configuration registers */
575 	sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT);
576 	esp->prev_stp = 0;
577 	sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
578 	esp->prev_soff = 0;
579 	sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
580 	sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO);
581 
582 	/* This is the only point at which it is reliable to read
583 	 * the ID-code for a fast ESP chip variants.
584 	 */
585 	esp->max_period = ((35 * esp->ccycle) / 1000);
586 	if (esp->erev == fast) {
587 		version = sbus_readb(esp->eregs + ESP_UID);
588 		family_code = (version & 0xf8) >> 3;
589 		if (family_code == 0x02)
590 			esp->erev = fas236;
591 		else if (family_code == 0x0a)
592 			esp->erev = fashme; /* Version is usually '5'. */
593 		else
594 			esp->erev = fas100a;
595 		ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
596 			 esp->esp_id,
597 			 (esp->erev == fas236) ? "fas236" :
598 			 ((esp->erev == fas100a) ? "fas100a" :
599 			  "fasHME"), family_code, (version & 7)));
600 
601 		esp->min_period = ((4 * esp->ccycle) / 1000);
602 	} else {
603 		esp->min_period = ((5 * esp->ccycle) / 1000);
604 	}
605 	esp->max_period = (esp->max_period + 3)>>2;
606 	esp->min_period = (esp->min_period + 3)>>2;
607 
608 	sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
609 	switch (esp->erev) {
610 	case esp100:
611 		/* nothing to do */
612 		break;
613 	case esp100a:
614 		sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
615 		break;
616 	case esp236:
617 		/* Slow 236 */
618 		sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
619 		esp->prev_cfg3 = esp->config3[0];
620 		sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
621 		break;
622 	case fashme:
623 		esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
624 		/* fallthrough... */
625 	case fas236:
626 		/* Fast 236 or HME */
627 		sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
628 		for (i = 0; i < 16; i++) {
629 			if (esp->erev == fashme) {
630 				u8 cfg3;
631 
632 				cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
633 				if (esp->scsi_id >= 8)
634 					cfg3 |= ESP_CONFIG3_IDBIT3;
635 				esp->config3[i] |= cfg3;
636 			} else {
637 				esp->config3[i] |= ESP_CONFIG3_FCLK;
638 			}
639 		}
640 		esp->prev_cfg3 = esp->config3[0];
641 		sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
642 		if (esp->erev == fashme) {
643 			esp->radelay = 80;
644 		} else {
645 			if (esp->diff)
646 				esp->radelay = 0;
647 			else
648 				esp->radelay = 96;
649 		}
650 		break;
651 	case fas100a:
652 		/* Fast 100a */
653 		sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
654 		for (i = 0; i < 16; i++)
655 			esp->config3[i] |= ESP_CONFIG3_FCLOCK;
656 		esp->prev_cfg3 = esp->config3[0];
657 		sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
658 		esp->radelay = 32;
659 		break;
660 	default:
661 		panic("esp: what could it be... I wonder...");
662 		break;
663 	};
664 
665 	/* Eat any bitrot in the chip */
666 	sbus_readb(esp->eregs + ESP_INTRPT);
667 	udelay(100);
668 }
669 
670 /* This places the ESP into a known state at boot time. */
esp_bootup_reset(struct esp * esp)671 static void __init esp_bootup_reset(struct esp *esp)
672 {
673 	u8 tmp;
674 
675 	/* Reset the DMA */
676 	esp_reset_dma(esp);
677 
678 	/* Reset the ESP */
679 	esp_reset_esp(esp);
680 
681 	/* Reset the SCSI bus, but tell ESP not to generate an irq */
682 	tmp = sbus_readb(esp->eregs + ESP_CFG1);
683 	tmp |= ESP_CONFIG1_SRRDISAB;
684 	sbus_writeb(tmp, esp->eregs + ESP_CFG1);
685 
686 	esp_cmd(esp, ESP_CMD_RS);
687 	udelay(400);
688 
689 	sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
690 
691 	/* Eat any bitrot in the chip and we are done... */
692 	sbus_readb(esp->eregs + ESP_INTRPT);
693 }
694 
esp_chain_add(struct esp * esp)695 static void esp_chain_add(struct esp *esp)
696 {
697 	spin_lock_irq(&espchain_lock);
698 	if (espchain) {
699 		struct esp *elink = espchain;
700 		while (elink->next)
701 			elink = elink->next;
702 		elink->next = esp;
703 	} else {
704 		espchain = esp;
705 	}
706 	esp->next = NULL;
707 	spin_unlock_irq(&espchain_lock);
708 }
709 
esp_chain_del(struct esp * esp)710 static void esp_chain_del(struct esp *esp)
711 {
712 	spin_lock_irq(&espchain_lock);
713 	if (espchain == esp) {
714 		espchain = esp->next;
715 	} else {
716 		struct esp *elink = espchain;
717 		while (elink->next != esp)
718 			elink = elink->next;
719 		elink->next = esp->next;
720 	}
721 	esp->next = NULL;
722 	spin_unlock_irq(&espchain_lock);
723 }
724 
esp_find_dvma(struct esp * esp,struct sbus_dev * dma_sdev)725 static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev)
726 {
727 	struct sbus_dev *sdev = esp->sdev;
728 	struct sbus_dma *dma;
729 
730 	if (dma_sdev != NULL) {
731 		for_each_dvma(dma) {
732 			if (dma->sdev == dma_sdev)
733 				break;
734 		}
735 	} else {
736 		for_each_dvma(dma) {
737 			/* If allocated already, can't use it. */
738 			if (dma->allocated)
739 				continue;
740 
741 			if (dma->sdev == NULL)
742 				break;
743 
744 			/* If bus + slot are the same and it has the
745 			 * correct OBP name, it's ours.
746 			 */
747 			if (sdev->bus == dma->sdev->bus &&
748 			    sdev->slot == dma->sdev->slot &&
749 			    (!strcmp(dma->sdev->prom_name, "dma") ||
750 			     !strcmp(dma->sdev->prom_name, "espdma")))
751 				break;
752 		}
753 	}
754 
755 	/* If we don't know how to handle the dvma,
756 	 * do not use this device.
757 	 */
758 	if (dma == NULL) {
759 		printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id);
760 		return -1;
761 	}
762 	if (dma->allocated) {
763 		printk("esp%d: can't use my espdma\n", esp->esp_id);
764 		return -1;
765 	}
766 	dma->allocated = 1;
767 	esp->dma = dma;
768 	esp->dregs = dma->regs;
769 
770 	return 0;
771 }
772 
esp_map_regs(struct esp * esp,int hme)773 static int __init esp_map_regs(struct esp *esp, int hme)
774 {
775 	struct sbus_dev *sdev = esp->sdev;
776 	struct resource *res;
777 
778 	/* On HME, two reg sets exist, first is DVMA,
779 	 * second is ESP registers.
780 	 */
781 	if (hme)
782 		res = &sdev->resource[1];
783 	else
784 		res = &sdev->resource[0];
785 
786 	esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers");
787 
788 	if (esp->eregs == 0)
789 		return -1;
790 	return 0;
791 }
792 
esp_map_cmdarea(struct esp * esp)793 static int __init esp_map_cmdarea(struct esp *esp)
794 {
795 	struct sbus_dev *sdev = esp->sdev;
796 
797 	esp->esp_command = sbus_alloc_consistent(sdev, 16,
798 						 &esp->esp_command_dvma);
799 	if (esp->esp_command == NULL ||
800 	    esp->esp_command_dvma == 0)
801 		return -1;
802 	return 0;
803 }
804 
esp_register_irq(struct esp * esp)805 static int __init esp_register_irq(struct esp *esp)
806 {
807 	esp->ehost->irq = esp->irq = esp->sdev->irqs[0];
808 
809 	/* We used to try various overly-clever things to
810 	 * reduce the interrupt processing overhead on
811 	 * sun4c/sun4m when multiple ESP's shared the
812 	 * same IRQ.  It was too complex and messy to
813 	 * sanely maintain.
814 	 */
815 	if (request_irq(esp->ehost->irq, esp_intr,
816 			SA_SHIRQ, "ESP SCSI", esp)) {
817 		printk("esp%d: Cannot acquire irq line\n",
818 		       esp->esp_id);
819 		return -1;
820 	}
821 
822 	printk("esp%d: IRQ %s ", esp->esp_id,
823 	       __irq_itoa(esp->ehost->irq));
824 
825 	return 0;
826 }
827 
esp_get_scsi_id(struct esp * esp)828 static void __init esp_get_scsi_id(struct esp *esp)
829 {
830 	struct sbus_dev *sdev = esp->sdev;
831 
832 	esp->scsi_id = prom_getintdefault(esp->prom_node,
833 					  "initiator-id",
834 					  -1);
835 	if (esp->scsi_id == -1)
836 		esp->scsi_id = prom_getintdefault(esp->prom_node,
837 						  "scsi-initiator-id",
838 						  -1);
839 	if (esp->scsi_id == -1)
840 		esp->scsi_id = (sdev->bus == NULL) ? 7 :
841 			prom_getintdefault(sdev->bus->prom_node,
842 					   "scsi-initiator-id",
843 					   7);
844 	esp->ehost->this_id = esp->scsi_id;
845 	esp->scsi_id_mask = (1 << esp->scsi_id);
846 
847 }
848 
esp_get_clock_params(struct esp * esp)849 static void __init esp_get_clock_params(struct esp *esp)
850 {
851 	struct sbus_dev *sdev = esp->sdev;
852 	int prom_node = esp->prom_node;
853 	int sbus_prom_node;
854 	unsigned int fmhz;
855 	u8 ccf;
856 
857 	if (sdev != NULL && sdev->bus != NULL)
858 		sbus_prom_node = sdev->bus->prom_node;
859 	else
860 		sbus_prom_node = 0;
861 
862 	/* This is getting messy but it has to be done
863 	 * correctly or else you get weird behavior all
864 	 * over the place.  We are trying to basically
865 	 * figure out three pieces of information.
866 	 *
867 	 * a) Clock Conversion Factor
868 	 *
869 	 *    This is a representation of the input
870 	 *    crystal clock frequency going into the
871 	 *    ESP on this machine.  Any operation whose
872 	 *    timing is longer than 400ns depends on this
873 	 *    value being correct.  For example, you'll
874 	 *    get blips for arbitration/selection during
875 	 *    high load or with multiple targets if this
876 	 *    is not set correctly.
877 	 *
878 	 * b) Selection Time-Out
879 	 *
880 	 *    The ESP isn't very bright and will arbitrate
881 	 *    for the bus and try to select a target
882 	 *    forever if you let it.  This value tells
883 	 *    the ESP when it has taken too long to
884 	 *    negotiate and that it should interrupt
885 	 *    the CPU so we can see what happened.
886 	 *    The value is computed as follows (from
887 	 *    NCR/Symbios chip docs).
888 	 *
889 	 *          (Time Out Period) *  (Input Clock)
890 	 *    STO = ----------------------------------
891 	 *          (8192) * (Clock Conversion Factor)
892 	 *
893 	 *    You usually want the time out period to be
894 	 *    around 250ms, I think we'll set it a little
895 	 *    bit higher to account for fully loaded SCSI
896 	 *    bus's and slow devices that don't respond so
897 	 *    quickly to selection attempts. (yeah, I know
898 	 *    this is out of spec. but there is a lot of
899 	 *    buggy pieces of firmware out there so bite me)
900 	 *
901 	 * c) Imperical constants for synchronous offset
902 	 *    and transfer period register values
903 	 *
904 	 *    This entails the smallest and largest sync
905 	 *    period we could ever handle on this ESP.
906 	 */
907 
908 	fmhz = prom_getintdefault(prom_node, "clock-frequency", -1);
909 	if (fmhz == -1)
910 		fmhz = (!sbus_prom_node) ? 0 :
911 			prom_getintdefault(sbus_prom_node, "clock-frequency", -1);
912 
913 	if (fmhz <= (5000000))
914 		ccf = 0;
915 	else
916 		ccf = (((5000000 - 1) + (fmhz))/(5000000));
917 
918 	if (!ccf || ccf > 8) {
919 		/* If we can't find anything reasonable,
920 		 * just assume 20MHZ.  This is the clock
921 		 * frequency of the older sun4c's where I've
922 		 * been unable to find the clock-frequency
923 		 * PROM property.  All other machines provide
924 		 * useful values it seems.
925 		 */
926 		ccf = ESP_CCF_F4;
927 		fmhz = (20000000);
928 	}
929 
930 	if (ccf == (ESP_CCF_F7 + 1))
931 		esp->cfact = ESP_CCF_F0;
932 	else if (ccf == ESP_CCF_NEVER)
933 		esp->cfact = ESP_CCF_F2;
934 	else
935 		esp->cfact = ccf;
936 	esp->raw_cfact = ccf;
937 
938 	esp->cfreq = fmhz;
939 	esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
940 	esp->ctick = ESP_TICK(ccf, esp->ccycle);
941 	esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
942 	esp->sync_defp = SYNC_DEFP_SLOW;
943 
944 	printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ",
945 	       esp->scsi_id, (fmhz / 1000000),
946 	       (int)esp->ccycle, (int)ccf, (int) esp->neg_defp);
947 }
948 
esp_get_bursts(struct esp * esp,struct sbus_dev * dma)949 static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma)
950 {
951 	struct sbus_dev *sdev = esp->sdev;
952 	u8 bursts;
953 
954 	bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff);
955 
956 	if (dma) {
957 		u8 tmp = prom_getintdefault(dma->prom_node,
958 					    "burst-sizes", 0xff);
959 		if (tmp != 0xff)
960 			bursts &= tmp;
961 	}
962 
963 	if (sdev->bus) {
964 		u8 tmp = prom_getintdefault(sdev->bus->prom_node,
965 					    "burst-sizes", 0xff);
966 		if (tmp != 0xff)
967 			bursts &= tmp;
968 	}
969 
970 	if (bursts == 0xff ||
971 	    (bursts & DMA_BURST16) == 0 ||
972 	    (bursts & DMA_BURST32) == 0)
973 		bursts = (DMA_BURST32 - 1);
974 
975 	esp->bursts = bursts;
976 }
977 
esp_get_revision(struct esp * esp)978 static void __init esp_get_revision(struct esp *esp)
979 {
980 	u8 tmp;
981 
982 	esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
983 	esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
984 	sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
985 
986 	tmp = sbus_readb(esp->eregs + ESP_CFG2);
987 	tmp &= ~ESP_CONFIG2_MAGIC;
988 	if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
989 		/* If what we write to cfg2 does not come back, cfg2
990 		 * is not implemented, therefore this must be a plain
991 		 * esp100.
992 		 */
993 		esp->erev = esp100;
994 		printk("NCR53C90(esp100)\n");
995 	} else {
996 		esp->config2 = 0;
997 		esp->prev_cfg3 = esp->config3[0] = 5;
998 		sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
999 		sbus_writeb(0, esp->eregs + ESP_CFG3);
1000 		sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
1001 
1002 		tmp = sbus_readb(esp->eregs + ESP_CFG3);
1003 		if (tmp != 5) {
1004 			/* The cfg2 register is implemented, however
1005 			 * cfg3 is not, must be esp100a.
1006 			 */
1007 			esp->erev = esp100a;
1008 			printk("NCR53C90A(esp100a)\n");
1009 		} else {
1010 			int target;
1011 
1012 			for (target = 0; target < 16; target++)
1013 				esp->config3[target] = 0;
1014 			esp->prev_cfg3 = 0;
1015 			sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
1016 
1017 			/* All of cfg{1,2,3} implemented, must be one of
1018 			 * the fas variants, figure out which one.
1019 			 */
1020 			if (esp->raw_cfact > ESP_CCF_F5) {
1021 				esp->erev = fast;
1022 				esp->sync_defp = SYNC_DEFP_FAST;
1023 				printk("NCR53C9XF(espfast)\n");
1024 			} else {
1025 				esp->erev = esp236;
1026 				printk("NCR53C9x(esp236)\n");
1027 			}
1028 			esp->config2 = 0;
1029 			sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
1030 		}
1031 	}
1032 }
1033 
esp_init_swstate(struct esp * esp)1034 static void __init esp_init_swstate(struct esp *esp)
1035 {
1036 	int i;
1037 
1038 	/* Driver spinlock... */
1039 	spin_lock_init(&esp->lock);
1040 
1041 	/* Command queues... */
1042 	esp->current_SC = NULL;
1043 	esp->disconnected_SC = NULL;
1044 	esp->issue_SC = NULL;
1045 
1046 	/* Target and current command state... */
1047 	esp->targets_present = 0;
1048 	esp->resetting_bus = 0;
1049 	esp->snip = 0;
1050 
1051 	/* Debugging... */
1052 	for(i = 0; i < 32; i++)
1053 		esp->espcmdlog[i] = 0;
1054 	esp->espcmdent = 0;
1055 
1056 	/* MSG phase state... */
1057 	for(i = 0; i < 16; i++) {
1058 		esp->cur_msgout[i] = 0;
1059 		esp->cur_msgin[i] = 0;
1060 	}
1061 	esp->prevmsgout = esp->prevmsgin = 0;
1062 	esp->msgout_len = esp->msgin_len = 0;
1063 
1064 	/* Clear the one behind caches to hold unmatchable values. */
1065 	esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff;
1066 	esp->prev_hme_dmacsr = 0xffffffff;
1067 }
1068 
detect_one_esp(Scsi_Host_Template * tpnt,struct sbus_dev * esp_dev,struct sbus_dev * espdma,struct sbus_bus * sbus,int id,int hme)1069 static int __init detect_one_esp(Scsi_Host_Template *tpnt, struct sbus_dev *esp_dev,
1070 				 struct sbus_dev *espdma, struct sbus_bus *sbus,
1071 				 int id, int hme)
1072 {
1073 	struct Scsi_Host *esp_host = scsi_register(tpnt, sizeof(struct esp));
1074 	struct esp *esp;
1075 
1076 	if (!esp_host) {
1077 		printk("ESP: Cannot register SCSI host\n");
1078 		return -1;
1079 	}
1080 	if (hme)
1081 		esp_host->max_id = 16;
1082 	esp = (struct esp *) esp_host->hostdata;
1083 	esp->ehost = esp_host;
1084 	esp->sdev = esp_dev;
1085 	esp->esp_id = id;
1086 	esp->prom_node = esp_dev->prom_node;
1087 	prom_getstring(esp->prom_node, "name", esp->prom_name,
1088 		       sizeof(esp->prom_name));
1089 
1090 	esp_chain_add(esp);
1091 	if (esp_find_dvma(esp, espdma) < 0)
1092 		goto fail_unlink;
1093 	if (esp_map_regs(esp, hme) < 0) {
1094 		printk("ESP registers unmappable");
1095 		goto fail_dvma_release;
1096 	}
1097 	if (esp_map_cmdarea(esp) < 0) {
1098 		printk("ESP DVMA transport area unmappable");
1099 		goto fail_unmap_regs;
1100 	}
1101 	if (esp_register_irq(esp) < 0)
1102 		goto fail_unmap_cmdarea;
1103 
1104 	esp_get_scsi_id(esp);
1105 
1106 	esp->diff = prom_getbool(esp->prom_node, "differential");
1107 	if (esp->diff)
1108 		printk("Differential ");
1109 
1110 	esp_get_clock_params(esp);
1111 	esp_get_bursts(esp, espdma);
1112 	esp_get_revision(esp);
1113 	esp_init_swstate(esp);
1114 
1115 	esp_bootup_reset(esp);
1116 
1117 	return 0;
1118 
1119 fail_unmap_cmdarea:
1120 	sbus_free_consistent(esp->sdev, 16,
1121 			     (void *) esp->esp_command,
1122 			     esp->esp_command_dvma);
1123 
1124 fail_unmap_regs:
1125 	sbus_iounmap(esp->eregs, ESP_REG_SIZE);
1126 
1127 fail_dvma_release:
1128 	esp->dma->allocated = 0;
1129 
1130 fail_unlink:
1131 	esp_chain_del(esp);
1132 	scsi_unregister(esp_host);
1133 	return -1;
1134 }
1135 
1136 /* Detecting ESP chips on the machine.  This is the simple and easy
1137  * version.
1138  */
1139 
1140 #ifdef CONFIG_SUN4
1141 
1142 #include <asm/sun4paddr.h>
1143 
esp_detect(Scsi_Host_Template * tpnt)1144 int __init esp_detect(Scsi_Host_Template *tpnt)
1145 {
1146 	static struct sbus_dev esp_dev;
1147 	int esps_in_use = 0;
1148 
1149 	espchain = 0;
1150 
1151 	if (sun4_esp_physaddr) {
1152 		memset (&esp_dev, 0, sizeof(esp_dev));
1153 		esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr;
1154 		esp_dev.irqs[0] = 4;
1155 		esp_dev.resource[0].start = sun4_esp_physaddr;
1156 		esp_dev.resource[0].end = sun4_esp_physaddr + ESP_REG_SIZE - 1;
1157 		esp_dev.resource[0].flags = IORESOURCE_IO;
1158 
1159 		if (!detect_one_esp(tpnt, &esp_dev, NULL, NULL, 0, 0))
1160 			esps_in_use++;
1161 		printk("ESP: Total of 1 ESP hosts found, %d actually in use.\n", esps_in_use);
1162 		esps_running =  esps_in_use;
1163 	}
1164 	return esps_in_use;
1165 }
1166 
1167 #else /* !CONFIG_SUN4 */
1168 
esp_detect(Scsi_Host_Template * tpnt)1169 int __init esp_detect(Scsi_Host_Template *tpnt)
1170 {
1171 	struct sbus_bus *sbus;
1172 	struct sbus_dev *esp_dev, *sbdev_iter;
1173 	int nesps = 0, esps_in_use = 0;
1174 
1175 	espchain = 0;
1176 	if (!sbus_root) {
1177 #ifdef CONFIG_PCI
1178 		return 0;
1179 #else
1180 		panic("No SBUS in esp_detect()");
1181 #endif
1182 	}
1183 	for_each_sbus(sbus) {
1184 		for_each_sbusdev(sbdev_iter, sbus) {
1185 			struct sbus_dev *espdma = NULL;
1186 			int hme = 0;
1187 
1188 			/* Is it an esp sbus device? */
1189 			esp_dev = sbdev_iter;
1190 			if (strcmp(esp_dev->prom_name, "esp") &&
1191 			    strcmp(esp_dev->prom_name, "SUNW,esp")) {
1192 				if (!strcmp(esp_dev->prom_name, "SUNW,fas")) {
1193 					hme = 1;
1194 					espdma = esp_dev;
1195 				} else {
1196 					if (!esp_dev->child ||
1197 					    (strcmp(esp_dev->prom_name, "espdma") &&
1198 					     strcmp(esp_dev->prom_name, "dma")))
1199 						continue; /* nope... */
1200 					espdma = esp_dev;
1201 					esp_dev = esp_dev->child;
1202 					if (strcmp(esp_dev->prom_name, "esp") &&
1203 					    strcmp(esp_dev->prom_name, "SUNW,esp"))
1204 						continue; /* how can this happen? */
1205 				}
1206 			}
1207 
1208 			if (detect_one_esp(tpnt, esp_dev, espdma, sbus, nesps++, hme) < 0)
1209 				continue;
1210 
1211 			esps_in_use++;
1212 		} /* for each sbusdev */
1213 	} /* for each sbus */
1214 	printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
1215 	       esps_in_use);
1216 	esps_running = esps_in_use;
1217 	return esps_in_use;
1218 }
1219 
1220 #endif /* !CONFIG_SUN4 */
1221 
1222 /* The info function will return whatever useful
1223  * information the developer sees fit.  If not provided, then
1224  * the name field will be used instead.
1225  */
esp_info(struct Scsi_Host * host)1226 const char *esp_info(struct Scsi_Host *host)
1227 {
1228 	struct esp *esp;
1229 
1230 	esp = (struct esp *) host->hostdata;
1231 	switch (esp->erev) {
1232 	case esp100:
1233 		return "Sparc ESP100 (NCR53C90)";
1234 	case esp100a:
1235 		return "Sparc ESP100A (NCR53C90A)";
1236 	case esp236:
1237 		return "Sparc ESP236";
1238 	case fas236:
1239 		return "Sparc ESP236-FAST";
1240 	case fashme:
1241 		return "Sparc ESP366-HME";
1242 	case fas100a:
1243 		return "Sparc ESP100A-FAST";
1244 	default:
1245 		return "Bogon ESP revision";
1246 	};
1247 }
1248 
1249 /* From Wolfgang Stanglmeier's NCR scsi driver. */
1250 struct info_str
1251 {
1252 	char *buffer;
1253 	int length;
1254 	int offset;
1255 	int pos;
1256 };
1257 
copy_mem_info(struct info_str * info,char * data,int len)1258 static void copy_mem_info(struct info_str *info, char *data, int len)
1259 {
1260 	if (info->pos + len > info->length)
1261 		len = info->length - info->pos;
1262 
1263 	if (info->pos + len < info->offset) {
1264 		info->pos += len;
1265 		return;
1266 	}
1267 	if (info->pos < info->offset) {
1268 		data += (info->offset - info->pos);
1269 		len  -= (info->offset - info->pos);
1270 	}
1271 
1272 	if (len > 0) {
1273 		memcpy(info->buffer + info->pos, data, len);
1274 		info->pos += len;
1275 	}
1276 }
1277 
copy_info(struct info_str * info,char * fmt,...)1278 static int copy_info(struct info_str *info, char *fmt, ...)
1279 {
1280 	va_list args;
1281 	char buf[81];
1282 	int len;
1283 
1284 	va_start(args, fmt);
1285 	len = vsprintf(buf, fmt, args);
1286 	va_end(args);
1287 
1288 	copy_mem_info(info, buf, len);
1289 	return len;
1290 }
1291 
esp_host_info(struct esp * esp,char * ptr,off_t offset,int len)1292 static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len)
1293 {
1294 	struct info_str info;
1295 	int i;
1296 
1297 	info.buffer	= ptr;
1298 	info.length	= len;
1299 	info.offset	= offset;
1300 	info.pos	= 0;
1301 
1302 	copy_info(&info, "Sparc ESP Host Adapter:\n");
1303 	copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node);
1304 	copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name);
1305 	copy_info(&info, "\tESP Model\t\t");
1306 	switch (esp->erev) {
1307 	case esp100:
1308 		copy_info(&info, "ESP100\n");
1309 		break;
1310 	case esp100a:
1311 		copy_info(&info, "ESP100A\n");
1312 		break;
1313 	case esp236:
1314 		copy_info(&info, "ESP236\n");
1315 		break;
1316 	case fas236:
1317 		copy_info(&info, "FAS236\n");
1318 		break;
1319 	case fas100a:
1320 		copy_info(&info, "FAS100A\n");
1321 		break;
1322 	case fast:
1323 		copy_info(&info, "FAST\n");
1324 		break;
1325 	case fashme:
1326 		copy_info(&info, "Happy Meal FAS\n");
1327 		break;
1328 	case espunknown:
1329 	default:
1330 		copy_info(&info, "Unknown!\n");
1331 		break;
1332 	};
1333 	copy_info(&info, "\tDMA Revision\t\t");
1334 	switch (esp->dma->revision) {
1335 	case dvmarev0:
1336 		copy_info(&info, "Rev 0\n");
1337 		break;
1338 	case dvmaesc1:
1339 		copy_info(&info, "ESC Rev 1\n");
1340 		break;
1341 	case dvmarev1:
1342 		copy_info(&info, "Rev 1\n");
1343 		break;
1344 	case dvmarev2:
1345 		copy_info(&info, "Rev 2\n");
1346 		break;
1347 	case dvmarev3:
1348 		copy_info(&info, "Rev 3\n");
1349 		break;
1350 	case dvmarevplus:
1351 		copy_info(&info, "Rev 1+\n");
1352 		break;
1353 	case dvmahme:
1354 		copy_info(&info, "Rev HME/FAS\n");
1355 		break;
1356 	default:
1357 		copy_info(&info, "Unknown!\n");
1358 		break;
1359 	};
1360 	copy_info(&info, "\tLive Targets\t\t[ ");
1361 	for (i = 0; i < 15; i++) {
1362 		if (esp->targets_present & (1 << i))
1363 			copy_info(&info, "%d ", i);
1364 	}
1365 	copy_info(&info, "]\n\n");
1366 
1367 	/* Now describe the state of each existing target. */
1368 	copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
1369 	for (i = 0; i < 15; i++) {
1370 		if (esp->targets_present & (1 << i)) {
1371 			Scsi_Device *SDptr = esp->ehost->host_queue;
1372 
1373 			while ((SDptr->host != esp->ehost) &&
1374 			       (SDptr->id != i) &&
1375 			       (SDptr->next))
1376 				SDptr = SDptr->next;
1377 
1378 			copy_info(&info, "%d\t\t", i);
1379 			copy_info(&info, "%08lx\t", esp->config3[i]);
1380 			copy_info(&info, "[%02lx,%02lx]\t\t\t", SDptr->sync_max_offset,
1381 				  SDptr->sync_min_period);
1382 			copy_info(&info, "%s\t\t", SDptr->disconnect ? "yes" : "no");
1383 			copy_info(&info, "%s\n",
1384 				  (esp->config3[i] & ESP_CONFIG3_EWIDE) ? "yes" : "no");
1385 		}
1386 	}
1387 	return info.pos > info.offset? info.pos - info.offset : 0;
1388 }
1389 
1390 /* ESP proc filesystem code. */
esp_proc_info(char * buffer,char ** start,off_t offset,int length,int hostno,int inout)1391 int esp_proc_info(char *buffer, char **start, off_t offset, int length,
1392 		  int hostno, int inout)
1393 {
1394 	struct esp *esp;
1395 
1396 	if (inout)
1397 		return -EINVAL; /* not yet */
1398 
1399 	for_each_esp(esp) {
1400 		if (esp->ehost->host_no == hostno)
1401 			break;
1402 	}
1403 	if (!esp)
1404 		return -EINVAL;
1405 
1406 	if (start)
1407 		*start = buffer;
1408 
1409 	return esp_host_info(esp, buffer, offset, length);
1410 }
1411 
esp_get_dmabufs(struct esp * esp,Scsi_Cmnd * sp)1412 static void esp_get_dmabufs(struct esp *esp, Scsi_Cmnd *sp)
1413 {
1414 	if (sp->use_sg == 0) {
1415 		sp->SCp.this_residual = sp->request_bufflen;
1416 		sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
1417 		sp->SCp.buffers_residual = 0;
1418 		if (sp->request_bufflen) {
1419 			sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer,
1420 							       sp->SCp.this_residual,
1421 							       scsi_to_sbus_dma_dir(sp->sc_data_direction));
1422 			sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in);
1423 		} else {
1424 			sp->SCp.ptr = NULL;
1425 		}
1426 	} else {
1427 		sp->SCp.buffer = (struct scatterlist *) sp->buffer;
1428 		sp->SCp.buffers_residual = sbus_map_sg(esp->sdev,
1429 						       sp->SCp.buffer,
1430 						       sp->use_sg,
1431 						       scsi_to_sbus_dma_dir(sp->sc_data_direction));
1432 		sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
1433 		sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer));
1434 	}
1435 }
1436 
esp_release_dmabufs(struct esp * esp,Scsi_Cmnd * sp)1437 static void esp_release_dmabufs(struct esp *esp, Scsi_Cmnd *sp)
1438 {
1439 	if (sp->use_sg) {
1440 		sbus_unmap_sg(esp->sdev, sp->buffer, sp->use_sg,
1441 			      scsi_to_sbus_dma_dir(sp->sc_data_direction));
1442 	} else if (sp->request_bufflen) {
1443 		sbus_unmap_single(esp->sdev,
1444 				  sp->SCp.have_data_in,
1445 				  sp->request_bufflen,
1446 				  scsi_to_sbus_dma_dir(sp->sc_data_direction));
1447 	}
1448 }
1449 
esp_restore_pointers(struct esp * esp,Scsi_Cmnd * sp)1450 static void esp_restore_pointers(struct esp *esp, Scsi_Cmnd *sp)
1451 {
1452 	struct esp_pointers *ep = &esp->data_pointers[sp->target];
1453 
1454 	sp->SCp.ptr = ep->saved_ptr;
1455 	sp->SCp.buffer = ep->saved_buffer;
1456 	sp->SCp.this_residual = ep->saved_this_residual;
1457 	sp->SCp.buffers_residual = ep->saved_buffers_residual;
1458 }
1459 
esp_save_pointers(struct esp * esp,Scsi_Cmnd * sp)1460 static void esp_save_pointers(struct esp *esp, Scsi_Cmnd *sp)
1461 {
1462 	struct esp_pointers *ep = &esp->data_pointers[sp->target];
1463 
1464 	ep->saved_ptr = sp->SCp.ptr;
1465 	ep->saved_buffer = sp->SCp.buffer;
1466 	ep->saved_this_residual = sp->SCp.this_residual;
1467 	ep->saved_buffers_residual = sp->SCp.buffers_residual;
1468 }
1469 
1470 /* Some rules:
1471  *
1472  *   1) Never ever panic while something is live on the bus.
1473  *      If there is to be any chance of syncing the disks this
1474  *      rule is to be obeyed.
1475  *
1476  *   2) Any target that causes a foul condition will no longer
1477  *      have synchronous transfers done to it, no questions
1478  *      asked.
1479  *
1480  *   3) Keep register accesses to a minimum.  Think about some
1481  *      day when we have Xbus machines this is running on and
1482  *      the ESP chip is on the other end of the machine on a
1483  *      different board from the cpu where this is running.
1484  */
1485 
1486 /* Fire off a command.  We assume the bus is free and that the only
1487  * case where we could see an interrupt is where we have disconnected
1488  * commands active and they are trying to reselect us.
1489  */
esp_check_cmd(struct esp * esp,Scsi_Cmnd * sp)1490 static inline void esp_check_cmd(struct esp *esp, Scsi_Cmnd *sp)
1491 {
1492 	switch (sp->cmd_len) {
1493 	case 6:
1494 	case 10:
1495 	case 12:
1496 		esp->esp_slowcmd = 0;
1497 		break;
1498 
1499 	default:
1500 		esp->esp_slowcmd = 1;
1501 		esp->esp_scmdleft = sp->cmd_len;
1502 		esp->esp_scmdp = &sp->cmnd[0];
1503 		break;
1504 	};
1505 }
1506 
build_sync_nego_msg(struct esp * esp,int period,int offset)1507 static inline void build_sync_nego_msg(struct esp *esp, int period, int offset)
1508 {
1509 	esp->cur_msgout[0] = EXTENDED_MESSAGE;
1510 	esp->cur_msgout[1] = 3;
1511 	esp->cur_msgout[2] = EXTENDED_SDTR;
1512 	esp->cur_msgout[3] = period;
1513 	esp->cur_msgout[4] = offset;
1514 	esp->msgout_len = 5;
1515 }
1516 
1517 /* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
build_wide_nego_msg(struct esp * esp,int size)1518 static inline void build_wide_nego_msg(struct esp *esp, int size)
1519 {
1520 	esp->cur_msgout[0] = EXTENDED_MESSAGE;
1521 	esp->cur_msgout[1] = 2;
1522 	esp->cur_msgout[2] = EXTENDED_WDTR;
1523 	switch (size) {
1524 	case 32:
1525 		esp->cur_msgout[3] = 2;
1526 		break;
1527 	case 16:
1528 		esp->cur_msgout[3] = 1;
1529 		break;
1530 	case 8:
1531 	default:
1532 		esp->cur_msgout[3] = 0;
1533 		break;
1534 	};
1535 
1536 	esp->msgout_len = 4;
1537 }
1538 
esp_exec_cmd(struct esp * esp)1539 static void esp_exec_cmd(struct esp *esp)
1540 {
1541 	Scsi_Cmnd *SCptr;
1542 	Scsi_Device *SDptr;
1543 	volatile u8 *cmdp = esp->esp_command;
1544 	u8 the_esp_command;
1545 	int lun, target;
1546 	int i;
1547 
1548 	/* Hold off if we have disconnected commands and
1549 	 * an IRQ is showing...
1550 	 */
1551 	if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs))
1552 		return;
1553 
1554 	/* Grab first member of the issue queue. */
1555 	SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);
1556 
1557 	/* Safe to panic here because current_SC is null. */
1558 	if (!SCptr)
1559 		panic("esp: esp_exec_cmd and issue queue is NULL");
1560 
1561 	SDptr = SCptr->device;
1562 	lun = SCptr->lun;
1563 	target = SCptr->target;
1564 
1565 	esp->snip = 0;
1566 	esp->msgout_len = 0;
1567 
1568 	/* Send it out whole, or piece by piece?   The ESP
1569 	 * only knows how to automatically send out 6, 10,
1570 	 * and 12 byte commands.  I used to think that the
1571 	 * Linux SCSI code would never throw anything other
1572 	 * than that to us, but then again there is the
1573 	 * SCSI generic driver which can send us anything.
1574 	 */
1575 	esp_check_cmd(esp, SCptr);
1576 
1577 	/* If arbitration/selection is successful, the ESP will leave
1578 	 * ATN asserted, causing the target to go into message out
1579 	 * phase.  The ESP will feed the target the identify and then
1580 	 * the target can only legally go to one of command,
1581 	 * datain/out, status, or message in phase, or stay in message
1582 	 * out phase (should we be trying to send a sync negotiation
1583 	 * message after the identify).  It is not allowed to drop
1584 	 * BSY, but some buggy targets do and we check for this
1585 	 * condition in the selection complete code.  Most of the time
1586 	 * we'll make the command bytes available to the ESP and it
1587 	 * will not interrupt us until it finishes command phase, we
1588 	 * cannot do this for command sizes the ESP does not
1589 	 * understand and in this case we'll get interrupted right
1590 	 * when the target goes into command phase.
1591 	 *
1592 	 * It is absolutely _illegal_ in the presence of SCSI-2 devices
1593 	 * to use the ESP select w/o ATN command.  When SCSI-2 devices are
1594 	 * present on the bus we _must_ always go straight to message out
1595 	 * phase with an identify message for the target.  Being that
1596 	 * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
1597 	 * selections should not confuse SCSI-1 we hope.
1598 	 */
1599 
1600 	if (SDptr->sync) {
1601 		/* this targets sync is known */
1602 #ifndef __sparc_v9__
1603 do_sync_known:
1604 #endif
1605 		if (SDptr->disconnect)
1606 			*cmdp++ = IDENTIFY(1, lun);
1607 		else
1608 			*cmdp++ = IDENTIFY(0, lun);
1609 
1610 		if (esp->esp_slowcmd) {
1611 			the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1612 			esp_advance_phase(SCptr, in_slct_stop);
1613 		} else {
1614 			the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1615 			esp_advance_phase(SCptr, in_slct_norm);
1616 		}
1617 	} else if (!(esp->targets_present & (1<<target)) || !(SDptr->disconnect)) {
1618 		/* After the bootup SCSI code sends both the
1619 		 * TEST_UNIT_READY and INQUIRY commands we want
1620 		 * to at least attempt allowing the device to
1621 		 * disconnect.
1622 		 */
1623 		ESPMISC(("esp: Selecting device for first time. target=%d "
1624 			 "lun=%d\n", target, SCptr->lun));
1625 		if (!SDptr->borken && !SDptr->disconnect)
1626 			SDptr->disconnect = 1;
1627 
1628 		*cmdp++ = IDENTIFY(0, lun);
1629 		esp->prevmsgout = NOP;
1630 		esp_advance_phase(SCptr, in_slct_norm);
1631 		the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
1632 
1633 		/* Take no chances... */
1634 		SDptr->sync_max_offset = 0;
1635 		SDptr->sync_min_period = 0;
1636 	} else {
1637 		/* Sorry, I have had way too many problems with
1638 		 * various CDROM devices on ESP. -DaveM
1639 		 */
1640 		int cdrom_hwbug_wkaround = 0;
1641 
1642 #ifndef __sparc_v9__
1643 		/* Never allow disconnects or synchronous transfers on
1644 		 * SparcStation1 and SparcStation1+.  Allowing those
1645 		 * to be enabled seems to lockup the machine completely.
1646 		 */
1647 		if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) ||
1648 		    (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {
1649 			/* But we are nice and allow tapes and removable
1650 			 * disks (but not CDROMs) to disconnect.
1651 			 */
1652 			if(SDptr->type == TYPE_TAPE ||
1653 			   (SDptr->type != TYPE_ROM && SDptr->removable))
1654 				SDptr->disconnect = 1;
1655 			else
1656 				SDptr->disconnect = 0;
1657 			SDptr->sync_max_offset = 0;
1658 			SDptr->sync_min_period = 0;
1659 			SDptr->sync = 1;
1660 			esp->snip = 0;
1661 			goto do_sync_known;
1662 		}
1663 #endif /* !(__sparc_v9__) */
1664 
1665 		/* We've talked to this guy before,
1666 		 * but never negotiated.  Let's try,
1667 		 * need to attempt WIDE first, before
1668 		 * sync nego, as per SCSI 2 standard.
1669 		 */
1670 		if (esp->erev == fashme && !SDptr->wide) {
1671 			if (!SDptr->borken &&
1672 			   SDptr->type != TYPE_ROM &&
1673 			   SDptr->removable == 0) {
1674 				build_wide_nego_msg(esp, 16);
1675 				SDptr->wide = 1;
1676 				esp->wnip = 1;
1677 				goto after_nego_msg_built;
1678 			} else {
1679 				SDptr->wide = 1;
1680 				/* Fall through and try sync. */
1681 			}
1682 		}
1683 
1684 		if (!SDptr->borken) {
1685 			if ((SDptr->type == TYPE_ROM)) {
1686 				/* Nice try sucker... */
1687 				ESPMISC(("esp%d: Disabling sync for buggy "
1688 					 "CDROM.\n", esp->esp_id));
1689 				cdrom_hwbug_wkaround = 1;
1690 				build_sync_nego_msg(esp, 0, 0);
1691 			} else if (SDptr->removable != 0) {
1692 				ESPMISC(("esp%d: Not negotiating sync/wide but "
1693 					 "allowing disconnect for removable media.\n",
1694 					 esp->esp_id));
1695 				build_sync_nego_msg(esp, 0, 0);
1696 			} else {
1697 				build_sync_nego_msg(esp, esp->sync_defp, 15);
1698 			}
1699 		} else {
1700 			build_sync_nego_msg(esp, 0, 0);
1701 		}
1702 		SDptr->sync = 1;
1703 		esp->snip = 1;
1704 
1705 after_nego_msg_built:
1706 		/* A fix for broken SCSI1 targets, when they disconnect
1707 		 * they lock up the bus and confuse ESP.  So disallow
1708 		 * disconnects for SCSI1 targets for now until we
1709 		 * find a better fix.
1710 		 *
1711 		 * Addendum: This is funny, I figured out what was going
1712 		 *           on.  The blotzed SCSI1 target would disconnect,
1713 		 *           one of the other SCSI2 targets or both would be
1714 		 *           disconnected as well.  The SCSI1 target would
1715 		 *           stay disconnected long enough that we start
1716 		 *           up a command on one of the SCSI2 targets.  As
1717 		 *           the ESP is arbitrating for the bus the SCSI1
1718 		 *           target begins to arbitrate as well to reselect
1719 		 *           the ESP.  The SCSI1 target refuses to drop it's
1720 		 *           ID bit on the data bus even though the ESP is
1721 		 *           at ID 7 and is the obvious winner for any
1722 		 *           arbitration.  The ESP is a poor sport and refuses
1723 		 *           to lose arbitration, it will continue indefinately
1724 		 *           trying to arbitrate for the bus and can only be
1725 		 *           stopped via a chip reset or SCSI bus reset.
1726 		 *           Therefore _no_ disconnects for SCSI1 targets
1727 		 *           thank you very much. ;-)
1728 		 */
1729 		if(((SDptr->scsi_level < 3) &&
1730 		    (SDptr->type != TYPE_TAPE) &&
1731 		    SDptr->removable == 0) ||
1732 		    cdrom_hwbug_wkaround || SDptr->borken) {
1733 			ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
1734 				 "lun %d\n", esp->esp_id, SCptr->target, SCptr->lun));
1735 			SDptr->disconnect = 0;
1736 			*cmdp++ = IDENTIFY(0, lun);
1737 		} else {
1738 			*cmdp++ = IDENTIFY(1, lun);
1739 		}
1740 
1741 		/* ESP fifo is only so big...
1742 		 * Make this look like a slow command.
1743 		 */
1744 		esp->esp_slowcmd = 1;
1745 		esp->esp_scmdleft = SCptr->cmd_len;
1746 		esp->esp_scmdp = &SCptr->cmnd[0];
1747 
1748 		the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
1749 		esp_advance_phase(SCptr, in_slct_msg);
1750 	}
1751 
1752 	if (!esp->esp_slowcmd)
1753 		for (i = 0; i < SCptr->cmd_len; i++)
1754 			*cmdp++ = SCptr->cmnd[i];
1755 
1756 	/* HME sucks... */
1757 	if (esp->erev == fashme)
1758 		sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT),
1759 			    esp->eregs + ESP_BUSID);
1760 	else
1761 		sbus_writeb(target & 7, esp->eregs + ESP_BUSID);
1762 	if (esp->prev_soff != SDptr->sync_max_offset ||
1763 	    esp->prev_stp  != SDptr->sync_min_period ||
1764 	    (esp->erev > esp100a &&
1765 	     esp->prev_cfg3 != esp->config3[target])) {
1766 		esp->prev_soff = SDptr->sync_max_offset;
1767 		esp->prev_stp = SDptr->sync_min_period;
1768 		sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
1769 		sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
1770 		if (esp->erev > esp100a) {
1771 			esp->prev_cfg3 = esp->config3[target];
1772 			sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
1773 		}
1774 	}
1775 	i = (cmdp - esp->esp_command);
1776 
1777 	if (esp->erev == fashme) {
1778 		esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */
1779 
1780 		/* Set up the DMA and HME counters */
1781 		sbus_writeb(i, esp->eregs + ESP_TCLOW);
1782 		sbus_writeb(0, esp->eregs + ESP_TCMED);
1783 		sbus_writeb(0, esp->eregs + FAS_RLO);
1784 		sbus_writeb(0, esp->eregs + FAS_RHI);
1785 		esp_cmd(esp, the_esp_command);
1786 
1787 		/* Talk about touchy hardware... */
1788 		esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
1789 					 (DMA_SCSI_DISAB | DMA_ENABLE)) &
1790 					~(DMA_ST_WRITE));
1791 		sbus_writel(16, esp->dregs + DMA_COUNT);
1792 		sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
1793 		sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
1794 	} else {
1795 		u32 tmp;
1796 
1797 		/* Set up the DMA and ESP counters */
1798 		sbus_writeb(i, esp->eregs + ESP_TCLOW);
1799 		sbus_writeb(0, esp->eregs + ESP_TCMED);
1800 		tmp = sbus_readl(esp->dregs + DMA_CSR);
1801 		tmp &= ~DMA_ST_WRITE;
1802 		tmp |= DMA_ENABLE;
1803 		sbus_writel(tmp, esp->dregs + DMA_CSR);
1804 		if (esp->dma->revision == dvmaesc1) {
1805 			if (i) /* Workaround ESC gate array SBUS rerun bug. */
1806 				sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT);
1807 		}
1808 		sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
1809 
1810 		/* Tell ESP to "go". */
1811 		esp_cmd(esp, the_esp_command);
1812 	}
1813 }
1814 
1815 /* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
esp_queue(Scsi_Cmnd * SCpnt,void (* done)(Scsi_Cmnd *))1816 int esp_queue(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
1817 {
1818 	struct esp *esp;
1819 	unsigned long flags;
1820 
1821 	/* Set up func ptr and initial driver cmd-phase. */
1822 	SCpnt->scsi_done = done;
1823 	SCpnt->SCp.phase = not_issued;
1824 
1825 	/* We use the scratch area. */
1826 	ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->target, SCpnt->lun));
1827 	ESPDISC(("N<%02x,%02x>", SCpnt->target, SCpnt->lun));
1828 
1829 	esp = (struct esp *) SCpnt->host->hostdata;
1830 	esp_get_dmabufs(esp, SCpnt);
1831 	esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */
1832 
1833 	SCpnt->SCp.Status           = CHECK_CONDITION;
1834 	SCpnt->SCp.Message          = 0xff;
1835 	SCpnt->SCp.sent_command     = 0;
1836 
1837 	spin_lock_irqsave(&esp->lock, flags);
1838 
1839 	/* Place into our queue. */
1840 	if (SCpnt->cmnd[0] == REQUEST_SENSE) {
1841 		ESPQUEUE(("RQSENSE\n"));
1842 		prepend_SC(&esp->issue_SC, SCpnt);
1843 	} else {
1844 		ESPQUEUE(("\n"));
1845 		append_SC(&esp->issue_SC, SCpnt);
1846 	}
1847 
1848 	/* Run it now if we can. */
1849 	if (!esp->current_SC && !esp->resetting_bus)
1850 		esp_exec_cmd(esp);
1851 
1852 	spin_unlock_irqrestore(&esp->lock, flags);
1853 
1854 	return 0;
1855 }
1856 
1857 /* Only queuing supported in this ESP driver. */
esp_command(Scsi_Cmnd * SCpnt)1858 int esp_command(Scsi_Cmnd *SCpnt)
1859 {
1860 	struct esp *esp = (struct esp *) SCpnt->host->hostdata;
1861 
1862 	ESPLOG(("esp%d: esp_command() called...\n", esp->esp_id));
1863 	return -1;
1864 }
1865 
1866 /* Dump driver state. */
esp_dump_cmd(Scsi_Cmnd * SCptr)1867 static void esp_dump_cmd(Scsi_Cmnd *SCptr)
1868 {
1869 	ESPLOG(("[tgt<%02x> lun<%02x> "
1870 		"pphase<%s> cphase<%s>]",
1871 		SCptr->target, SCptr->lun,
1872 		phase_string(SCptr->SCp.sent_command),
1873 		phase_string(SCptr->SCp.phase)));
1874 }
1875 
esp_dump_state(struct esp * esp)1876 static void esp_dump_state(struct esp *esp)
1877 {
1878 	Scsi_Cmnd *SCptr = esp->current_SC;
1879 #ifdef DEBUG_ESP_CMDS
1880 	int i;
1881 #endif
1882 
1883 	ESPLOG(("esp%d: dumping state\n", esp->esp_id));
1884 	ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
1885 		esp->esp_id,
1886 		sbus_readl(esp->dregs + DMA_CSR),
1887 		sbus_readl(esp->dregs + DMA_ADDR)));
1888 	ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1889 		esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
1890 	ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
1891 		esp->esp_id,
1892 		sbus_readb(esp->eregs + ESP_STATUS),
1893 		sbus_readb(esp->eregs + ESP_SSTEP),
1894 		sbus_readb(esp->eregs + ESP_INTRPT)));
1895 #ifdef DEBUG_ESP_CMDS
1896 	printk("esp%d: last ESP cmds [", esp->esp_id);
1897 	i = (esp->espcmdent - 1) & 31;
1898 	printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1899 	i = (i - 1) & 31;
1900 	printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1901 	i = (i - 1) & 31;
1902 	printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1903 	i = (i - 1) & 31;
1904 	printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
1905 	printk("]\n");
1906 #endif /* (DEBUG_ESP_CMDS) */
1907 
1908 	if (SCptr) {
1909 		ESPLOG(("esp%d: current command ", esp->esp_id));
1910 		esp_dump_cmd(SCptr);
1911 	}
1912 	ESPLOG(("\n"));
1913 	SCptr = esp->disconnected_SC;
1914 	ESPLOG(("esp%d: disconnected ", esp->esp_id));
1915 	while (SCptr) {
1916 		esp_dump_cmd(SCptr);
1917 		SCptr = (Scsi_Cmnd *) SCptr->host_scribble;
1918 	}
1919 	ESPLOG(("\n"));
1920 }
1921 
1922 /* Abort a command. */
esp_abort(Scsi_Cmnd * SCptr)1923 int esp_abort(Scsi_Cmnd *SCptr)
1924 {
1925 	struct esp *esp = (struct esp *) SCptr->host->hostdata;
1926 	unsigned long flags;
1927 	int don;
1928 
1929 	spin_lock_irqsave(&esp->lock, flags);
1930 
1931 	ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
1932 	esp_dump_state(esp);
1933 
1934 	/* Wheee, if this is the current command on the bus, the
1935 	 * best we can do is assert ATN and wait for msgout phase.
1936 	 * This should even fix a hung SCSI bus when we lose state
1937 	 * in the driver and timeout because the eventual phase change
1938 	 * will cause the ESP to (eventually) give an interrupt.
1939 	 */
1940 	if (esp->current_SC == SCptr) {
1941 		esp->cur_msgout[0] = ABORT;
1942 		esp->msgout_len = 1;
1943 		esp->msgout_ctr = 0;
1944 		esp_cmd(esp, ESP_CMD_SATN);
1945 		spin_unlock_irqrestore(&esp->lock, flags);
1946 		return SCSI_ABORT_PENDING;
1947 	}
1948 
1949 	/* If it is still in the issue queue then we can safely
1950 	 * call the completion routine and report abort success.
1951 	 */
1952 	don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB);
1953 	if (don) {
1954 		ESP_INTSOFF(esp->dregs);
1955 	}
1956 	if (esp->issue_SC) {
1957 		Scsi_Cmnd **prev, *this;
1958 		for (prev = (&esp->issue_SC), this = esp->issue_SC;
1959 		     this != NULL;
1960 		     prev = (Scsi_Cmnd **) &(this->host_scribble),
1961 			     this = (Scsi_Cmnd *) this->host_scribble) {
1962 
1963 			if (this == SCptr) {
1964 				*prev = (Scsi_Cmnd *) this->host_scribble;
1965 				this->host_scribble = NULL;
1966 
1967 				spin_unlock_irqrestore(&esp->lock, flags);
1968 
1969 				esp_release_dmabufs(esp, this);
1970 				this->result = DID_ABORT << 16;
1971 				this->scsi_done(this);
1972 				if (don)
1973 					ESP_INTSON(esp->dregs);
1974 
1975 				return SCSI_ABORT_SUCCESS;
1976 			}
1977 		}
1978 	}
1979 
1980 	/* Yuck, the command to abort is disconnected, it is not
1981 	 * worth trying to abort it now if something else is live
1982 	 * on the bus at this time.  So, we let the SCSI code wait
1983 	 * a little bit and try again later.
1984 	 */
1985 	if (esp->current_SC) {
1986 		if (don)
1987 			ESP_INTSON(esp->dregs);
1988 		spin_unlock_irqrestore(&esp->lock, flags);
1989 		return SCSI_ABORT_BUSY;
1990 	}
1991 
1992 	/* It's disconnected, we have to reconnect to re-establish
1993 	 * the nexus and tell the device to abort.  However, we really
1994 	 * cannot 'reconnect' per se, therefore we tell the upper layer
1995 	 * the safest thing we can.  This is, wait a bit, if nothing
1996 	 * happens, we are really hung so reset the bus.
1997 	 */
1998 
1999 	if (don)
2000 		ESP_INTSON(esp->dregs);
2001 	spin_unlock_irqrestore(&esp->lock, flags);
2002 	return SCSI_ABORT_SNOOZE;
2003 }
2004 
2005 /* We've sent ESP_CMD_RS to the ESP, the interrupt had just
2006  * arrived indicating the end of the SCSI bus reset.  Our job
2007  * is to clean out the command queues and begin re-execution
2008  * of SCSI commands once more.
2009  */
esp_finish_reset(struct esp * esp)2010 static int esp_finish_reset(struct esp *esp)
2011 {
2012 	Scsi_Cmnd *sp = esp->current_SC;
2013 
2014 	/* Clean up currently executing command, if any. */
2015 	if (sp != NULL) {
2016 		esp->current_SC = NULL;
2017 		spin_unlock(&esp->lock);
2018 
2019 		esp_release_dmabufs(esp, sp);
2020 		sp->result = (DID_RESET << 16);
2021 
2022 		spin_lock(&io_request_lock);
2023 		sp->scsi_done(sp);
2024 		spin_unlock(&io_request_lock);
2025 
2026 		spin_lock(&esp->lock);
2027 	}
2028 
2029 	/* Clean up disconnected queue, they have been invalidated
2030 	 * by the bus reset.
2031 	 */
2032 	if (esp->disconnected_SC) {
2033 		while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) {
2034 			spin_unlock(&esp->lock);
2035 
2036 			esp_release_dmabufs(esp, sp);
2037 			sp->result = (DID_RESET << 16);
2038 
2039 			spin_lock(&io_request_lock);
2040 			sp->scsi_done(sp);
2041 			spin_unlock(&io_request_lock);
2042 
2043 			spin_lock(&esp->lock);
2044 		}
2045 	}
2046 
2047 	/* SCSI bus reset is complete. */
2048 	esp->resetting_bus = 0;
2049 
2050 	/* Ok, now it is safe to get commands going once more. */
2051 	if (esp->issue_SC)
2052 		esp_exec_cmd(esp);
2053 
2054 	return do_intr_end;
2055 }
2056 
esp_do_resetbus(struct esp * esp)2057 static int esp_do_resetbus(struct esp *esp)
2058 {
2059 	ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
2060 	esp->resetting_bus = 1;
2061 	esp_cmd(esp, ESP_CMD_RS);
2062 
2063 	return do_intr_end;
2064 }
2065 
2066 /* Reset ESP chip, reset hanging bus, then kill active and
2067  * disconnected commands for targets without soft reset.
2068  */
esp_reset(Scsi_Cmnd * SCptr,unsigned int how)2069 int esp_reset(Scsi_Cmnd *SCptr, unsigned int how)
2070 {
2071 	struct esp *esp = (struct esp *) SCptr->host->hostdata;
2072 	unsigned long flags;
2073 
2074 	spin_lock_irqsave(&esp->lock, flags);
2075 	(void) esp_do_resetbus(esp);
2076 	spin_unlock_irqrestore(&esp->lock, flags);
2077 
2078 	return SCSI_RESET_PENDING;
2079 }
2080 
2081 /* Internal ESP done function. */
esp_done(struct esp * esp,int error)2082 static void esp_done(struct esp *esp, int error)
2083 {
2084 	Scsi_Cmnd *done_SC = esp->current_SC;
2085 
2086 	esp->current_SC = NULL;
2087 
2088 	spin_unlock(&esp->lock);
2089 	esp_release_dmabufs(esp, done_SC);
2090 	done_SC->result = error;
2091 
2092 	spin_lock(&io_request_lock);
2093 	done_SC->scsi_done(done_SC);
2094 	spin_unlock(&io_request_lock);
2095 
2096 	/* Bus is free, issue any commands in the queue. */
2097 	spin_lock(&esp->lock);
2098 	if (esp->issue_SC && !esp->current_SC)
2099 		esp_exec_cmd(esp);
2100 
2101 }
2102 
2103 /* Wheee, ESP interrupt engine. */
2104 
2105 /* Forward declarations. */
2106 static int esp_do_phase_determine(struct esp *esp);
2107 static int esp_do_data_finale(struct esp *esp);
2108 static int esp_select_complete(struct esp *esp);
2109 static int esp_do_status(struct esp *esp);
2110 static int esp_do_msgin(struct esp *esp);
2111 static int esp_do_msgindone(struct esp *esp);
2112 static int esp_do_msgout(struct esp *esp);
2113 static int esp_do_cmdbegin(struct esp *esp);
2114 
2115 #define sreg_datainp(__sreg)  (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
2116 #define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
2117 
2118 /* Read any bytes found in the FAS366 fifo, storing them into
2119  * the ESP driver software state structure.
2120  */
hme_fifo_read(struct esp * esp)2121 static void hme_fifo_read(struct esp *esp)
2122 {
2123 	u8 count = 0;
2124 	u8 status = esp->sreg;
2125 
2126 	/* Cannot safely frob the fifo for these following cases, but
2127 	 * we must always read the fifo when the reselect interrupt
2128 	 * is pending.
2129 	 */
2130 	if (((esp->ireg & ESP_INTR_RSEL) == 0)	&&
2131 	    (sreg_datainp(status)		||
2132 	     sreg_dataoutp(status)		||
2133 	     (esp->current_SC &&
2134 	      esp->current_SC->SCp.phase == in_data_done))) {
2135 		ESPHME(("<wkaround_skipped>"));
2136 	} else {
2137 		unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES;
2138 
2139 		/* The HME stores bytes in multiples of 2 in the fifo. */
2140 		ESPHME(("hme_fifo[fcnt=%d", (int)fcnt));
2141 		while (fcnt) {
2142 			esp->hme_fifo_workaround_buffer[count++] =
2143 				sbus_readb(esp->eregs + ESP_FDATA);
2144 			esp->hme_fifo_workaround_buffer[count++] =
2145 				sbus_readb(esp->eregs + ESP_FDATA);
2146 			ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1]));
2147 			fcnt--;
2148 		}
2149 		if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) {
2150 			ESPHME(("<poke_byte>"));
2151 			sbus_writeb(0, esp->eregs + ESP_FDATA);
2152 			esp->hme_fifo_workaround_buffer[count++] =
2153 				sbus_readb(esp->eregs + ESP_FDATA);
2154 			ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1]));
2155 			ESPHME(("CMD_FLUSH"));
2156 			esp_cmd(esp, ESP_CMD_FLUSH);
2157 		} else {
2158 			ESPHME(("no_xtra_byte"));
2159 		}
2160 	}
2161 	ESPHME(("wkarnd_cnt=%d]", (int)count));
2162 	esp->hme_fifo_workaround_count = count;
2163 }
2164 
hme_fifo_push(struct esp * esp,u8 * bytes,u8 count)2165 static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count)
2166 {
2167 	esp_cmd(esp, ESP_CMD_FLUSH);
2168 	while (count) {
2169 		u8 tmp = *bytes++;
2170 		sbus_writeb(tmp, esp->eregs + ESP_FDATA);
2171 		sbus_writeb(0, esp->eregs + ESP_FDATA);
2172 		count--;
2173 	}
2174 }
2175 
2176 /* We try to avoid some interrupts by jumping ahead and see if the ESP
2177  * has gotten far enough yet.  Hence the following.
2178  */
skipahead1(struct esp * esp,Scsi_Cmnd * scp,int prev_phase,int new_phase)2179 static inline int skipahead1(struct esp *esp, Scsi_Cmnd *scp,
2180 			     int prev_phase, int new_phase)
2181 {
2182 	if (scp->SCp.sent_command != prev_phase)
2183 		return 0;
2184 	if (ESP_IRQ_P(esp->dregs)) {
2185 		/* Yes, we are able to save an interrupt. */
2186 		if (esp->erev == fashme)
2187 			esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
2188 		esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
2189 		esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
2190 		if (esp->erev == fashme) {
2191 			/* This chip is really losing. */
2192 			ESPHME(("HME["));
2193 			/* Must latch fifo before reading the interrupt
2194 			 * register else garbage ends up in the FIFO
2195 			 * which confuses the driver utterly.
2196 			 * Happy Meal indeed....
2197 			 */
2198 			ESPHME(("fifo_workaround]"));
2199 			if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2200 			    (esp->sreg2 & ESP_STAT2_F1BYTE))
2201 				hme_fifo_read(esp);
2202 		}
2203 		if (!(esp->ireg & ESP_INTR_SR))
2204 			return 0;
2205 		else
2206 			return do_reset_complete;
2207 	}
2208 	/* Ho hum, target is taking forever... */
2209 	scp->SCp.sent_command = new_phase; /* so we don't recurse... */
2210 	return do_intr_end;
2211 }
2212 
skipahead2(struct esp * esp,Scsi_Cmnd * scp,int prev_phase1,int prev_phase2,int new_phase)2213 static inline int skipahead2(struct esp *esp, Scsi_Cmnd *scp,
2214 			     int prev_phase1, int prev_phase2, int new_phase)
2215 {
2216 	if (scp->SCp.sent_command != prev_phase1 &&
2217 	    scp->SCp.sent_command != prev_phase2)
2218 		return 0;
2219 	if (ESP_IRQ_P(esp->dregs)) {
2220 		/* Yes, we are able to save an interrupt. */
2221 		if (esp->erev == fashme)
2222 			esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
2223 		esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
2224 		esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
2225 		if (esp->erev == fashme) {
2226 			/* This chip is really losing. */
2227 			ESPHME(("HME["));
2228 
2229 			/* Must latch fifo before reading the interrupt
2230 			 * register else garbage ends up in the FIFO
2231 			 * which confuses the driver utterly.
2232 			 * Happy Meal indeed....
2233 			 */
2234 			ESPHME(("fifo_workaround]"));
2235 			if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2236 			    (esp->sreg2 & ESP_STAT2_F1BYTE))
2237 				hme_fifo_read(esp);
2238 		}
2239 		if (!(esp->ireg & ESP_INTR_SR))
2240 			return 0;
2241 		else
2242 			return do_reset_complete;
2243 	}
2244 	/* Ho hum, target is taking forever... */
2245 	scp->SCp.sent_command = new_phase; /* so we don't recurse... */
2246 	return do_intr_end;
2247 }
2248 
2249 /* Now some dma helpers. */
dma_setup(struct esp * esp,__u32 addr,int count,int write)2250 static void dma_setup(struct esp *esp, __u32 addr, int count, int write)
2251 {
2252 	u32 nreg = sbus_readl(esp->dregs + DMA_CSR);
2253 
2254 	if (write)
2255 		nreg |= DMA_ST_WRITE;
2256 	else
2257 		nreg &= ~(DMA_ST_WRITE);
2258 	nreg |= DMA_ENABLE;
2259 	sbus_writel(nreg, esp->dregs + DMA_CSR);
2260 	if (esp->dma->revision == dvmaesc1) {
2261 		/* This ESC gate array sucks! */
2262 		__u32 src = addr;
2263 		__u32 dest = src + count;
2264 
2265 		if (dest & (PAGE_SIZE - 1))
2266 			count = PAGE_ALIGN(count);
2267 		sbus_writel(count, esp->dregs + DMA_COUNT);
2268 	}
2269 	sbus_writel(addr, esp->dregs + DMA_ADDR);
2270 }
2271 
dma_drain(struct esp * esp)2272 static void dma_drain(struct esp *esp)
2273 {
2274 	u32 tmp;
2275 
2276 	if (esp->dma->revision == dvmahme)
2277 		return;
2278 	if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) {
2279 		switch (esp->dma->revision) {
2280 		default:
2281 			tmp |= DMA_FIFO_STDRAIN;
2282 			sbus_writel(tmp, esp->dregs + DMA_CSR);
2283 
2284 		case dvmarev3:
2285 		case dvmaesc1:
2286 			while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
2287 				udelay(1);
2288 		};
2289 	}
2290 }
2291 
dma_invalidate(struct esp * esp)2292 static void dma_invalidate(struct esp *esp)
2293 {
2294 	u32 tmp;
2295 
2296 	if (esp->dma->revision == dvmahme) {
2297 		sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
2298 
2299 		esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
2300 					 (DMA_PARITY_OFF | DMA_2CLKS |
2301 					  DMA_SCSI_DISAB | DMA_INT_ENAB)) &
2302 					~(DMA_ST_WRITE | DMA_ENABLE));
2303 
2304 		sbus_writel(0, esp->dregs + DMA_CSR);
2305 		sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
2306 
2307 		/* This is necessary to avoid having the SCSI channel
2308 		 * engine lock up on us.
2309 		 */
2310 		sbus_writel(0, esp->dregs + DMA_ADDR);
2311 	} else {
2312 		while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
2313 			udelay(1);
2314 
2315 		tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
2316 		tmp |= DMA_FIFO_INV;
2317 		sbus_writel(tmp, esp->dregs + DMA_CSR);
2318 		tmp &= ~DMA_FIFO_INV;
2319 		sbus_writel(tmp, esp->dregs + DMA_CSR);
2320 	}
2321 }
2322 
dma_flashclear(struct esp * esp)2323 static inline void dma_flashclear(struct esp *esp)
2324 {
2325 	dma_drain(esp);
2326 	dma_invalidate(esp);
2327 }
2328 
dma_can_transfer(struct esp * esp,Scsi_Cmnd * sp)2329 static int dma_can_transfer(struct esp *esp, Scsi_Cmnd *sp)
2330 {
2331 	__u32 base, end, sz;
2332 
2333 	if (esp->dma->revision == dvmarev3) {
2334 		sz = sp->SCp.this_residual;
2335 		if (sz > 0x1000000)
2336 			sz = 0x1000000;
2337 	} else {
2338 		base = ((__u32)((unsigned long)sp->SCp.ptr));
2339 		base &= (0x1000000 - 1);
2340 		end = (base + sp->SCp.this_residual);
2341 		if (end > 0x1000000)
2342 			end = 0x1000000;
2343 		sz = (end - base);
2344 	}
2345 	return sz;
2346 }
2347 
2348 /* Misc. esp helper macros. */
2349 #define esp_setcount(__eregs, __cnt, __hme) \
2350 	sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \
2351 	sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \
2352 	if (__hme) { \
2353 		sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \
2354 		sbus_writeb(0, (__eregs) + FAS_RHI); \
2355 	}
2356 
2357 #define esp_getcount(__eregs, __hme) \
2358 	((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \
2359 	 ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \
2360          ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0))
2361 
2362 #define fcount(__esp) \
2363 	(((__esp)->erev == fashme) ? \
2364 	  (__esp)->hme_fifo_workaround_count : \
2365 	  sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES)
2366 
2367 #define fnzero(__esp) \
2368 	(((__esp)->erev == fashme) ? 0 : \
2369 	 sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO)
2370 
2371 /* XXX speculative nops unnecessary when continuing amidst a data phase
2372  * XXX even on esp100!!!  another case of flooding the bus with I/O reg
2373  * XXX writes...
2374  */
2375 #define esp_maybe_nop(__esp) \
2376 	if ((__esp)->erev == esp100) \
2377 		esp_cmd((__esp), ESP_CMD_NULL)
2378 
2379 #define sreg_to_dataphase(__sreg) \
2380 	((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
2381 
2382 /* The ESP100 when in synchronous data phase, can mistake a long final
2383  * REQ pulse from the target as an extra byte, it places whatever is on
2384  * the data lines into the fifo.  For now, we will assume when this
2385  * happens that the target is a bit quirky and we don't want to
2386  * be talking synchronously to it anyways.  Regardless, we need to
2387  * tell the ESP to eat the extraneous byte so that we can proceed
2388  * to the next phase.
2389  */
esp100_sync_hwbug(struct esp * esp,Scsi_Cmnd * sp,int fifocnt)2390 static int esp100_sync_hwbug(struct esp *esp, Scsi_Cmnd *sp, int fifocnt)
2391 {
2392 	/* Do not touch this piece of code. */
2393 	if ((!(esp->erev == esp100)) ||
2394 	    (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) &&
2395 	       !fifocnt) &&
2396 	     !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) {
2397 		if (sp->SCp.phase == in_dataout)
2398 			esp_cmd(esp, ESP_CMD_FLUSH);
2399 		return 0;
2400 	} else {
2401 		/* Async mode for this guy. */
2402 		build_sync_nego_msg(esp, 0, 0);
2403 
2404 		/* Ack the bogus byte, but set ATN first. */
2405 		esp_cmd(esp, ESP_CMD_SATN);
2406 		esp_cmd(esp, ESP_CMD_MOK);
2407 		return 1;
2408 	}
2409 }
2410 
2411 /* This closes the window during a selection with a reselect pending, because
2412  * we use DMA for the selection process the FIFO should hold the correct
2413  * contents if we get reselected during this process.  So we just need to
2414  * ack the possible illegal cmd interrupt pending on the esp100.
2415  */
esp100_reconnect_hwbug(struct esp * esp)2416 static inline int esp100_reconnect_hwbug(struct esp *esp)
2417 {
2418 	u8 tmp;
2419 
2420 	if (esp->erev != esp100)
2421 		return 0;
2422 	tmp = sbus_readb(esp->eregs + ESP_INTRPT);
2423 	if (tmp & ESP_INTR_SR)
2424 		return 1;
2425 	return 0;
2426 }
2427 
2428 /* This verifies the BUSID bits during a reselection so that we know which
2429  * target is talking to us.
2430  */
reconnect_target(struct esp * esp)2431 static inline int reconnect_target(struct esp *esp)
2432 {
2433 	int it, me = esp->scsi_id_mask, targ = 0;
2434 
2435 	if (2 != fcount(esp))
2436 		return -1;
2437 	if (esp->erev == fashme) {
2438 		/* HME does not latch it's own BUS ID bits during
2439 		 * a reselection.  Also the target number is given
2440 		 * as an unsigned char, not as a sole bit number
2441 		 * like the other ESP's do.
2442 		 * Happy Meal indeed....
2443 		 */
2444 		targ = esp->hme_fifo_workaround_buffer[0];
2445 	} else {
2446 		it = sbus_readb(esp->eregs + ESP_FDATA);
2447 		if (!(it & me))
2448 			return -1;
2449 		it &= ~me;
2450 		if (it & (it - 1))
2451 			return -1;
2452 		while (!(it & 1))
2453 			targ++, it >>= 1;
2454 	}
2455 	return targ;
2456 }
2457 
2458 /* This verifies the identify from the target so that we know which lun is
2459  * being reconnected.
2460  */
reconnect_lun(struct esp * esp)2461 static inline int reconnect_lun(struct esp *esp)
2462 {
2463 	int lun;
2464 
2465 	if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
2466 		return -1;
2467 	if (esp->erev == fashme)
2468 		lun = esp->hme_fifo_workaround_buffer[1];
2469 	else
2470 		lun = sbus_readb(esp->eregs + ESP_FDATA);
2471 
2472 	/* Yes, you read this correctly.  We report lun of zero
2473 	 * if we see parity error.  ESP reports parity error for
2474 	 * the lun byte, and this is the only way to hope to recover
2475 	 * because the target is connected.
2476 	 */
2477 	if (esp->sreg & ESP_STAT_PERR)
2478 		return 0;
2479 
2480 	/* Check for illegal bits being set in the lun. */
2481 	if ((lun & 0x40) || !(lun & 0x80))
2482 		return -1;
2483 
2484 	return lun & 7;
2485 }
2486 
2487 /* This puts the driver in a state where it can revitalize a command that
2488  * is being continued due to reselection.
2489  */
esp_connect(struct esp * esp,Scsi_Cmnd * sp)2490 static inline void esp_connect(struct esp *esp, Scsi_Cmnd *sp)
2491 {
2492 	Scsi_Device *dp = sp->device;
2493 
2494 	if (esp->prev_soff  != dp->sync_max_offset ||
2495 	    esp->prev_stp   != dp->sync_min_period ||
2496 	    (esp->erev > esp100a &&
2497 	     esp->prev_cfg3 != esp->config3[sp->target])) {
2498 		esp->prev_soff = dp->sync_max_offset;
2499 		esp->prev_stp = dp->sync_min_period;
2500 		sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
2501 		sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
2502 		if (esp->erev > esp100a) {
2503 			esp->prev_cfg3 = esp->config3[sp->target];
2504 			sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
2505 		}
2506 	}
2507 	esp->current_SC = sp;
2508 }
2509 
2510 /* This will place the current working command back into the issue queue
2511  * if we are to receive a reselection amidst a selection attempt.
2512  */
esp_reconnect(struct esp * esp,Scsi_Cmnd * sp)2513 static inline void esp_reconnect(struct esp *esp, Scsi_Cmnd *sp)
2514 {
2515 	if (!esp->disconnected_SC)
2516 		ESPLOG(("esp%d: Weird, being reselected but disconnected "
2517 			"command queue is empty.\n", esp->esp_id));
2518 	esp->snip = 0;
2519 	esp->current_SC = 0;
2520 	sp->SCp.phase = not_issued;
2521 	append_SC(&esp->issue_SC, sp);
2522 }
2523 
2524 /* Begin message in phase. */
esp_do_msgin(struct esp * esp)2525 static int esp_do_msgin(struct esp *esp)
2526 {
2527 	/* Must be very careful with the fifo on the HME */
2528 	if ((esp->erev != fashme) ||
2529 	    !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY))
2530 		esp_cmd(esp, ESP_CMD_FLUSH);
2531 	esp_maybe_nop(esp);
2532 	esp_cmd(esp, ESP_CMD_TI);
2533 	esp->msgin_len = 1;
2534 	esp->msgin_ctr = 0;
2535 	esp_advance_phase(esp->current_SC, in_msgindone);
2536 	return do_work_bus;
2537 }
2538 
2539 /* This uses various DMA csr fields and the fifo flags count value to
2540  * determine how many bytes were successfully sent/received by the ESP.
2541  */
esp_bytes_sent(struct esp * esp,int fifo_count)2542 static inline int esp_bytes_sent(struct esp *esp, int fifo_count)
2543 {
2544 	int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma;
2545 
2546 	if (esp->dma->revision == dvmarev1)
2547 		rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11));
2548 	return rval - fifo_count;
2549 }
2550 
advance_sg(Scsi_Cmnd * sp)2551 static inline void advance_sg(Scsi_Cmnd *sp)
2552 {
2553 	++sp->SCp.buffer;
2554 	--sp->SCp.buffers_residual;
2555 	sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
2556 	sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer));
2557 }
2558 
2559 /* Please note that the way I've coded these routines is that I _always_
2560  * check for a disconnect during any and all information transfer
2561  * phases.  The SCSI standard states that the target _can_ cause a BUS
2562  * FREE condition by dropping all MSG/CD/IO/BSY signals.  Also note
2563  * that during information transfer phases the target controls every
2564  * change in phase, the only thing the initiator can do is "ask" for
2565  * a message out phase by driving ATN true.  The target can, and sometimes
2566  * will, completely ignore this request so we cannot assume anything when
2567  * we try to force a message out phase to abort/reset a target.  Most of
2568  * the time the target will eventually be nice and go to message out, so
2569  * we may have to hold on to our state about what we want to tell the target
2570  * for some period of time.
2571  */
2572 
2573 /* I think I have things working here correctly.  Even partial transfers
2574  * within a buffer or sub-buffer should not upset us at all no matter
2575  * how bad the target and/or ESP fucks things up.
2576  */
esp_do_data(struct esp * esp)2577 static int esp_do_data(struct esp *esp)
2578 {
2579 	Scsi_Cmnd *SCptr = esp->current_SC;
2580 	int thisphase, hmuch;
2581 
2582 	ESPDATA(("esp_do_data: "));
2583 	esp_maybe_nop(esp);
2584 	thisphase = sreg_to_dataphase(esp->sreg);
2585 	esp_advance_phase(SCptr, thisphase);
2586 	ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
2587 	hmuch = dma_can_transfer(esp, SCptr);
2588 	if (hmuch > (64 * 1024) && (esp->erev != fashme))
2589 		hmuch = (64 * 1024);
2590 	ESPDATA(("hmuch<%d> ", hmuch));
2591 	esp->current_transfer_size = hmuch;
2592 
2593 	if (esp->erev == fashme) {
2594 		u32 tmp = esp->prev_hme_dmacsr;
2595 
2596 		/* Always set the ESP count registers first. */
2597 		esp_setcount(esp->eregs, hmuch, 1);
2598 
2599 		/* Get the DMA csr computed. */
2600 		tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
2601 		if (thisphase == in_datain)
2602 			tmp |= DMA_ST_WRITE;
2603 		else
2604 			tmp &= ~(DMA_ST_WRITE);
2605 		esp->prev_hme_dmacsr = tmp;
2606 
2607 		ESPDATA(("DMA|TI --> do_intr_end\n"));
2608 		if (thisphase == in_datain) {
2609 			sbus_writel(hmuch, esp->dregs + DMA_COUNT);
2610 			esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2611 		} else {
2612 			esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2613 			sbus_writel(hmuch, esp->dregs + DMA_COUNT);
2614 		}
2615 		sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR);
2616 		sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
2617 	} else {
2618 		esp_setcount(esp->eregs, hmuch, 0);
2619 		dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)),
2620 			  hmuch, (thisphase == in_datain));
2621 		ESPDATA(("DMA|TI --> do_intr_end\n"));
2622 		esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
2623 	}
2624 	return do_intr_end;
2625 }
2626 
2627 /* See how successful the data transfer was. */
esp_do_data_finale(struct esp * esp)2628 static int esp_do_data_finale(struct esp *esp)
2629 {
2630 	Scsi_Cmnd *SCptr = esp->current_SC;
2631 	int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;
2632 
2633 	ESPDATA(("esp_do_data_finale: "));
2634 
2635 	if (SCptr->SCp.phase == in_datain) {
2636 		if (esp->sreg & ESP_STAT_PERR) {
2637 			/* Yuck, parity error.  The ESP asserts ATN
2638 			 * so that we can go to message out phase
2639 			 * immediately and inform the target that
2640 			 * something bad happened.
2641 			 */
2642 			ESPLOG(("esp%d: data bad parity detected.\n",
2643 				esp->esp_id));
2644 			esp->cur_msgout[0] = INITIATOR_ERROR;
2645 			esp->msgout_len = 1;
2646 		}
2647 		dma_drain(esp);
2648 	}
2649 	dma_invalidate(esp);
2650 
2651 	/* This could happen for the above parity error case. */
2652 	if (esp->ireg != ESP_INTR_BSERV) {
2653 		/* Please go to msgout phase, please please please... */
2654 		ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
2655 			esp->esp_id));
2656 		return esp_do_phase_determine(esp);
2657 	}
2658 
2659 	/* Check for partial transfers and other horrible events.
2660 	 * Note, here we read the real fifo flags register even
2661 	 * on HME broken adapters because we skip the HME fifo
2662 	 * workaround code in esp_handle() if we are doing data
2663 	 * phase things.  We don't want to fuck directly with
2664 	 * the fifo like that, especially if doing synchronous
2665 	 * transfers!  Also, will need to double the count on
2666 	 * HME if we are doing wide transfers, as the HME fifo
2667 	 * will move and count 16-bit quantities during wide data.
2668 	 * SMCC _and_ Qlogic can both bite me.
2669 	 */
2670 	fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
2671 	if (esp->erev != fashme)
2672 		ecount = esp_getcount(esp->eregs, 0);
2673 	bytes_sent = esp->current_transfer_size;
2674 
2675 	ESPDATA(("trans_sz(%d), ", bytes_sent));
2676 	if (esp->erev == fashme) {
2677 		if (!(esp->sreg & ESP_STAT_TCNT)) {
2678 			ecount = esp_getcount(esp->eregs, 1);
2679 			bytes_sent -= ecount;
2680 		}
2681 
2682 		/* Always subtract any cruft remaining in the FIFO. */
2683 		if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
2684 			fifocnt <<= 1;
2685 		if (SCptr->SCp.phase == in_dataout)
2686 			bytes_sent -= fifocnt;
2687 
2688 		/* I have an IBM disk which exhibits the following
2689 		 * behavior during writes to it.  It disconnects in
2690 		 * the middle of a partial transfer, the current sglist
2691 		 * buffer is 1024 bytes, the disk stops data transfer
2692 		 * at 512 bytes.
2693 		 *
2694 		 * However the FAS366 reports that 32 more bytes were
2695 		 * transferred than really were.  This is precisely
2696 		 * the size of a fully loaded FIFO in wide scsi mode.
2697 		 * The FIFO state recorded indicates that it is empty.
2698 		 *
2699 		 * I have no idea if this is a bug in the FAS366 chip
2700 		 * or a bug in the firmware on this IBM disk.  In any
2701 		 * event the following seems to be a good workaround.  -DaveM
2702 		 */
2703 		if (bytes_sent != esp->current_transfer_size &&
2704 		    SCptr->SCp.phase == in_dataout) {
2705 			int mask = (64 - 1);
2706 
2707 			if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0)
2708 				mask >>= 1;
2709 
2710 			if (bytes_sent & mask)
2711 				bytes_sent -= (bytes_sent & mask);
2712 		}
2713 	} else {
2714 		if (!(esp->sreg & ESP_STAT_TCNT))
2715 			bytes_sent -= ecount;
2716 		if (SCptr->SCp.phase == in_dataout)
2717 			bytes_sent -= fifocnt;
2718 	}
2719 
2720 	ESPDATA(("bytes_sent(%d), ", bytes_sent));
2721 
2722 	/* If we were in synchronous mode, check for peculiarities. */
2723 	if (esp->erev == fashme) {
2724 		if (SCptr->device->sync_max_offset) {
2725 			if (SCptr->SCp.phase == in_dataout)
2726 				esp_cmd(esp, ESP_CMD_FLUSH);
2727 		} else {
2728 			esp_cmd(esp, ESP_CMD_FLUSH);
2729 		}
2730 	} else {
2731 		if (SCptr->device->sync_max_offset)
2732 			bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt);
2733 		else
2734 			esp_cmd(esp, ESP_CMD_FLUSH);
2735 	}
2736 
2737 	/* Until we are sure of what has happened, we are certainly
2738 	 * in the dark.
2739 	 */
2740 	esp_advance_phase(SCptr, in_the_dark);
2741 
2742 	if (bytes_sent < 0) {
2743 		/* I've seen this happen due to lost state in this
2744 		 * driver.  No idea why it happened, but allowing
2745 		 * this value to be negative caused things to
2746 		 * lock up.  This allows greater chance of recovery.
2747 		 * In fact every time I've seen this, it has been
2748 		 * a driver bug without question.
2749 		 */
2750 		ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
2751 		ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
2752 			esp->esp_id,
2753 			esp->current_transfer_size, fifocnt, ecount));
2754 		ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
2755 			esp->esp_id,
2756 			SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
2757 		ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id,
2758 			SCptr->target));
2759 		SCptr->device->borken = 1;
2760 		SCptr->device->sync = 0;
2761 		bytes_sent = 0;
2762 	}
2763 
2764 	/* Update the state of our transfer. */
2765 	SCptr->SCp.ptr += bytes_sent;
2766 	SCptr->SCp.this_residual -= bytes_sent;
2767 	if (SCptr->SCp.this_residual < 0) {
2768 		/* shit */
2769 		ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id));
2770 		SCptr->SCp.this_residual = 0;
2771 	}
2772 
2773 	/* Maybe continue. */
2774 	if (!bogus_data) {
2775 		ESPDATA(("!bogus_data, "));
2776 
2777 		/* NO MATTER WHAT, we advance the scatterlist,
2778 		 * if the target should decide to disconnect
2779 		 * in between scatter chunks (which is common)
2780 		 * we could die horribly!  I used to have the sg
2781 		 * advance occur only if we are going back into
2782 		 * (or are staying in) a data phase, you can
2783 		 * imagine the hell I went through trying to
2784 		 * figure this out.
2785 		 */
2786 		if (SCptr->use_sg && !SCptr->SCp.this_residual)
2787 			advance_sg(SCptr);
2788 		if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
2789 			ESPDATA(("to more data\n"));
2790 			return esp_do_data(esp);
2791 		}
2792 		ESPDATA(("to new phase\n"));
2793 		return esp_do_phase_determine(esp);
2794 	}
2795 	/* Bogus data, just wait for next interrupt. */
2796 	ESPLOG(("esp%d: bogus_data during end of data phase\n",
2797 		esp->esp_id));
2798 	return do_intr_end;
2799 }
2800 
2801 /* We received a non-good status return at the end of
2802  * running a SCSI command.  This is used to decide if
2803  * we should clear our synchronous transfer state for
2804  * such a device when that happens.
2805  *
2806  * The idea is that when spinning up a disk or rewinding
2807  * a tape, we don't want to go into a loop re-negotiating
2808  * synchronous capabilities over and over.
2809  */
esp_should_clear_sync(Scsi_Cmnd * sp)2810 static int esp_should_clear_sync(Scsi_Cmnd *sp)
2811 {
2812 	u8 cmd1 = sp->cmnd[0];
2813 	u8 cmd2 = sp->data_cmnd[0];
2814 
2815 	/* These cases are for spinning up a disk and
2816 	 * waiting for that spinup to complete.
2817 	 */
2818 	if (cmd1 == START_STOP ||
2819 	    cmd2 == START_STOP)
2820 		return 0;
2821 
2822 	if (cmd1 == TEST_UNIT_READY ||
2823 	    cmd2 == TEST_UNIT_READY)
2824 		return 0;
2825 
2826 	/* One more special case for SCSI tape drives,
2827 	 * this is what is used to probe the device for
2828 	 * completion of a rewind or tape load operation.
2829 	 */
2830 	if (sp->device->type == TYPE_TAPE) {
2831 		if (cmd1 == MODE_SENSE ||
2832 		    cmd2 == MODE_SENSE)
2833 			return 0;
2834 	}
2835 
2836 	return 1;
2837 }
2838 
2839 /* Either a command is completing or a target is dropping off the bus
2840  * to continue the command in the background so we can do other work.
2841  */
esp_do_freebus(struct esp * esp)2842 static int esp_do_freebus(struct esp *esp)
2843 {
2844 	Scsi_Cmnd *SCptr = esp->current_SC;
2845 	int rval;
2846 
2847 	rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing);
2848 	if (rval)
2849 		return rval;
2850 	if (esp->ireg != ESP_INTR_DC) {
2851 		ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
2852 		return do_reset_bus; /* target will not drop BSY... */
2853 	}
2854 	esp->msgout_len = 0;
2855 	esp->prevmsgout = NOP;
2856 	if (esp->prevmsgin == COMMAND_COMPLETE) {
2857 		/* Normal end of nexus. */
2858 		if (esp->disconnected_SC || (esp->erev == fashme))
2859 			esp_cmd(esp, ESP_CMD_ESEL);
2860 
2861 		if (SCptr->SCp.Status != GOOD &&
2862 		    SCptr->SCp.Status != CONDITION_GOOD &&
2863 		    ((1<<SCptr->target) & esp->targets_present) &&
2864 		    SCptr->device->sync &&
2865 		    SCptr->device->sync_max_offset) {
2866 			/* SCSI standard says that the synchronous capabilities
2867 			 * should be renegotiated at this point.  Most likely
2868 			 * we are about to request sense from this target
2869 			 * in which case we want to avoid using sync
2870 			 * transfers until we are sure of the current target
2871 			 * state.
2872 			 */
2873 			ESPMISC(("esp: Status <%d> for target %d lun %d\n",
2874 				 SCptr->SCp.Status, SCptr->target, SCptr->lun));
2875 
2876 			/* But don't do this when spinning up a disk at
2877 			 * boot time while we poll for completion as it
2878 			 * fills up the console with messages.  Also, tapes
2879 			 * can report not ready many times right after
2880 			 * loading up a tape.
2881 			 */
2882 			if (esp_should_clear_sync(SCptr) != 0)
2883 				SCptr->device->sync = 0;
2884 		}
2885 		ESPDISC(("F<%02x,%02x>", SCptr->target, SCptr->lun));
2886 		esp_done(esp, ((SCptr->SCp.Status & 0xff) |
2887 			       ((SCptr->SCp.Message & 0xff)<<8) |
2888 			       (DID_OK << 16)));
2889 	} else if (esp->prevmsgin == DISCONNECT) {
2890 		/* Normal disconnect. */
2891 		esp_cmd(esp, ESP_CMD_ESEL);
2892 		ESPDISC(("D<%02x,%02x>", SCptr->target, SCptr->lun));
2893 		append_SC(&esp->disconnected_SC, SCptr);
2894 		esp->current_SC = NULL;
2895 		if (esp->issue_SC)
2896 			esp_exec_cmd(esp);
2897 	} else {
2898 		/* Driver bug, we do not expect a disconnect here
2899 		 * and should not have advanced the state engine
2900 		 * to in_freeing.
2901 		 */
2902 		ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
2903 			esp->esp_id));
2904 		return do_reset_bus;
2905 	}
2906 	return do_intr_end;
2907 }
2908 
2909 /* When a reselect occurs, and we cannot find the command to
2910  * reconnect to in our queues, we do this.
2911  */
esp_bad_reconnect(struct esp * esp)2912 static int esp_bad_reconnect(struct esp *esp)
2913 {
2914 	Scsi_Cmnd *sp;
2915 
2916 	ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
2917 		esp->esp_id));
2918 	ESPLOG(("QUEUE DUMP\n"));
2919 	sp = esp->issue_SC;
2920 	ESPLOG(("esp%d: issue_SC[", esp->esp_id));
2921 	while (sp) {
2922 		ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
2923 		sp = (Scsi_Cmnd *) sp->host_scribble;
2924 	}
2925 	ESPLOG(("]\n"));
2926 	sp = esp->current_SC;
2927 	ESPLOG(("esp%d: current_SC[", esp->esp_id));
2928 	if (sp)
2929 		ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
2930 	else
2931 		ESPLOG(("<NULL>"));
2932 	ESPLOG(("]\n"));
2933 	sp = esp->disconnected_SC;
2934 	ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
2935 	while (sp) {
2936 		ESPLOG(("<%02x,%02x>", sp->target, sp->lun));
2937 		sp = (Scsi_Cmnd *) sp->host_scribble;
2938 	}
2939 	ESPLOG(("]\n"));
2940 	return do_reset_bus;
2941 }
2942 
2943 /* Do the needy when a target tries to reconnect to us. */
esp_do_reconnect(struct esp * esp)2944 static int esp_do_reconnect(struct esp *esp)
2945 {
2946 	int lun, target;
2947 	Scsi_Cmnd *SCptr;
2948 
2949 	/* Check for all bogus conditions first. */
2950 	target = reconnect_target(esp);
2951 	if (target < 0) {
2952 		ESPDISC(("bad bus bits\n"));
2953 		return do_reset_bus;
2954 	}
2955 	lun = reconnect_lun(esp);
2956 	if (lun < 0) {
2957 		ESPDISC(("target=%2x, bad identify msg\n", target));
2958 		return do_reset_bus;
2959 	}
2960 
2961 	/* Things look ok... */
2962 	ESPDISC(("R<%02x,%02x>", target, lun));
2963 
2964 	/* Must not flush FIFO or DVMA on HME. */
2965 	if (esp->erev != fashme) {
2966 		esp_cmd(esp, ESP_CMD_FLUSH);
2967 		if (esp100_reconnect_hwbug(esp))
2968 			return do_reset_bus;
2969 		esp_cmd(esp, ESP_CMD_NULL);
2970 	}
2971 
2972 	SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun);
2973 	if (!SCptr)
2974 		return esp_bad_reconnect(esp);
2975 
2976 	esp_connect(esp, SCptr);
2977 	esp_cmd(esp, ESP_CMD_MOK);
2978 
2979 	if (esp->erev == fashme)
2980 		sbus_writeb(((SCptr->target & 0xf) |
2981 			     (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)),
2982 			    esp->eregs + ESP_BUSID);
2983 
2984 	/* Reconnect implies a restore pointers operation. */
2985 	esp_restore_pointers(esp, SCptr);
2986 
2987 	esp->snip = 0;
2988 	esp_advance_phase(SCptr, in_the_dark);
2989 	return do_intr_end;
2990 }
2991 
2992 /* End of NEXUS (hopefully), pick up status + message byte then leave if
2993  * all goes well.
2994  */
esp_do_status(struct esp * esp)2995 static int esp_do_status(struct esp *esp)
2996 {
2997 	Scsi_Cmnd *SCptr = esp->current_SC;
2998 	int intr, rval;
2999 
3000 	rval = skipahead1(esp, SCptr, in_the_dark, in_status);
3001 	if (rval)
3002 		return rval;
3003 	intr = esp->ireg;
3004 	ESPSTAT(("esp_do_status: "));
3005 	if (intr != ESP_INTR_DC) {
3006 		int message_out = 0; /* for parity problems */
3007 
3008 		/* Ack the message. */
3009 		ESPSTAT(("ack msg, "));
3010 		esp_cmd(esp, ESP_CMD_MOK);
3011 
3012 		if (esp->erev != fashme) {
3013 			dma_flashclear(esp);
3014 
3015 			/* Wait till the first bits settle. */
3016 			while (esp->esp_command[0] == 0xff)
3017 				udelay(1);
3018 		} else {
3019 			esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0];
3020 			esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1];
3021 		}
3022 
3023 		ESPSTAT(("got something, "));
3024 		/* ESP chimes in with one of
3025 		 *
3026 		 * 1) function done interrupt:
3027 		 *	both status and message in bytes
3028 		 *	are available
3029 		 *
3030 		 * 2) bus service interrupt:
3031 		 *	only status byte was acquired
3032 		 *
3033 		 * 3) Anything else:
3034 		 *	can't happen, but we test for it
3035 		 *	anyways
3036 		 *
3037 		 * ALSO: If bad parity was detected on either
3038 		 *       the status _or_ the message byte then
3039 		 *       the ESP has asserted ATN on the bus
3040 		 *       and we must therefore wait for the
3041 		 *       next phase change.
3042 		 */
3043 		if (intr & ESP_INTR_FDONE) {
3044 			/* We got it all, hallejulia. */
3045 			ESPSTAT(("got both, "));
3046 			SCptr->SCp.Status = esp->esp_command[0];
3047 			SCptr->SCp.Message = esp->esp_command[1];
3048 			esp->prevmsgin = SCptr->SCp.Message;
3049 			esp->cur_msgin[0] = SCptr->SCp.Message;
3050 			if (esp->sreg & ESP_STAT_PERR) {
3051 				/* There was bad parity for the
3052 				 * message byte, the status byte
3053 				 * was ok.
3054 				 */
3055 				message_out = MSG_PARITY_ERROR;
3056 			}
3057 		} else if (intr == ESP_INTR_BSERV) {
3058 			/* Only got status byte. */
3059 			ESPLOG(("esp%d: got status only, ", esp->esp_id));
3060 			if (!(esp->sreg & ESP_STAT_PERR)) {
3061 				SCptr->SCp.Status = esp->esp_command[0];
3062 				SCptr->SCp.Message = 0xff;
3063 			} else {
3064 				/* The status byte had bad parity.
3065 				 * we leave the scsi_pointer Status
3066 				 * field alone as we set it to a default
3067 				 * of CHECK_CONDITION in esp_queue.
3068 				 */
3069 				message_out = INITIATOR_ERROR;
3070 			}
3071 		} else {
3072 			/* This shouldn't happen ever. */
3073 			ESPSTAT(("got bolixed\n"));
3074 			esp_advance_phase(SCptr, in_the_dark);
3075 			return esp_do_phase_determine(esp);
3076 		}
3077 
3078 		if (!message_out) {
3079 			ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
3080 				SCptr->SCp.Message));
3081 			if (SCptr->SCp.Message == COMMAND_COMPLETE) {
3082 				ESPSTAT(("and was COMMAND_COMPLETE\n"));
3083 				esp_advance_phase(SCptr, in_freeing);
3084 				return esp_do_freebus(esp);
3085 			} else {
3086 				ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
3087 					esp->esp_id));
3088 				esp->msgin_len = esp->msgin_ctr = 1;
3089 				esp_advance_phase(SCptr, in_msgindone);
3090 				return esp_do_msgindone(esp);
3091 			}
3092 		} else {
3093 			/* With luck we'll be able to let the target
3094 			 * know that bad parity happened, it will know
3095 			 * which byte caused the problems and send it
3096 			 * again.  For the case where the status byte
3097 			 * receives bad parity, I do not believe most
3098 			 * targets recover very well.  We'll see.
3099 			 */
3100 			ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
3101 				esp->esp_id, message_out));
3102 			esp->cur_msgout[0] = message_out;
3103 			esp->msgout_len = esp->msgout_ctr = 1;
3104 			esp_advance_phase(SCptr, in_the_dark);
3105 			return esp_do_phase_determine(esp);
3106 		}
3107 	} else {
3108 		/* If we disconnect now, all hell breaks loose. */
3109 		ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
3110 		esp_advance_phase(SCptr, in_the_dark);
3111 		return esp_do_phase_determine(esp);
3112 	}
3113 }
3114 
esp_enter_status(struct esp * esp)3115 static int esp_enter_status(struct esp *esp)
3116 {
3117 	u8 thecmd = ESP_CMD_ICCSEQ;
3118 
3119 	esp_cmd(esp, ESP_CMD_FLUSH);
3120 	if (esp->erev != fashme) {
3121 		u32 tmp;
3122 
3123 		esp->esp_command[0] = esp->esp_command[1] = 0xff;
3124 		sbus_writeb(2, esp->eregs + ESP_TCLOW);
3125 		sbus_writeb(0, esp->eregs + ESP_TCMED);
3126 		tmp = sbus_readl(esp->dregs + DMA_CSR);
3127 		tmp |= (DMA_ST_WRITE | DMA_ENABLE);
3128 		sbus_writel(tmp, esp->dregs + DMA_CSR);
3129 		if (esp->dma->revision == dvmaesc1)
3130 			sbus_writel(0x100, esp->dregs + DMA_COUNT);
3131 		sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
3132 		thecmd |= ESP_CMD_DMA;
3133 	}
3134 	esp_cmd(esp, thecmd);
3135 	esp_advance_phase(esp->current_SC, in_status);
3136 
3137 	return esp_do_status(esp);
3138 }
3139 
esp_disconnect_amidst_phases(struct esp * esp)3140 static int esp_disconnect_amidst_phases(struct esp *esp)
3141 {
3142 	Scsi_Cmnd *sp = esp->current_SC;
3143 	Scsi_Device *dp = sp->device;
3144 
3145 	/* This means real problems if we see this
3146 	 * here.  Unless we were actually trying
3147 	 * to force the device to abort/reset.
3148 	 */
3149 	ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id));
3150 	ESPLOG(("pphase<%s> cphase<%s>, ",
3151 		phase_string(sp->SCp.phase),
3152 		phase_string(sp->SCp.sent_command)));
3153 
3154 	if (esp->disconnected_SC != NULL || (esp->erev == fashme))
3155 		esp_cmd(esp, ESP_CMD_ESEL);
3156 
3157 	switch (esp->cur_msgout[0]) {
3158 	default:
3159 		/* We didn't expect this to happen at all. */
3160 		ESPLOG(("device is bolixed\n"));
3161 		esp_advance_phase(sp, in_tgterror);
3162 		esp_done(esp, (DID_ERROR << 16));
3163 		break;
3164 
3165 	case BUS_DEVICE_RESET:
3166 		ESPLOG(("device reset successful\n"));
3167 		dp->sync_max_offset = 0;
3168 		dp->sync_min_period = 0;
3169 		dp->sync = 0;
3170 		esp_advance_phase(sp, in_resetdev);
3171 		esp_done(esp, (DID_RESET << 16));
3172 		break;
3173 
3174 	case ABORT:
3175 		ESPLOG(("device abort successful\n"));
3176 		esp_advance_phase(sp, in_abortone);
3177 		esp_done(esp, (DID_ABORT << 16));
3178 		break;
3179 
3180 	};
3181 	return do_intr_end;
3182 }
3183 
esp_enter_msgout(struct esp * esp)3184 static int esp_enter_msgout(struct esp *esp)
3185 {
3186 	esp_advance_phase(esp->current_SC, in_msgout);
3187 	return esp_do_msgout(esp);
3188 }
3189 
esp_enter_msgin(struct esp * esp)3190 static int esp_enter_msgin(struct esp *esp)
3191 {
3192 	esp_advance_phase(esp->current_SC, in_msgin);
3193 	return esp_do_msgin(esp);
3194 }
3195 
esp_enter_cmd(struct esp * esp)3196 static int esp_enter_cmd(struct esp *esp)
3197 {
3198 	esp_advance_phase(esp->current_SC, in_cmdbegin);
3199 	return esp_do_cmdbegin(esp);
3200 }
3201 
esp_enter_badphase(struct esp * esp)3202 static int esp_enter_badphase(struct esp *esp)
3203 {
3204 	ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
3205 		esp->sreg & ESP_STAT_PMASK));
3206 	return do_reset_bus;
3207 }
3208 
3209 typedef int (*espfunc_t)(struct esp *);
3210 
3211 static espfunc_t phase_vector[] = {
3212 	esp_do_data,		/* ESP_DOP */
3213 	esp_do_data,		/* ESP_DIP */
3214 	esp_enter_cmd,		/* ESP_CMDP */
3215 	esp_enter_status,	/* ESP_STATP */
3216 	esp_enter_badphase,	/* ESP_STAT_PMSG */
3217 	esp_enter_badphase,	/* ESP_STAT_PMSG | ESP_STAT_PIO */
3218 	esp_enter_msgout,	/* ESP_MOP */
3219 	esp_enter_msgin,	/* ESP_MIP */
3220 };
3221 
3222 /* The target has control of the bus and we have to see where it has
3223  * taken us.
3224  */
esp_do_phase_determine(struct esp * esp)3225 static int esp_do_phase_determine(struct esp *esp)
3226 {
3227 	if ((esp->ireg & ESP_INTR_DC) != 0)
3228 		return esp_disconnect_amidst_phases(esp);
3229 	return phase_vector[esp->sreg & ESP_STAT_PMASK](esp);
3230 }
3231 
3232 /* First interrupt after exec'ing a cmd comes here. */
esp_select_complete(struct esp * esp)3233 static int esp_select_complete(struct esp *esp)
3234 {
3235 	Scsi_Cmnd *SCptr = esp->current_SC;
3236 	Scsi_Device *SDptr = SCptr->device;
3237 	int cmd_bytes_sent, fcnt;
3238 
3239 	if (esp->erev != fashme)
3240 		esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
3241 
3242 	if (esp->erev == fashme)
3243 		fcnt = esp->hme_fifo_workaround_count;
3244 	else
3245 		fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
3246 
3247 	cmd_bytes_sent = esp_bytes_sent(esp, fcnt);
3248 	dma_invalidate(esp);
3249 
3250 	/* Let's check to see if a reselect happened
3251 	 * while we we're trying to select.  This must
3252 	 * be checked first.
3253 	 */
3254 	if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
3255 		esp_reconnect(esp, SCptr);
3256 		return esp_do_reconnect(esp);
3257 	}
3258 
3259 	/* Looks like things worked, we should see a bus service &
3260 	 * a function complete interrupt at this point.  Note we
3261 	 * are doing a direct comparison because we don't want to
3262 	 * be fooled into thinking selection was successful if
3263 	 * ESP_INTR_DC is set, see below.
3264 	 */
3265 	if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
3266 		/* target speaks... */
3267 		esp->targets_present |= (1<<SCptr->target);
3268 
3269 		/* What if the target ignores the sdtr? */
3270 		if (esp->snip)
3271 			SDptr->sync = 1;
3272 
3273 		/* See how far, if at all, we got in getting
3274 		 * the information out to the target.
3275 		 */
3276 		switch (esp->seqreg) {
3277 		default:
3278 
3279 		case ESP_STEP_ASEL:
3280 			/* Arbitration won, target selected, but
3281 			 * we are in some phase which is not command
3282 			 * phase nor is it message out phase.
3283 			 *
3284 			 * XXX We've confused the target, obviously.
3285 			 * XXX So clear it's state, but we also end
3286 			 * XXX up clearing everyone elses.  That isn't
3287 			 * XXX so nice.  I'd like to just reset this
3288 			 * XXX target, but if I cannot even get it's
3289 			 * XXX attention and finish selection to talk
3290 			 * XXX to it, there is not much more I can do.
3291 			 * XXX If we have a loaded bus we're going to
3292 			 * XXX spend the next second or so renegotiating
3293 			 * XXX for synchronous transfers.
3294 			 */
3295 			ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
3296 				esp->esp_id, SCptr->target));
3297 
3298 		case ESP_STEP_SID:
3299 			/* Arbitration won, target selected, went
3300 			 * to message out phase, sent one message
3301 			 * byte, then we stopped.  ATN is asserted
3302 			 * on the SCSI bus and the target is still
3303 			 * there hanging on.  This is a legal
3304 			 * sequence step if we gave the ESP a select
3305 			 * and stop command.
3306 			 *
3307 			 * XXX See above, I could set the borken flag
3308 			 * XXX in the device struct and retry the
3309 			 * XXX command.  But would that help for
3310 			 * XXX tagged capable targets?
3311 			 */
3312 
3313 		case ESP_STEP_NCMD:
3314 			/* Arbitration won, target selected, maybe
3315 			 * sent the one message byte in message out
3316 			 * phase, but we did not go to command phase
3317 			 * in the end.  Actually, we could have sent
3318 			 * only some of the message bytes if we tried
3319 			 * to send out the entire identify and tag
3320 			 * message using ESP_CMD_SA3.
3321 			 */
3322 			cmd_bytes_sent = 0;
3323 			break;
3324 
3325 		case ESP_STEP_PPC:
3326 			/* No, not the powerPC pinhead.  Arbitration
3327 			 * won, all message bytes sent if we went to
3328 			 * message out phase, went to command phase
3329 			 * but only part of the command was sent.
3330 			 *
3331 			 * XXX I've seen this, but usually in conjunction
3332 			 * XXX with a gross error which appears to have
3333 			 * XXX occurred between the time I told the
3334 			 * XXX ESP to arbitrate and when I got the
3335 			 * XXX interrupt.  Could I have misloaded the
3336 			 * XXX command bytes into the fifo?  Actually,
3337 			 * XXX I most likely missed a phase, and therefore
3338 			 * XXX went into never never land and didn't even
3339 			 * XXX know it.  That was the old driver though.
3340 			 * XXX What is even more peculiar is that the ESP
3341 			 * XXX showed the proper function complete and
3342 			 * XXX bus service bits in the interrupt register.
3343 			 */
3344 
3345 		case ESP_STEP_FINI4:
3346 		case ESP_STEP_FINI5:
3347 		case ESP_STEP_FINI6:
3348 		case ESP_STEP_FINI7:
3349 			/* Account for the identify message */
3350 			if (SCptr->SCp.phase == in_slct_norm)
3351 				cmd_bytes_sent -= 1;
3352 		};
3353 
3354 		if (esp->erev != fashme)
3355 			esp_cmd(esp, ESP_CMD_NULL);
3356 
3357 		/* Be careful, we could really get fucked during synchronous
3358 		 * data transfers if we try to flush the fifo now.
3359 		 */
3360 		if ((esp->erev != fashme) && /* not a Happy Meal and... */
3361 		    !fcnt && /* Fifo is empty and... */
3362 		    /* either we are not doing synchronous transfers or... */
3363 		    (!SDptr->sync_max_offset ||
3364 		     /* We are not going into data in phase. */
3365 		     ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
3366 			esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */
3367 
3368 		/* See how far we got if this is not a slow command. */
3369 		if (!esp->esp_slowcmd) {
3370 			if (cmd_bytes_sent < 0)
3371 				cmd_bytes_sent = 0;
3372 			if (cmd_bytes_sent != SCptr->cmd_len) {
3373 				/* Crapola, mark it as a slowcmd
3374 				 * so that we have some chance of
3375 				 * keeping the command alive with
3376 				 * good luck.
3377 				 *
3378 				 * XXX Actually, if we didn't send it all
3379 				 * XXX this means either we didn't set things
3380 				 * XXX up properly (driver bug) or the target
3381 				 * XXX or the ESP detected parity on one of
3382 				 * XXX the command bytes.  This makes much
3383 				 * XXX more sense, and therefore this code
3384 				 * XXX should be changed to send out a
3385 				 * XXX parity error message or if the status
3386 				 * XXX register shows no parity error then
3387 				 * XXX just expect the target to bring the
3388 				 * XXX bus into message in phase so that it
3389 				 * XXX can send us the parity error message.
3390 				 * XXX SCSI sucks...
3391 				 */
3392 				esp->esp_slowcmd = 1;
3393 				esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
3394 				esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
3395 			}
3396 		}
3397 
3398 		/* Now figure out where we went. */
3399 		esp_advance_phase(SCptr, in_the_dark);
3400 		return esp_do_phase_determine(esp);
3401 	}
3402 
3403 	/* Did the target even make it? */
3404 	if (esp->ireg == ESP_INTR_DC) {
3405 		/* wheee... nobody there or they didn't like
3406 		 * what we told it to do, clean up.
3407 		 */
3408 
3409 		/* If anyone is off the bus, but working on
3410 		 * a command in the background for us, tell
3411 		 * the ESP to listen for them.
3412 		 */
3413 		if (esp->disconnected_SC)
3414 			esp_cmd(esp, ESP_CMD_ESEL);
3415 
3416 		if (((1<<SCptr->target) & esp->targets_present) &&
3417 		    esp->seqreg != 0 &&
3418 		    (esp->cur_msgout[0] == EXTENDED_MESSAGE) &&
3419 		    (SCptr->SCp.phase == in_slct_msg ||
3420 		     SCptr->SCp.phase == in_slct_stop)) {
3421 			/* shit */
3422 			esp->snip = 0;
3423 			ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
3424 				"lun %d\n", esp->esp_id, SCptr->target, SCptr->lun));
3425 			SDptr->sync_max_offset = 0;
3426 			SDptr->sync_min_period = 0;
3427 			SDptr->sync = 1; /* so we don't negotiate again */
3428 
3429 			/* Run the command again, this time though we
3430 			 * won't try to negotiate for synchronous transfers.
3431 			 *
3432 			 * XXX I'd like to do something like send an
3433 			 * XXX INITIATOR_ERROR or ABORT message to the
3434 			 * XXX target to tell it, "Sorry I confused you,
3435 			 * XXX please come back and I will be nicer next
3436 			 * XXX time".  But that requires having the target
3437 			 * XXX on the bus, and it has dropped BSY on us.
3438 			 */
3439 			esp->current_SC = NULL;
3440 			esp_advance_phase(SCptr, not_issued);
3441 			prepend_SC(&esp->issue_SC, SCptr);
3442 			esp_exec_cmd(esp);
3443 			return do_intr_end;
3444 		}
3445 
3446 		/* Ok, this is normal, this is what we see during boot
3447 		 * or whenever when we are scanning the bus for targets.
3448 		 * But first make sure that is really what is happening.
3449 		 */
3450 		if (((1<<SCptr->target) & esp->targets_present)) {
3451 			ESPLOG(("esp%d: Warning, live target %d not responding to "
3452 				"selection.\n", esp->esp_id, SCptr->target));
3453 
3454 			/* This _CAN_ happen.  The SCSI standard states that
3455 			 * the target is to _not_ respond to selection if
3456 			 * _it_ detects bad parity on the bus for any reason.
3457 			 * Therefore, we assume that if we've talked successfully
3458 			 * to this target before, bad parity is the problem.
3459 			 */
3460 			esp_done(esp, (DID_PARITY << 16));
3461 		} else {
3462 			/* Else, there really isn't anyone there. */
3463 			ESPMISC(("esp: selection failure, maybe nobody there?\n"));
3464 			ESPMISC(("esp: target %d lun %d\n",
3465 				 SCptr->target, SCptr->lun));
3466 			esp_done(esp, (DID_BAD_TARGET << 16));
3467 		}
3468 		return do_intr_end;
3469 	}
3470 
3471 	ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
3472 	printk("esp%d: Currently -- ", esp->esp_id);
3473 	esp_print_ireg(esp->ireg); printk(" ");
3474 	esp_print_statreg(esp->sreg); printk(" ");
3475 	esp_print_seqreg(esp->seqreg); printk("\n");
3476 	printk("esp%d: New -- ", esp->esp_id);
3477 	esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
3478 	esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP);
3479 	esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
3480 	esp_print_ireg(esp->ireg); printk(" ");
3481 	esp_print_statreg(esp->sreg); printk(" ");
3482 	esp_print_seqreg(esp->seqreg); printk("\n");
3483 	ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
3484 	return do_reset_bus; /* ugh... */
3485 }
3486 
3487 /* Continue reading bytes for msgin phase. */
esp_do_msgincont(struct esp * esp)3488 static int esp_do_msgincont(struct esp *esp)
3489 {
3490 	if (esp->ireg & ESP_INTR_BSERV) {
3491 		/* in the right phase too? */
3492 		if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
3493 			/* phew... */
3494 			esp_cmd(esp, ESP_CMD_TI);
3495 			esp_advance_phase(esp->current_SC, in_msgindone);
3496 			return do_intr_end;
3497 		}
3498 
3499 		/* We changed phase but ESP shows bus service,
3500 		 * in this case it is most likely that we, the
3501 		 * hacker who has been up for 20hrs straight
3502 		 * staring at the screen, drowned in coffee
3503 		 * smelling like retched cigarette ashes
3504 		 * have miscoded something..... so, try to
3505 		 * recover as best we can.
3506 		 */
3507 		ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id));
3508 	}
3509 	esp_advance_phase(esp->current_SC, in_the_dark);
3510 	return do_phase_determine;
3511 }
3512 
check_singlebyte_msg(struct esp * esp)3513 static int check_singlebyte_msg(struct esp *esp)
3514 {
3515 	esp->prevmsgin = esp->cur_msgin[0];
3516 	if (esp->cur_msgin[0] & 0x80) {
3517 		/* wheee... */
3518 		ESPLOG(("esp%d: target sends identify amidst phases\n",
3519 			esp->esp_id));
3520 		esp_advance_phase(esp->current_SC, in_the_dark);
3521 		return 0;
3522 	} else if (((esp->cur_msgin[0] & 0xf0) == 0x20) ||
3523 		   (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
3524 		esp->msgin_len = 2;
3525 		esp_advance_phase(esp->current_SC, in_msgincont);
3526 		return 0;
3527 	}
3528 	esp_advance_phase(esp->current_SC, in_the_dark);
3529 	switch (esp->cur_msgin[0]) {
3530 	default:
3531 		/* We don't want to hear about it. */
3532 		ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
3533 			esp->cur_msgin[0]));
3534 		return MESSAGE_REJECT;
3535 
3536 	case NOP:
3537 		ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
3538 			esp->current_SC->target));
3539 		return 0;
3540 
3541 	case RESTORE_POINTERS:
3542 		/* In this case we might also have to backup the
3543 		 * "slow command" pointer.  It is rare to get such
3544 		 * a save/restore pointer sequence so early in the
3545 		 * bus transition sequences, but cover it.
3546 		 */
3547 		if (esp->esp_slowcmd) {
3548 			esp->esp_scmdleft = esp->current_SC->cmd_len;
3549 			esp->esp_scmdp = &esp->current_SC->cmnd[0];
3550 		}
3551 		esp_restore_pointers(esp, esp->current_SC);
3552 		return 0;
3553 
3554 	case SAVE_POINTERS:
3555 		esp_save_pointers(esp, esp->current_SC);
3556 		return 0;
3557 
3558 	case COMMAND_COMPLETE:
3559 	case DISCONNECT:
3560 		/* Freeing the bus, let it go. */
3561 		esp->current_SC->SCp.phase = in_freeing;
3562 		return 0;
3563 
3564 	case MESSAGE_REJECT:
3565 		ESPMISC(("msg reject, "));
3566 		if (esp->prevmsgout == EXTENDED_MESSAGE) {
3567 			Scsi_Device *SDptr = esp->current_SC->device;
3568 
3569 			/* Doesn't look like this target can
3570 			 * do synchronous or WIDE transfers.
3571 			 */
3572 			ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
3573 			SDptr->sync = 1;
3574 			SDptr->wide = 1;
3575 			SDptr->sync_min_period = 0;
3576 			SDptr->sync_max_offset = 0;
3577 			return 0;
3578 		} else {
3579 			ESPMISC(("not sync nego, sending ABORT\n"));
3580 			return ABORT;
3581 		}
3582 	};
3583 }
3584 
3585 /* Target negotiates for synchronous transfers before we do, this
3586  * is legal although very strange.  What is even funnier is that
3587  * the SCSI2 standard specifically recommends against targets doing
3588  * this because so many initiators cannot cope with this occuring.
3589  */
target_with_ants_in_pants(struct esp * esp,Scsi_Cmnd * SCptr,Scsi_Device * SDptr)3590 static int target_with_ants_in_pants(struct esp *esp,
3591 				     Scsi_Cmnd *SCptr,
3592 				     Scsi_Device *SDptr)
3593 {
3594 	if (SDptr->sync || SDptr->borken) {
3595 		/* sorry, no can do */
3596 		ESPSDTR(("forcing to async, "));
3597 		build_sync_nego_msg(esp, 0, 0);
3598 		SDptr->sync = 1;
3599 		esp->snip = 1;
3600 		ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
3601 		esp_advance_phase(SCptr, in_the_dark);
3602 		return EXTENDED_MESSAGE;
3603 	}
3604 
3605 	/* Ok, we'll check them out... */
3606 	return 0;
3607 }
3608 
sync_report(struct esp * esp)3609 static void sync_report(struct esp *esp)
3610 {
3611 	int msg3, msg4;
3612 	char *type;
3613 
3614 	msg3 = esp->cur_msgin[3];
3615 	msg4 = esp->cur_msgin[4];
3616 	if (msg4) {
3617 		int hz = 1000000000 / (msg3 * 4);
3618 		int integer = hz / 1000000;
3619 		int fraction = (hz - (integer * 1000000)) / 10000;
3620 		if ((esp->erev == fashme) &&
3621 		    (esp->config3[esp->current_SC->target] & ESP_CONFIG3_EWIDE)) {
3622 			type = "FAST-WIDE";
3623 			integer <<= 1;
3624 			fraction <<= 1;
3625 		} else if ((msg3 * 4) < 200) {
3626 			type = "FAST";
3627 		} else {
3628 			type = "synchronous";
3629 		}
3630 
3631 		/* Do not transform this back into one big printk
3632 		 * again, it triggers a bug in our sparc64-gcc272
3633 		 * sibling call optimization.  -DaveM
3634 		 */
3635 		ESPLOG((KERN_INFO "esp%d: target %d ",
3636 			esp->esp_id, esp->current_SC->target));
3637 		ESPLOG(("[period %dns offset %d %d.%02dMHz ",
3638 			(int) msg3 * 4, (int) msg4,
3639 			integer, fraction));
3640 		ESPLOG(("%s SCSI%s]\n", type,
3641 			(((msg3 * 4) < 200) ? "-II" : "")));
3642 	} else {
3643 		ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n",
3644 			esp->esp_id, esp->current_SC->target));
3645 	}
3646 }
3647 
check_multibyte_msg(struct esp * esp)3648 static int check_multibyte_msg(struct esp *esp)
3649 {
3650 	Scsi_Cmnd *SCptr = esp->current_SC;
3651 	Scsi_Device *SDptr = SCptr->device;
3652 	u8 regval = 0;
3653 	int message_out = 0;
3654 
3655 	ESPSDTR(("chk multibyte msg: "));
3656 	if (esp->cur_msgin[2] == EXTENDED_SDTR) {
3657 		int period = esp->cur_msgin[3];
3658 		int offset = esp->cur_msgin[4];
3659 
3660 		ESPSDTR(("is sync nego response, "));
3661 		if (!esp->snip) {
3662 			int rval;
3663 
3664 			/* Target negotiates first! */
3665 			ESPSDTR(("target jumps the gun, "));
3666 			message_out = EXTENDED_MESSAGE; /* we must respond */
3667 			rval = target_with_ants_in_pants(esp, SCptr, SDptr);
3668 			if (rval)
3669 				return rval;
3670 		}
3671 
3672 		ESPSDTR(("examining sdtr, "));
3673 
3674 		/* Offset cannot be larger than ESP fifo size. */
3675 		if (offset > 15) {
3676 			ESPSDTR(("offset too big %2x, ", offset));
3677 			offset = 15;
3678 			ESPSDTR(("sending back new offset\n"));
3679 			build_sync_nego_msg(esp, period, offset);
3680 			return EXTENDED_MESSAGE;
3681 		}
3682 
3683 		if (offset && period > esp->max_period) {
3684 			/* Yeee, async for this slow device. */
3685 			ESPSDTR(("period too long %2x, ", period));
3686 			build_sync_nego_msg(esp, 0, 0);
3687 			ESPSDTR(("hoping for msgout\n"));
3688 			esp_advance_phase(esp->current_SC, in_the_dark);
3689 			return EXTENDED_MESSAGE;
3690 		} else if (offset && period < esp->min_period) {
3691 			ESPSDTR(("period too short %2x, ", period));
3692 			period = esp->min_period;
3693 			if (esp->erev > esp236)
3694 				regval = 4;
3695 			else
3696 				regval = 5;
3697 		} else if (offset) {
3698 			int tmp;
3699 
3700 			ESPSDTR(("period is ok, "));
3701 			tmp = esp->ccycle / 1000;
3702 			regval = (((period << 2) + tmp - 1) / tmp);
3703 			if (regval && ((esp->erev == fas100a ||
3704 					esp->erev == fas236  ||
3705 					esp->erev == fashme))) {
3706 				if (period >= 50)
3707 					regval--;
3708 			}
3709 		}
3710 
3711 		if (offset) {
3712 			u8 bit;
3713 
3714 			SDptr->sync_min_period = (regval & 0x1f);
3715 			SDptr->sync_max_offset = (offset | esp->radelay);
3716 			if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
3717 				if ((esp->erev == fas100a) || (esp->erev == fashme))
3718 					bit = ESP_CONFIG3_FAST;
3719 				else
3720 					bit = ESP_CONFIG3_FSCSI;
3721 				if (period < 50) {
3722 					/* On FAS366, if using fast-20 synchronous transfers
3723 					 * we need to make sure the REQ/ACK assert/deassert
3724 					 * control bits are clear.
3725 					 */
3726 					if (esp->erev == fashme)
3727 						SDptr->sync_max_offset &= ~esp->radelay;
3728 					esp->config3[SCptr->target] |= bit;
3729 				} else {
3730 					esp->config3[SCptr->target] &= ~bit;
3731 				}
3732 				esp->prev_cfg3 = esp->config3[SCptr->target];
3733 				sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3734 			}
3735 			esp->prev_soff = SDptr->sync_max_offset;
3736 			esp->prev_stp = SDptr->sync_min_period;
3737 			sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
3738 			sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
3739 			ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
3740 				 SDptr->sync_max_offset,
3741 				 SDptr->sync_min_period,
3742 				 esp->config3[SCptr->target]));
3743 
3744 			esp->snip = 0;
3745 		} else if (SDptr->sync_max_offset) {
3746 			u8 bit;
3747 
3748 			/* back to async mode */
3749 			ESPSDTR(("unaccaptable sync nego, forcing async\n"));
3750 			SDptr->sync_max_offset = 0;
3751 			SDptr->sync_min_period = 0;
3752 			esp->prev_soff = 0;
3753 			esp->prev_stp = 0;
3754 			sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
3755 			sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
3756 			if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
3757 				if ((esp->erev == fas100a) || (esp->erev == fashme))
3758 					bit = ESP_CONFIG3_FAST;
3759 				else
3760 					bit = ESP_CONFIG3_FSCSI;
3761 				esp->config3[SCptr->target] &= ~bit;
3762 				esp->prev_cfg3 = esp->config3[SCptr->target];
3763 				sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3764 			}
3765 		}
3766 
3767 		sync_report(esp);
3768 
3769 		ESPSDTR(("chk multibyte msg: sync is known, "));
3770 		SDptr->sync = 1;
3771 
3772 		if (message_out) {
3773 			ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
3774 				esp->esp_id));
3775 			build_sync_nego_msg(esp, period, offset);
3776 			esp_advance_phase(SCptr, in_the_dark);
3777 			return EXTENDED_MESSAGE;
3778 		}
3779 
3780 		ESPSDTR(("returning zero\n"));
3781 		esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
3782 		return 0;
3783 	} else if (esp->cur_msgin[2] == EXTENDED_WDTR) {
3784 		int size = 8 << esp->cur_msgin[3];
3785 
3786 		esp->wnip = 0;
3787 		if (esp->erev != fashme) {
3788 			ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n",
3789 				esp->esp_id));
3790 			message_out = MESSAGE_REJECT;
3791 		} else if (size > 16) {
3792 			ESPLOG(("esp%d: AIEEE wide transfer for %d size "
3793 				"not supported.\n", esp->esp_id, size));
3794 			message_out = MESSAGE_REJECT;
3795 		} else {
3796 			/* Things look good; let's see what we got. */
3797 			if (size == 16) {
3798 				/* Set config 3 register for this target. */
3799 				esp->config3[SCptr->target] |= ESP_CONFIG3_EWIDE;
3800 			} else {
3801 				/* Just make sure it was one byte sized. */
3802 				if (size != 8) {
3803 					ESPLOG(("esp%d: Aieee, wide nego of %d size.\n",
3804 						esp->esp_id, size));
3805 					message_out = MESSAGE_REJECT;
3806 					goto finish;
3807 				}
3808 				/* Pure paranoia. */
3809 				esp->config3[SCptr->target] &= ~(ESP_CONFIG3_EWIDE);
3810 			}
3811 			esp->prev_cfg3 = esp->config3[SCptr->target];
3812 			sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
3813 
3814 			/* Regardless, next try for sync transfers. */
3815 			build_sync_nego_msg(esp, esp->sync_defp, 15);
3816 			SDptr->sync = 1;
3817 			esp->snip = 1;
3818 			message_out = EXTENDED_MESSAGE;
3819 		}
3820 	} else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
3821 		ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
3822 		message_out = MESSAGE_REJECT;
3823 	}
3824 finish:
3825 	esp_advance_phase(SCptr, in_the_dark);
3826 	return message_out;
3827 }
3828 
esp_do_msgindone(struct esp * esp)3829 static int esp_do_msgindone(struct esp *esp)
3830 {
3831 	Scsi_Cmnd *SCptr = esp->current_SC;
3832 	int message_out = 0, it = 0, rval;
3833 
3834 	rval = skipahead1(esp, SCptr, in_msgin, in_msgindone);
3835 	if (rval)
3836 		return rval;
3837 	if (SCptr->SCp.sent_command != in_status) {
3838 		if (!(esp->ireg & ESP_INTR_DC)) {
3839 			if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
3840 				message_out = MSG_PARITY_ERROR;
3841 				esp_cmd(esp, ESP_CMD_FLUSH);
3842 			} else if (esp->erev != fashme &&
3843 			  (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) {
3844 				/* We certainly dropped the ball somewhere. */
3845 				message_out = INITIATOR_ERROR;
3846 				esp_cmd(esp, ESP_CMD_FLUSH);
3847 			} else if (!esp->msgin_len) {
3848 				if (esp->erev == fashme)
3849 					it = esp->hme_fifo_workaround_buffer[0];
3850 				else
3851 					it = sbus_readb(esp->eregs + ESP_FDATA);
3852 				esp_advance_phase(SCptr, in_msgincont);
3853 			} else {
3854 				/* it is ok and we want it */
3855 				if (esp->erev == fashme)
3856 					it = esp->cur_msgin[esp->msgin_ctr] =
3857 						esp->hme_fifo_workaround_buffer[0];
3858 				else
3859 					it = esp->cur_msgin[esp->msgin_ctr] =
3860 						sbus_readb(esp->eregs + ESP_FDATA);
3861 				esp->msgin_ctr++;
3862 			}
3863 		} else {
3864 			esp_advance_phase(SCptr, in_the_dark);
3865 			return do_work_bus;
3866 		}
3867 	} else {
3868 		it = esp->cur_msgin[0];
3869 	}
3870 	if (!message_out && esp->msgin_len) {
3871 		if (esp->msgin_ctr < esp->msgin_len) {
3872 			esp_advance_phase(SCptr, in_msgincont);
3873 		} else if (esp->msgin_len == 1) {
3874 			message_out = check_singlebyte_msg(esp);
3875 		} else if (esp->msgin_len == 2) {
3876 			if (esp->cur_msgin[0] == EXTENDED_MESSAGE) {
3877 				if ((it + 2) >= 15) {
3878 					message_out = MESSAGE_REJECT;
3879 				} else {
3880 					esp->msgin_len = (it + 2);
3881 					esp_advance_phase(SCptr, in_msgincont);
3882 				}
3883 			} else {
3884 				message_out = MESSAGE_REJECT; /* foo on you */
3885 			}
3886 		} else {
3887 			message_out = check_multibyte_msg(esp);
3888 		}
3889 	}
3890 	if (message_out < 0) {
3891 		return -message_out;
3892 	} else if (message_out) {
3893 		if (((message_out != 1) &&
3894 		     ((message_out < 0x20) || (message_out & 0x80))))
3895 			esp->msgout_len = 1;
3896 		esp->cur_msgout[0] = message_out;
3897 		esp_cmd(esp, ESP_CMD_SATN);
3898 		esp_advance_phase(SCptr, in_the_dark);
3899 		esp->msgin_len = 0;
3900 	}
3901 	esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
3902 	esp->sreg &= ~(ESP_STAT_INTR);
3903 	if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
3904 		esp_cmd(esp, ESP_CMD_MOK);
3905 	if ((SCptr->SCp.sent_command == in_msgindone) &&
3906 	    (SCptr->SCp.phase == in_freeing))
3907 		return esp_do_freebus(esp);
3908 	return do_intr_end;
3909 }
3910 
esp_do_cmdbegin(struct esp * esp)3911 static int esp_do_cmdbegin(struct esp *esp)
3912 {
3913 	Scsi_Cmnd *SCptr = esp->current_SC;
3914 
3915 	esp_advance_phase(SCptr, in_cmdend);
3916 	if (esp->erev == fashme) {
3917 		u32 tmp = sbus_readl(esp->dregs + DMA_CSR);
3918 		int i;
3919 
3920 		for (i = 0; i < esp->esp_scmdleft; i++)
3921 			esp->esp_command[i] = *esp->esp_scmdp++;
3922 		esp->esp_scmdleft = 0;
3923 		esp_cmd(esp, ESP_CMD_FLUSH);
3924 		esp_setcount(esp->eregs, i, 1);
3925 		esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI));
3926 		tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
3927 		tmp &= ~(DMA_ST_WRITE);
3928 		sbus_writel(i, esp->dregs + DMA_COUNT);
3929 		sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
3930 		sbus_writel(tmp, esp->dregs + DMA_CSR);
3931 	} else {
3932 		u8 tmp;
3933 
3934 		esp_cmd(esp, ESP_CMD_FLUSH);
3935 		tmp = *esp->esp_scmdp++;
3936 		esp->esp_scmdleft--;
3937 		sbus_writeb(tmp, esp->eregs + ESP_FDATA);
3938 		esp_cmd(esp, ESP_CMD_TI);
3939 	}
3940 	return do_intr_end;
3941 }
3942 
esp_do_cmddone(struct esp * esp)3943 static int esp_do_cmddone(struct esp *esp)
3944 {
3945 	if (esp->erev == fashme)
3946 		dma_invalidate(esp);
3947 	else
3948 		esp_cmd(esp, ESP_CMD_NULL);
3949 
3950 	if (esp->ireg & ESP_INTR_BSERV) {
3951 		esp_advance_phase(esp->current_SC, in_the_dark);
3952 		return esp_do_phase_determine(esp);
3953 	}
3954 
3955 	ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
3956 		esp->esp_id));
3957 	return do_reset_bus;
3958 }
3959 
esp_do_msgout(struct esp * esp)3960 static int esp_do_msgout(struct esp *esp)
3961 {
3962 	esp_cmd(esp, ESP_CMD_FLUSH);
3963 	switch (esp->msgout_len) {
3964 	case 1:
3965 		if (esp->erev == fashme)
3966 			hme_fifo_push(esp, &esp->cur_msgout[0], 1);
3967 		else
3968 			sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
3969 
3970 		esp_cmd(esp, ESP_CMD_TI);
3971 		break;
3972 
3973 	case 2:
3974 		esp->esp_command[0] = esp->cur_msgout[0];
3975 		esp->esp_command[1] = esp->cur_msgout[1];
3976 
3977 		if (esp->erev == fashme) {
3978 			hme_fifo_push(esp, &esp->cur_msgout[0], 2);
3979 			esp_cmd(esp, ESP_CMD_TI);
3980 		} else {
3981 			dma_setup(esp, esp->esp_command_dvma, 2, 0);
3982 			esp_setcount(esp->eregs, 2, 0);
3983 			esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
3984 		}
3985 		break;
3986 
3987 	case 4:
3988 		esp->esp_command[0] = esp->cur_msgout[0];
3989 		esp->esp_command[1] = esp->cur_msgout[1];
3990 		esp->esp_command[2] = esp->cur_msgout[2];
3991 		esp->esp_command[3] = esp->cur_msgout[3];
3992 		esp->snip = 1;
3993 
3994 		if (esp->erev == fashme) {
3995 			hme_fifo_push(esp, &esp->cur_msgout[0], 4);
3996 			esp_cmd(esp, ESP_CMD_TI);
3997 		} else {
3998 			dma_setup(esp, esp->esp_command_dvma, 4, 0);
3999 			esp_setcount(esp->eregs, 4, 0);
4000 			esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
4001 		}
4002 		break;
4003 
4004 	case 5:
4005 		esp->esp_command[0] = esp->cur_msgout[0];
4006 		esp->esp_command[1] = esp->cur_msgout[1];
4007 		esp->esp_command[2] = esp->cur_msgout[2];
4008 		esp->esp_command[3] = esp->cur_msgout[3];
4009 		esp->esp_command[4] = esp->cur_msgout[4];
4010 		esp->snip = 1;
4011 
4012 		if (esp->erev == fashme) {
4013 			hme_fifo_push(esp, &esp->cur_msgout[0], 5);
4014 			esp_cmd(esp, ESP_CMD_TI);
4015 		} else {
4016 			dma_setup(esp, esp->esp_command_dvma, 5, 0);
4017 			esp_setcount(esp->eregs, 5, 0);
4018 			esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
4019 		}
4020 		break;
4021 
4022 	default:
4023 		/* whoops */
4024 		ESPMISC(("bogus msgout sending NOP\n"));
4025 		esp->cur_msgout[0] = NOP;
4026 
4027 		if (esp->erev == fashme) {
4028 			hme_fifo_push(esp, &esp->cur_msgout[0], 1);
4029 		} else {
4030 			sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
4031 		}
4032 
4033 		esp->msgout_len = 1;
4034 		esp_cmd(esp, ESP_CMD_TI);
4035 		break;
4036 	};
4037 
4038 	esp_advance_phase(esp->current_SC, in_msgoutdone);
4039 	return do_intr_end;
4040 }
4041 
esp_do_msgoutdone(struct esp * esp)4042 static int esp_do_msgoutdone(struct esp *esp)
4043 {
4044 	if (esp->msgout_len > 1) {
4045 		/* XXX HME/FAS ATN deassert workaround required,
4046 		 * XXX no DMA flushing, only possible ESP_CMD_FLUSH
4047 		 * XXX to kill the fifo.
4048 		 */
4049 		if (esp->erev != fashme) {
4050 			u32 tmp;
4051 
4052 			while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
4053 				udelay(1);
4054 			tmp &= ~DMA_ENABLE;
4055 			sbus_writel(tmp, esp->dregs + DMA_CSR);
4056 			dma_invalidate(esp);
4057 		} else {
4058 			esp_cmd(esp, ESP_CMD_FLUSH);
4059 		}
4060 	}
4061 	if (!(esp->ireg & ESP_INTR_DC)) {
4062 		if (esp->erev != fashme)
4063 			esp_cmd(esp, ESP_CMD_NULL);
4064 		switch (esp->sreg & ESP_STAT_PMASK) {
4065 		case ESP_MOP:
4066 			/* whoops, parity error */
4067 			ESPLOG(("esp%d: still in msgout, parity error assumed\n",
4068 				esp->esp_id));
4069 			if (esp->msgout_len > 1)
4070 				esp_cmd(esp, ESP_CMD_SATN);
4071 			esp_advance_phase(esp->current_SC, in_msgout);
4072 			return do_work_bus;
4073 
4074 		case ESP_DIP:
4075 			break;
4076 
4077 		default:
4078 			/* Happy Meal fifo is touchy... */
4079 			if ((esp->erev != fashme) &&
4080 			    !fcount(esp) &&
4081 			    !(esp->current_SC->device->sync_max_offset))
4082 				esp_cmd(esp, ESP_CMD_FLUSH);
4083 			break;
4084 
4085 		};
4086 	} else {
4087 		ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id));
4088 		return do_reset_bus;
4089 	}
4090 
4091 	/* If we sent out a synchronous negotiation message, update
4092 	 * our state.
4093 	 */
4094 	if (esp->cur_msgout[2] == EXTENDED_MESSAGE &&
4095 	    esp->cur_msgout[4] == EXTENDED_SDTR) {
4096 		esp->snip = 1; /* anal retentiveness... */
4097 	}
4098 
4099 	esp->prevmsgout = esp->cur_msgout[0];
4100 	esp->msgout_len = 0;
4101 	esp_advance_phase(esp->current_SC, in_the_dark);
4102 	return esp_do_phase_determine(esp);
4103 }
4104 
esp_bus_unexpected(struct esp * esp)4105 static int esp_bus_unexpected(struct esp *esp)
4106 {
4107 	ESPLOG(("esp%d: command in weird state %2x\n",
4108 		esp->esp_id, esp->current_SC->SCp.phase));
4109 	return do_reset_bus;
4110 }
4111 
4112 static espfunc_t bus_vector[] = {
4113 	esp_do_data_finale,
4114 	esp_do_data_finale,
4115 	esp_bus_unexpected,
4116 	esp_do_msgin,
4117 	esp_do_msgincont,
4118 	esp_do_msgindone,
4119 	esp_do_msgout,
4120 	esp_do_msgoutdone,
4121 	esp_do_cmdbegin,
4122 	esp_do_cmddone,
4123 	esp_do_status,
4124 	esp_do_freebus,
4125 	esp_do_phase_determine,
4126 	esp_bus_unexpected,
4127 	esp_bus_unexpected,
4128 	esp_bus_unexpected,
4129 };
4130 
4131 /* This is the second tier in our dual-level SCSI state machine. */
esp_work_bus(struct esp * esp)4132 static int esp_work_bus(struct esp *esp)
4133 {
4134 	Scsi_Cmnd *SCptr = esp->current_SC;
4135 	unsigned int phase;
4136 
4137 	ESPBUS(("esp_work_bus: "));
4138 	if (!SCptr) {
4139 		ESPBUS(("reconnect\n"));
4140 		return esp_do_reconnect(esp);
4141 	}
4142 	phase = SCptr->SCp.phase;
4143 	if ((phase & 0xf0) == in_phases_mask)
4144 		return bus_vector[(phase & 0x0f)](esp);
4145 	else if ((phase & 0xf0) == in_slct_mask)
4146 		return esp_select_complete(esp);
4147 	else
4148 		return esp_bus_unexpected(esp);
4149 }
4150 
4151 static espfunc_t isvc_vector[] = {
4152 	0,
4153 	esp_do_phase_determine,
4154 	esp_do_resetbus,
4155 	esp_finish_reset,
4156 	esp_work_bus
4157 };
4158 
4159 /* Main interrupt handler for an esp adapter. */
esp_handle(struct esp * esp)4160 static void esp_handle(struct esp *esp)
4161 {
4162 	Scsi_Cmnd *SCptr;
4163 	int what_next = do_intr_end;
4164 
4165 	SCptr = esp->current_SC;
4166 
4167 	/* Check for errors. */
4168 	esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
4169 	esp->sreg &= (~ESP_STAT_INTR);
4170 	if (esp->erev == fashme) {
4171 		esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
4172 		esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
4173 	}
4174 
4175 	if (esp->sreg & (ESP_STAT_SPAM)) {
4176 		/* Gross error, could be due to one of:
4177 		 *
4178 		 * - top of fifo overwritten, could be because
4179 		 *   we tried to do a synchronous transfer with
4180 		 *   an offset greater than ESP fifo size
4181 		 *
4182 		 * - top of command register overwritten
4183 		 *
4184 		 * - DMA setup to go in one direction, SCSI
4185 		 *   bus points in the other, whoops
4186 		 *
4187 		 * - weird phase change during asynchronous
4188 		 *   data phase while we are initiator
4189 		 */
4190 		ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg));
4191 
4192 		/* If a command is live on the bus we cannot safely
4193 		 * reset the bus, so we'll just let the pieces fall
4194 		 * where they may.  Here we are hoping that the
4195 		 * target will be able to cleanly go away soon
4196 		 * so we can safely reset things.
4197 		 */
4198 		if (!SCptr) {
4199 			ESPLOG(("esp%d: No current cmd during gross error, "
4200 				"resetting bus\n", esp->esp_id));
4201 			what_next = do_reset_bus;
4202 			goto state_machine;
4203 		}
4204 	}
4205 
4206 	if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) {
4207 		/* A DMA gate array error.  Here we must
4208 		 * be seeing one of two things.  Either the
4209 		 * virtual to physical address translation
4210 		 * on the SBUS could not occur, else the
4211 		 * translation it did get pointed to a bogus
4212 		 * page.  Ho hum...
4213 		 */
4214 		ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id,
4215 			sbus_readl(esp->dregs + DMA_CSR)));
4216 
4217 		/* DMA gate array itself must be reset to clear the
4218 		 * error condition.
4219 		 */
4220 		esp_reset_dma(esp);
4221 
4222 		what_next = do_reset_bus;
4223 		goto state_machine;
4224 	}
4225 
4226 	esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);   /* Unlatch intr reg */
4227 
4228 	if (esp->erev == fashme) {
4229 		/* This chip is really losing. */
4230 		ESPHME(("HME["));
4231 
4232 		ESPHME(("sreg2=%02x,", esp->sreg2));
4233 		/* Must latch fifo before reading the interrupt
4234 		 * register else garbage ends up in the FIFO
4235 		 * which confuses the driver utterly.
4236 		 */
4237 		if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
4238 		    (esp->sreg2 & ESP_STAT2_F1BYTE)) {
4239 			ESPHME(("fifo_workaround]"));
4240 			hme_fifo_read(esp);
4241 		} else {
4242 			ESPHME(("no_fifo_workaround]"));
4243 		}
4244 	}
4245 
4246 	/* No current cmd is only valid at this point when there are
4247 	 * commands off the bus or we are trying a reset.
4248 	 */
4249 	if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) {
4250 		/* Panic is safe, since current_SC is null. */
4251 		ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id));
4252 		panic("esp_handle: current_SC == penguin within interrupt!");
4253 	}
4254 
4255 	if (esp->ireg & (ESP_INTR_IC)) {
4256 		/* Illegal command fed to ESP.  Outside of obvious
4257 		 * software bugs that could cause this, there is
4258 		 * a condition with esp100 where we can confuse the
4259 		 * ESP into an erroneous illegal command interrupt
4260 		 * because it does not scrape the FIFO properly
4261 		 * for reselection.  See esp100_reconnect_hwbug()
4262 		 * to see how we try very hard to avoid this.
4263 		 */
4264 		ESPLOG(("esp%d: illegal command\n", esp->esp_id));
4265 
4266 		esp_dump_state(esp);
4267 
4268 		if (SCptr != NULL) {
4269 			/* Devices with very buggy firmware can drop BSY
4270 			 * during a scatter list interrupt when using sync
4271 			 * mode transfers.  We continue the transfer as
4272 			 * expected, the target drops the bus, the ESP
4273 			 * gets confused, and we get a illegal command
4274 			 * interrupt because the bus is in the disconnected
4275 			 * state now and ESP_CMD_TI is only allowed when
4276 			 * a nexus is alive on the bus.
4277 			 */
4278 			ESPLOG(("esp%d: Forcing async and disabling disconnect for "
4279 				"target %d\n", esp->esp_id, SCptr->target));
4280 			SCptr->device->borken = 1; /* foo on you */
4281 		}
4282 
4283 		what_next = do_reset_bus;
4284 	} else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) {
4285 		if (SCptr) {
4286 			unsigned int phase = SCptr->SCp.phase;
4287 
4288 			if (phase & in_phases_mask) {
4289 				what_next = esp_work_bus(esp);
4290 			} else if (phase & in_slct_mask) {
4291 				what_next = esp_select_complete(esp);
4292 			} else {
4293 				ESPLOG(("esp%d: interrupt for no good reason...\n",
4294 					esp->esp_id));
4295 				what_next = do_intr_end;
4296 			}
4297 		} else {
4298 			ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
4299 				esp->esp_id));
4300 			what_next = do_reset_bus;
4301 		}
4302 	} else if (esp->ireg & ESP_INTR_SR) {
4303 		ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id));
4304 		what_next = do_reset_complete;
4305 	} else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) {
4306 		ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
4307 			esp->esp_id));
4308 		what_next = do_reset_bus;
4309 	} else if (esp->ireg & ESP_INTR_RSEL) {
4310 		if (SCptr == NULL) {
4311 			/* This is ok. */
4312 			what_next = esp_do_reconnect(esp);
4313 		} else if (SCptr->SCp.phase & in_slct_mask) {
4314 			/* Only selection code knows how to clean
4315 			 * up properly.
4316 			 */
4317 			ESPDISC(("Reselected during selection attempt\n"));
4318 			what_next = esp_select_complete(esp);
4319 		} else {
4320 			ESPLOG(("esp%d: Reselected while bus is busy\n",
4321 				esp->esp_id));
4322 			what_next = do_reset_bus;
4323 		}
4324 	}
4325 
4326 	/* This is tier-one in our dual level SCSI state machine. */
4327 state_machine:
4328 	while (what_next != do_intr_end) {
4329 		if (what_next >= do_phase_determine &&
4330 		    what_next < do_intr_end) {
4331 			what_next = isvc_vector[what_next](esp);
4332 		} else {
4333 			/* state is completely lost ;-( */
4334 			ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
4335 				esp->esp_id));
4336 			what_next = do_reset_bus;
4337 		}
4338 	}
4339 }
4340 
4341 /* Service only the ESP described by dev_id. */
esp_intr(int irq,void * dev_id,struct pt_regs * pregs)4342 static void esp_intr(int irq, void *dev_id, struct pt_regs *pregs)
4343 {
4344 	struct esp *esp = dev_id;
4345 	unsigned long flags;
4346 
4347 	spin_lock_irqsave(&esp->lock, flags);
4348 	if (ESP_IRQ_P(esp->dregs)) {
4349 		ESP_INTSOFF(esp->dregs);
4350 
4351 		ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id));
4352 		esp_handle(esp);
4353 		ESPIRQ((")"));
4354 
4355 		ESP_INTSON(esp->dregs);
4356 	}
4357 	spin_unlock_irqrestore(&esp->lock, flags);
4358 }
4359 
esp_revoke(Scsi_Device * SDptr)4360 int esp_revoke(Scsi_Device* SDptr)
4361 {
4362 	struct esp *esp = (struct esp *) SDptr->host->hostdata;
4363 	esp->targets_present &= ~(1 << SDptr->id);
4364 	return 0;
4365 }
4366 
4367 static Scsi_Host_Template driver_template = SCSI_SPARC_ESP;
4368 
4369 #include "scsi_module.c"
4370 
4371 MODULE_LICENSE("GPL");
4372