1 /*
2 * $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
3 *
4 * Procfs interface for the PCI bus.
5 *
6 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
7 */
8
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
12 #include <linux/proc_fs.h>
13 #include <linux/init.h>
14 #include <linux/seq_file.h>
15
16 #include <asm/uaccess.h>
17 #include <asm/byteorder.h>
18
19 #define PCI_CFG_SPACE_SIZE 256
20
21 static loff_t
proc_bus_pci_lseek(struct file * file,loff_t off,int whence)22 proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
23 {
24 loff_t new;
25
26 switch (whence) {
27 case 0:
28 new = off;
29 break;
30 case 1:
31 new = file->f_pos + off;
32 break;
33 case 2:
34 new = PCI_CFG_SPACE_SIZE + off;
35 break;
36 default:
37 return -EINVAL;
38 }
39 if (new < 0 || new > PCI_CFG_SPACE_SIZE)
40 return -EINVAL;
41 return (file->f_pos = new);
42 }
43
44 static ssize_t
proc_bus_pci_read(struct file * file,char * buf,size_t nbytes,loff_t * ppos)45 proc_bus_pci_read(struct file *file, char *buf, size_t nbytes, loff_t *ppos)
46 {
47 const struct inode *ino = file->f_dentry->d_inode;
48 const struct proc_dir_entry *dp = ino->u.generic_ip;
49 struct pci_dev *dev = dp->data;
50 loff_t n = *ppos;
51 unsigned pos = n;
52 unsigned int cnt, size;
53
54 /*
55 * Normal users can read only the standardized portion of the
56 * configuration space as several chips lock up when trying to read
57 * undefined locations (think of Intel PIIX4 as a typical example).
58 */
59
60 if (capable(CAP_SYS_ADMIN))
61 size = PCI_CFG_SPACE_SIZE;
62 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
63 size = 128;
64 else
65 size = 64;
66
67 if (pos != n || pos >= size)
68 return 0;
69 if (nbytes >= size)
70 nbytes = size;
71 if (pos + nbytes > size)
72 nbytes = size - pos;
73 cnt = nbytes;
74
75 if (!access_ok(VERIFY_WRITE, buf, cnt))
76 return -EINVAL;
77
78 if ((pos & 1) && cnt) {
79 unsigned char val;
80 pci_read_config_byte(dev, pos, &val);
81 __put_user(val, buf);
82 buf++;
83 pos++;
84 cnt--;
85 }
86
87 if ((pos & 3) && cnt > 2) {
88 unsigned short val;
89 pci_read_config_word(dev, pos, &val);
90 __put_user(cpu_to_le16(val), (unsigned short *) buf);
91 buf += 2;
92 pos += 2;
93 cnt -= 2;
94 }
95
96 while (cnt >= 4) {
97 unsigned int val;
98 pci_read_config_dword(dev, pos, &val);
99 __put_user(cpu_to_le32(val), (unsigned int *) buf);
100 buf += 4;
101 pos += 4;
102 cnt -= 4;
103 }
104
105 if (cnt >= 2) {
106 unsigned short val;
107 pci_read_config_word(dev, pos, &val);
108 __put_user(cpu_to_le16(val), (unsigned short *) buf);
109 buf += 2;
110 pos += 2;
111 cnt -= 2;
112 }
113
114 if (cnt) {
115 unsigned char val;
116 pci_read_config_byte(dev, pos, &val);
117 __put_user(val, buf);
118 buf++;
119 pos++;
120 cnt--;
121 }
122
123 *ppos = pos;
124 return nbytes;
125 }
126
127 static ssize_t
proc_bus_pci_write(struct file * file,const char * buf,size_t nbytes,loff_t * ppos)128 proc_bus_pci_write(struct file *file, const char *buf, size_t nbytes, loff_t *ppos)
129 {
130 const struct inode *ino = file->f_dentry->d_inode;
131 const struct proc_dir_entry *dp = ino->u.generic_ip;
132 struct pci_dev *dev = dp->data;
133 loff_t n = *ppos;
134 unsigned pos = n;
135 int cnt;
136
137 if (pos != n || pos >= PCI_CFG_SPACE_SIZE)
138 return 0;
139 if (nbytes >= PCI_CFG_SPACE_SIZE)
140 nbytes = PCI_CFG_SPACE_SIZE;
141 if (pos + nbytes > PCI_CFG_SPACE_SIZE)
142 nbytes = PCI_CFG_SPACE_SIZE - pos;
143 cnt = nbytes;
144
145 if (!access_ok(VERIFY_READ, buf, cnt))
146 return -EINVAL;
147
148 if ((pos & 1) && cnt) {
149 unsigned char val;
150 __get_user(val, buf);
151 pci_write_config_byte(dev, pos, val);
152 buf++;
153 pos++;
154 cnt--;
155 }
156
157 if ((pos & 3) && cnt > 2) {
158 unsigned short val;
159 __get_user(val, (unsigned short *) buf);
160 pci_write_config_word(dev, pos, le16_to_cpu(val));
161 buf += 2;
162 pos += 2;
163 cnt -= 2;
164 }
165
166 while (cnt >= 4) {
167 unsigned int val;
168 __get_user(val, (unsigned int *) buf);
169 pci_write_config_dword(dev, pos, le32_to_cpu(val));
170 buf += 4;
171 pos += 4;
172 cnt -= 4;
173 }
174
175 if (cnt >= 2) {
176 unsigned short val;
177 __get_user(val, (unsigned short *) buf);
178 pci_write_config_word(dev, pos, le16_to_cpu(val));
179 buf += 2;
180 pos += 2;
181 cnt -= 2;
182 }
183
184 if (cnt) {
185 unsigned char val;
186 __get_user(val, buf);
187 pci_write_config_byte(dev, pos, val);
188 buf++;
189 pos++;
190 cnt--;
191 }
192
193 *ppos = pos;
194 return nbytes;
195 }
196
197 struct pci_filp_private {
198 enum pci_mmap_state mmap_state;
199 int write_combine;
200 };
201
proc_bus_pci_ioctl(struct inode * inode,struct file * file,unsigned int cmd,unsigned long arg)202 static int proc_bus_pci_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
203 {
204 const struct proc_dir_entry *dp = inode->u.generic_ip;
205 struct pci_dev *dev = dp->data;
206 #ifdef HAVE_PCI_MMAP
207 struct pci_filp_private *fpriv = file->private_data;
208 #endif /* HAVE_PCI_MMAP */
209 int ret = 0;
210
211 switch (cmd) {
212 case PCIIOC_CONTROLLER:
213 ret = pci_controller_num(dev);
214 break;
215
216 #ifdef HAVE_PCI_MMAP
217 case PCIIOC_MMAP_IS_IO:
218 fpriv->mmap_state = pci_mmap_io;
219 break;
220
221 case PCIIOC_MMAP_IS_MEM:
222 fpriv->mmap_state = pci_mmap_mem;
223 break;
224
225 case PCIIOC_WRITE_COMBINE:
226 if (arg)
227 fpriv->write_combine = 1;
228 else
229 fpriv->write_combine = 0;
230 break;
231
232 #endif /* HAVE_PCI_MMAP */
233
234 default:
235 ret = -EINVAL;
236 break;
237 };
238
239 return ret;
240 }
241
242 #ifdef HAVE_PCI_MMAP
proc_bus_pci_mmap(struct file * file,struct vm_area_struct * vma)243 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
244 {
245 struct inode *inode = file->f_dentry->d_inode;
246 const struct proc_dir_entry *dp = inode->u.generic_ip;
247 struct pci_dev *dev = dp->data;
248 struct pci_filp_private *fpriv = file->private_data;
249 int ret;
250
251 if (!capable(CAP_SYS_RAWIO))
252 return -EPERM;
253
254 ret = pci_mmap_page_range(dev, vma,
255 fpriv->mmap_state,
256 fpriv->write_combine);
257 if (ret < 0)
258 return ret;
259
260 return 0;
261 }
262
proc_bus_pci_open(struct inode * inode,struct file * file)263 static int proc_bus_pci_open(struct inode *inode, struct file *file)
264 {
265 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
266
267 if (!fpriv)
268 return -ENOMEM;
269
270 fpriv->mmap_state = pci_mmap_io;
271 fpriv->write_combine = 0;
272
273 file->private_data = fpriv;
274
275 return 0;
276 }
277
proc_bus_pci_release(struct inode * inode,struct file * file)278 static int proc_bus_pci_release(struct inode *inode, struct file *file)
279 {
280 kfree(file->private_data);
281 file->private_data = NULL;
282
283 return 0;
284 }
285 #endif /* HAVE_PCI_MMAP */
286
287 static struct file_operations proc_bus_pci_operations = {
288 llseek: proc_bus_pci_lseek,
289 read: proc_bus_pci_read,
290 write: proc_bus_pci_write,
291 ioctl: proc_bus_pci_ioctl,
292 #ifdef HAVE_PCI_MMAP
293 open: proc_bus_pci_open,
294 release: proc_bus_pci_release,
295 mmap: proc_bus_pci_mmap,
296 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
297 get_unmapped_area: get_pci_unmapped_area,
298 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
299 #endif /* HAVE_PCI_MMAP */
300 };
301
302 #if BITS_PER_LONG == 32
303 #define LONG_FORMAT "\t%08lx"
304 #else
305 #define LONG_FORMAT "\t%16lx"
306 #endif
307
308 /* iterator */
pci_seq_start(struct seq_file * m,loff_t * pos)309 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
310 {
311 struct list_head *p = &pci_devices;
312 loff_t n = *pos;
313
314 /* XXX: surely we need some locking for traversing the list? */
315 while (n--) {
316 p = p->next;
317 if (p == &pci_devices)
318 return NULL;
319 }
320 return p;
321 }
pci_seq_next(struct seq_file * m,void * v,loff_t * pos)322 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
323 {
324 struct list_head *p = v;
325 (*pos)++;
326 return p->next != &pci_devices ? p->next : NULL;
327 }
pci_seq_stop(struct seq_file * m,void * v)328 static void pci_seq_stop(struct seq_file *m, void *v)
329 {
330 /* release whatever locks we need */
331 }
332
show_device(struct seq_file * m,void * v)333 static int show_device(struct seq_file *m, void *v)
334 {
335 struct list_head *p = v;
336 const struct pci_dev *dev;
337 const struct pci_driver *drv;
338 int i;
339
340 if (p == &pci_devices)
341 return 0;
342
343 dev = pci_dev_g(p);
344 drv = pci_dev_driver(dev);
345 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
346 dev->bus->number,
347 dev->devfn,
348 dev->vendor,
349 dev->device,
350 dev->irq);
351 /* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
352 for(i=0; i<7; i++)
353 seq_printf(m, LONG_FORMAT,
354 dev->resource[i].start |
355 (dev->resource[i].flags & PCI_REGION_FLAG_MASK));
356 for(i=0; i<7; i++)
357 seq_printf(m, LONG_FORMAT,
358 dev->resource[i].start < dev->resource[i].end ?
359 dev->resource[i].end - dev->resource[i].start + 1 : 0);
360 seq_putc(m, '\t');
361 if (drv)
362 seq_printf(m, "%s", drv->name);
363 seq_putc(m, '\n');
364 return 0;
365 }
366
367 static struct seq_operations proc_bus_pci_devices_op = {
368 start: pci_seq_start,
369 next: pci_seq_next,
370 stop: pci_seq_stop,
371 show: show_device
372 };
373
374 struct proc_dir_entry *proc_bus_pci_dir;
375
pci_proc_attach_device(struct pci_dev * dev)376 int pci_proc_attach_device(struct pci_dev *dev)
377 {
378 struct pci_bus *bus = dev->bus;
379 struct proc_dir_entry *de, *e;
380 char name[16];
381
382 if (!(de = bus->procdir)) {
383 sprintf(name, "%02x", bus->number);
384 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
385 if (!de)
386 return -ENOMEM;
387 }
388 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
389 e = dev->procent = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, de);
390 if (!e)
391 return -ENOMEM;
392 e->proc_fops = &proc_bus_pci_operations;
393 e->data = dev;
394 e->size = PCI_CFG_SPACE_SIZE;
395 return 0;
396 }
397
pci_proc_detach_device(struct pci_dev * dev)398 int pci_proc_detach_device(struct pci_dev *dev)
399 {
400 struct proc_dir_entry *e;
401
402 if ((e = dev->procent)) {
403 if (atomic_read(&e->count))
404 return -EBUSY;
405 remove_proc_entry(e->name, dev->bus->procdir);
406 dev->procent = NULL;
407 }
408 return 0;
409 }
410
pci_proc_attach_bus(struct pci_bus * bus)411 int pci_proc_attach_bus(struct pci_bus* bus)
412 {
413 struct proc_dir_entry *de = bus->procdir;
414
415 if (!de) {
416 char name[16];
417 sprintf(name, "%02x", bus->number);
418 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
419 if (!de)
420 return -ENOMEM;
421 }
422 return 0;
423 }
424
pci_proc_detach_bus(struct pci_bus * bus)425 int pci_proc_detach_bus(struct pci_bus* bus)
426 {
427 struct proc_dir_entry *de = bus->procdir;
428 if (de)
429 remove_proc_entry(de->name, proc_bus_pci_dir);
430 return 0;
431 }
432
433
434 /*
435 * Backward compatible /proc/pci interface.
436 */
437
438 /*
439 * Convert some of the configuration space registers of the device at
440 * address (bus,devfn) into a string (possibly several lines each).
441 * The configuration string is stored starting at buf[len]. If the
442 * string would exceed the size of the buffer (SIZE), 0 is returned.
443 */
show_dev_config(struct seq_file * m,void * v)444 static int show_dev_config(struct seq_file *m, void *v)
445 {
446 struct list_head *p = v;
447 struct pci_dev *dev;
448 struct pci_driver *drv;
449 u32 class_rev;
450 unsigned char latency, min_gnt, max_lat, *class;
451 int reg;
452
453 if (p == &pci_devices) {
454 seq_puts(m, "PCI devices found:\n");
455 return 0;
456 }
457
458 dev = pci_dev_g(p);
459 drv = pci_dev_driver(dev);
460
461 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
462 pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
463 pci_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
464 pci_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
465 seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
466 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
467 class = pci_class_name(class_rev >> 16);
468 if (class)
469 seq_printf(m, " %s", class);
470 else
471 seq_printf(m, " Class %04x", class_rev >> 16);
472 seq_printf(m, ": %s (rev %d).\n", dev->name, class_rev & 0xff);
473
474 if (dev->irq)
475 seq_printf(m, " IRQ %d.\n", dev->irq);
476
477 if (latency || min_gnt || max_lat) {
478 seq_printf(m, " Master Capable. ");
479 if (latency)
480 seq_printf(m, "Latency=%d. ", latency);
481 else
482 seq_puts(m, "No bursts. ");
483 if (min_gnt)
484 seq_printf(m, "Min Gnt=%d.", min_gnt);
485 if (max_lat)
486 seq_printf(m, "Max Lat=%d.", max_lat);
487 seq_putc(m, '\n');
488 }
489
490 for (reg = 0; reg < 6; reg++) {
491 struct resource *res = dev->resource + reg;
492 unsigned long base, end, flags;
493
494 base = res->start;
495 end = res->end;
496 flags = res->flags;
497 if (!end)
498 continue;
499
500 if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
501 seq_printf(m, " I/O at 0x%lx [0x%lx].\n",
502 base, end);
503 } else {
504 const char *pref, *type = "unknown";
505
506 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
507 pref = "P";
508 else
509 pref = "Non-p";
510 switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
511 case PCI_BASE_ADDRESS_MEM_TYPE_32:
512 type = "32 bit"; break;
513 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
514 type = "20 bit"; break;
515 case PCI_BASE_ADDRESS_MEM_TYPE_64:
516 type = "64 bit"; break;
517 }
518 seq_printf(m, " %srefetchable %s memory at "
519 "0x%lx [0x%lx].\n", pref, type,
520 base,
521 end);
522 }
523 }
524 return 0;
525 }
526
527 static struct seq_operations proc_pci_op = {
528 start: pci_seq_start,
529 next: pci_seq_next,
530 stop: pci_seq_stop,
531 show: show_dev_config
532 };
533
proc_bus_pci_dev_open(struct inode * inode,struct file * file)534 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
535 {
536 return seq_open(file, &proc_bus_pci_devices_op);
537 }
538 static struct file_operations proc_bus_pci_dev_operations = {
539 open: proc_bus_pci_dev_open,
540 read: seq_read,
541 llseek: seq_lseek,
542 release: seq_release,
543 };
proc_pci_open(struct inode * inode,struct file * file)544 static int proc_pci_open(struct inode *inode, struct file *file)
545 {
546 return seq_open(file, &proc_pci_op);
547 }
548 static struct file_operations proc_pci_operations = {
549 open: proc_pci_open,
550 read: seq_read,
551 llseek: seq_lseek,
552 release: seq_release,
553 };
554
pci_proc_init(void)555 static int __init pci_proc_init(void)
556 {
557 if (pci_present()) {
558 struct proc_dir_entry *entry;
559 struct pci_dev *dev;
560 proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
561 entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
562 if (entry)
563 entry->proc_fops = &proc_bus_pci_dev_operations;
564 pci_for_each_dev(dev) {
565 pci_proc_attach_device(dev);
566 }
567 entry = create_proc_entry("pci", 0, NULL);
568 if (entry)
569 entry->proc_fops = &proc_pci_operations;
570 }
571 return 0;
572 }
573
574 __initcall(pci_proc_init);
575