1 /*
2 *
3 * Alchemy Semi Au1000 IrDA driver
4 *
5 * Copyright 2001 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * ########################################################################
10 *
11 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23 *
24 * ########################################################################
25 *
26 *
27 */
28
29 #ifndef __mips__
30 #error This driver only works with MIPS architectures!
31 #endif
32
33
34 #include <linux/config.h>
35 #include <linux/module.h>
36 #include <linux/types.h>
37 #include <linux/init.h>
38 #include <linux/errno.h>
39 #include <linux/netdevice.h>
40 #include <linux/slab.h>
41 #include <linux/rtnetlink.h>
42 #include <linux/interrupt.h>
43 #include <linux/pm.h>
44
45 #include <asm/irq.h>
46 #include <asm/bitops.h>
47 #include <asm/io.h>
48 #include <asm/au1000.h>
49 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100)
50 #include <asm/pb1000.h>
51 #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
52 #include <asm/db1x00.h>
53 #else
54 #error au1k_ir: unsupported board
55 #endif
56
57 #include <net/irda/irda.h>
58 #include <net/irda/irmod.h>
59 #include <net/irda/wrapper.h>
60 #include <net/irda/irda_device.h>
61 #include "net/irda/au1000_ircc.h"
62
63 static int au1k_irda_net_init(struct net_device *);
64 static int au1k_irda_start(struct net_device *);
65 static int au1k_irda_stop(struct net_device *dev);
66 static int au1k_irda_hard_xmit(struct sk_buff *, struct net_device *);
67 static int au1k_irda_rx(struct net_device *);
68 static void au1k_irda_interrupt(int, void *, struct pt_regs *);
69 static void au1k_tx_timeout(struct net_device *);
70 static struct net_device_stats *au1k_irda_stats(struct net_device *);
71 static int au1k_irda_ioctl(struct net_device *, struct ifreq *, int);
72 static int au1k_irda_set_speed(struct net_device *dev, int speed);
73
74 static void *dma_alloc(size_t, dma_addr_t *);
75 static void dma_free(void *, size_t);
76
77 static int qos_mtt_bits = 0x07; /* 1 ms or more */
78 static struct net_device *ir_devs[NUM_IR_IFF];
79 static char version[] __devinitdata =
80 "au1k_ircc:1.2 ppopov@mvista.com\n";
81
82 #define RUN_AT(x) (jiffies + (x))
83
84 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
85 static BCSR * const bcsr = (BCSR *)0xAE000000;
86 #endif
87
88 static spinlock_t ir_lock = SPIN_LOCK_UNLOCKED;
89
90 /*
91 * IrDA peripheral bug. You have to read the register
92 * twice to get the right value.
93 */
read_ir_reg(u32 addr)94 u32 read_ir_reg(u32 addr)
95 {
96 readl(addr);
97 return readl(addr);
98 }
99
100
101 /*
102 * Buffer allocation/deallocation routines. The buffer descriptor returned
103 * has the virtual and dma address of a buffer suitable for
104 * both, receive and transmit operations.
105 */
GetFreeDB(struct au1k_private * aup)106 static db_dest_t *GetFreeDB(struct au1k_private *aup)
107 {
108 db_dest_t *pDB;
109 pDB = aup->pDBfree;
110
111 if (pDB) {
112 aup->pDBfree = pDB->pnext;
113 }
114 return pDB;
115 }
116
ReleaseDB(struct au1k_private * aup,db_dest_t * pDB)117 static void ReleaseDB(struct au1k_private *aup, db_dest_t *pDB)
118 {
119 db_dest_t *pDBfree = aup->pDBfree;
120 if (pDBfree)
121 pDBfree->pnext = pDB;
122 aup->pDBfree = pDB;
123 }
124
125
126 /*
127 DMA memory allocation, derived from pci_alloc_consistent.
128 However, the Au1000 data cache is coherent (when programmed
129 so), therefore we return KSEG0 address, not KSEG1.
130 */
dma_alloc(size_t size,dma_addr_t * dma_handle)131 static void *dma_alloc(size_t size, dma_addr_t * dma_handle)
132 {
133 void *ret;
134 int gfp = GFP_ATOMIC | GFP_DMA;
135
136 ret = (void *) __get_free_pages(gfp, get_order(size));
137
138 if (ret != NULL) {
139 memset(ret, 0, size);
140 *dma_handle = virt_to_bus(ret);
141 ret = (void *)KSEG0ADDR(ret);
142 }
143 return ret;
144 }
145
146
dma_free(void * vaddr,size_t size)147 static void dma_free(void *vaddr, size_t size)
148 {
149 vaddr = (void *)KSEG0ADDR(vaddr);
150 free_pages((unsigned long) vaddr, get_order(size));
151 }
152
153
154 static void
setup_hw_rings(struct au1k_private * aup,u32 rx_base,u32 tx_base)155 setup_hw_rings(struct au1k_private *aup, u32 rx_base, u32 tx_base)
156 {
157 int i;
158 for (i=0; i<NUM_IR_DESC; i++) {
159 aup->rx_ring[i] = (volatile ring_dest_t *)
160 (rx_base + sizeof(ring_dest_t)*i);
161 }
162 for (i=0; i<NUM_IR_DESC; i++) {
163 aup->tx_ring[i] = (volatile ring_dest_t *)
164 (tx_base + sizeof(ring_dest_t)*i);
165 }
166 }
167
168
169 /*
170 * Device has already been stopped at this point.
171 */
au1k_irda_net_uninit(struct net_device * dev)172 static void au1k_irda_net_uninit(struct net_device *dev)
173 {
174 dev->hard_start_xmit = NULL;
175 dev->open = NULL;
176 dev->stop = NULL;
177 dev->do_ioctl = NULL;
178 dev->get_stats = NULL;
179 dev->priv = NULL;
180 }
181
182
au1k_irda_init(void)183 static int au1k_irda_init(void)
184 {
185 static unsigned version_printed = 0;
186 struct net_device *dev;
187 int err;
188
189 if (version_printed++ == 0) printk(version);
190
191 rtnl_lock();
192 dev = dev_alloc("irda%d", &err);
193 if (dev) {
194 dev->irq = AU1000_IRDA_RX_INT; /* TX has its own interrupt */
195 dev->init = au1k_irda_net_init;
196 dev->uninit = au1k_irda_net_uninit;
197 err = register_netdevice(dev);
198
199 if (err)
200 kfree(dev);
201 else
202 ir_devs[0] = dev;
203 printk(KERN_INFO "IrDA: Registered device %s\n", dev->name);
204 }
205 rtnl_unlock();
206 return err;
207 }
208
au1k_irda_init_iobuf(iobuff_t * io,int size)209 static int au1k_irda_init_iobuf(iobuff_t *io, int size)
210 {
211 io->head = kmalloc(size, GFP_KERNEL);
212 if (io->head != NULL) {
213 io->truesize = size;
214 io->in_frame = FALSE;
215 io->state = OUTSIDE_FRAME;
216 io->data = io->head;
217 }
218 return io->head ? 0 : -ENOMEM;
219 }
220
au1k_irda_net_init(struct net_device * dev)221 static int au1k_irda_net_init(struct net_device *dev)
222 {
223 struct au1k_private *aup = NULL;
224 int i, retval = 0, err;
225 db_dest_t *pDB, *pDBfree;
226 dma_addr_t temp;
227
228 dev->priv = kmalloc(sizeof(struct au1k_private), GFP_KERNEL);
229 if (dev->priv == NULL) {
230 retval = -ENOMEM;
231 goto out;
232 }
233 memset(dev->priv, 0, sizeof(struct au1k_private));
234 aup = dev->priv;
235
236 err = au1k_irda_init_iobuf(&aup->rx_buff, 14384);
237 if (err)
238 goto out;
239
240 dev->open = au1k_irda_start;
241 dev->hard_start_xmit = au1k_irda_hard_xmit;
242 dev->stop = au1k_irda_stop;
243 dev->get_stats = au1k_irda_stats;
244 dev->do_ioctl = au1k_irda_ioctl;
245 dev->tx_timeout = au1k_tx_timeout;
246
247 irda_device_setup(dev);
248 irda_init_max_qos_capabilies(&aup->qos);
249
250 /* The only value we must override it the baudrate */
251 aup->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
252 IR_115200|IR_576000 |(IR_4000000 << 8);
253
254 aup->qos.min_turn_time.bits = qos_mtt_bits;
255 irda_qos_bits_to_value(&aup->qos);
256
257
258 /* Tx ring follows rx ring + 512 bytes */
259 /* we need a 1k aligned buffer */
260 aup->rx_ring[0] = (ring_dest_t *)
261 dma_alloc(2*MAX_NUM_IR_DESC*(sizeof(ring_dest_t)), &temp);
262
263 /* allocate the data buffers */
264 aup->db[0].vaddr =
265 (void *)dma_alloc(MAX_BUF_SIZE * 2*NUM_IR_DESC, &temp);
266 if (!aup->db[0].vaddr || !aup->rx_ring[0]) {
267 retval = -ENOMEM;
268 goto out;
269 }
270
271 setup_hw_rings(aup, (u32)aup->rx_ring[0], (u32)aup->rx_ring[0] + 512);
272
273 pDBfree = NULL;
274 pDB = aup->db;
275 for (i=0; i<(2*NUM_IR_DESC); i++) {
276 pDB->pnext = pDBfree;
277 pDBfree = pDB;
278 pDB->vaddr =
279 (u32 *)((unsigned)aup->db[0].vaddr + MAX_BUF_SIZE*i);
280 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
281 pDB++;
282 }
283 aup->pDBfree = pDBfree;
284
285 /* attach a data buffer to each descriptor */
286 for (i=0; i<NUM_IR_DESC; i++) {
287 pDB = GetFreeDB(aup);
288 if (!pDB) goto out;
289 aup->rx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
290 aup->rx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
291 aup->rx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
292 aup->rx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
293 aup->rx_db_inuse[i] = pDB;
294 }
295 for (i=0; i<NUM_IR_DESC; i++) {
296 pDB = GetFreeDB(aup);
297 if (!pDB) goto out;
298 aup->tx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
299 aup->tx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
300 aup->tx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
301 aup->tx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
302 aup->tx_ring[i]->count_0 = 0;
303 aup->tx_ring[i]->count_1 = 0;
304 aup->tx_ring[i]->flags = 0;
305 aup->tx_db_inuse[i] = pDB;
306 }
307
308 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
309 /* power on */
310 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
311 bcsr->resets |= BCSR_RESETS_IRDA_MODE_FULL;
312 au_sync();
313 #endif
314
315 return 0;
316
317 out:
318 if (aup->db[0].vaddr)
319 dma_free((void *)aup->db[0].vaddr,
320 MAX_BUF_SIZE * 2*NUM_IR_DESC);
321 if (aup->rx_ring[0])
322 kfree((void *)aup->rx_ring[0]);
323 if (aup->rx_buff.head)
324 kfree(aup->rx_buff.head);
325 if (dev->priv != NULL)
326 kfree(dev->priv);
327 unregister_netdevice(dev);
328 printk(KERN_ERR "%s: au1k_init_module failed. Returns %d\n",
329 dev->name, retval);
330 return retval;
331 }
332
333
au1k_init(struct net_device * dev)334 static int au1k_init(struct net_device *dev)
335 {
336 struct au1k_private *aup = (struct au1k_private *) dev->priv;
337 int i;
338 u32 control;
339 u32 ring_address;
340
341 /* bring the device out of reset */
342 control = 0xe; /* coherent, clock enable, one half system clock */
343
344 #ifndef CONFIG_CPU_LITTLE_ENDIAN
345 control |= 1;
346 #endif
347 aup->tx_head = 0;
348 aup->tx_tail = 0;
349 aup->rx_head = 0;
350
351 for (i=0; i<NUM_IR_DESC; i++) {
352 aup->rx_ring[i]->flags = AU_OWN;
353 }
354
355 writel(control, IR_INTERFACE_CONFIG);
356 au_sync_delay(10);
357
358 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable PHY */
359 au_sync_delay(1);
360
361 writel(MAX_BUF_SIZE, IR_MAX_PKT_LEN);
362
363 ring_address = (u32)virt_to_phys((void *)aup->rx_ring[0]);
364 writel(ring_address >> 26, IR_RING_BASE_ADDR_H);
365 writel((ring_address >> 10) & 0xffff, IR_RING_BASE_ADDR_L);
366
367 writel(RING_SIZE_64<<8 | RING_SIZE_64<<12, IR_RING_SIZE);
368
369 writel(1<<2 | IR_ONE_PIN, IR_CONFIG_2); /* 48MHz */
370 writel(0, IR_RING_ADDR_CMPR);
371
372 au1k_irda_set_speed(dev, 9600);
373 return 0;
374 }
375
au1k_irda_start(struct net_device * dev)376 static int au1k_irda_start(struct net_device *dev)
377 {
378 int retval;
379 char hwname[32];
380 struct au1k_private *aup = (struct au1k_private *) dev->priv;
381
382 MOD_INC_USE_COUNT;
383
384 if ((retval = au1k_init(dev))) {
385 printk(KERN_ERR "%s: error in au1k_init\n", dev->name);
386 MOD_DEC_USE_COUNT;
387 return retval;
388 }
389
390 if ((retval = request_irq(AU1000_IRDA_TX_INT, &au1k_irda_interrupt,
391 0, dev->name, dev))) {
392 printk(KERN_ERR "%s: unable to get IRQ %d\n",
393 dev->name, dev->irq);
394 MOD_DEC_USE_COUNT;
395 return retval;
396 }
397 if ((retval = request_irq(AU1000_IRDA_RX_INT, &au1k_irda_interrupt,
398 0, dev->name, dev))) {
399 free_irq(AU1000_IRDA_TX_INT, dev);
400 printk(KERN_ERR "%s: unable to get IRQ %d\n",
401 dev->name, dev->irq);
402 MOD_DEC_USE_COUNT;
403 return retval;
404 }
405
406 /* Give self a hardware name */
407 sprintf(hwname, "Au1000 SIR/FIR");
408 aup->irlap = irlap_open(dev, &aup->qos, hwname);
409 netif_start_queue(dev);
410
411 writel(read_ir_reg(IR_CONFIG_2) | 1<<8, IR_CONFIG_2); /* int enable */
412
413 aup->timer.expires = RUN_AT((3*HZ));
414 aup->timer.data = (unsigned long)dev;
415 return 0;
416 }
417
au1k_irda_stop(struct net_device * dev)418 static int au1k_irda_stop(struct net_device *dev)
419 {
420 struct au1k_private *aup = (struct au1k_private *) dev->priv;
421
422 /* disable interrupts */
423 writel(read_ir_reg(IR_CONFIG_2) & ~(1<<8), IR_CONFIG_2);
424 writel(0, IR_CONFIG_1);
425 writel(0, IR_INTERFACE_CONFIG); /* disable clock */
426 au_sync();
427
428 if (aup->irlap) {
429 irlap_close(aup->irlap);
430 aup->irlap = NULL;
431 }
432
433 netif_stop_queue(dev);
434 del_timer(&aup->timer);
435
436 /* disable the interrupt */
437 free_irq(AU1000_IRDA_TX_INT, dev);
438 free_irq(AU1000_IRDA_RX_INT, dev);
439 MOD_DEC_USE_COUNT;
440 return 0;
441 }
442
au1k_irda_exit(void)443 static void __exit au1k_irda_exit(void)
444 {
445 struct net_device *dev = ir_devs[0];
446 struct au1k_private *aup = (struct au1k_private *) dev->priv;
447
448 if (!dev) {
449 printk(KERN_ERR "au1k_ircc no dev found\n");
450 return;
451 }
452 if (aup->db[0].vaddr) {
453 dma_free((void *)aup->db[0].vaddr,
454 MAX_BUF_SIZE * 2*NUM_IR_DESC);
455 aup->db[0].vaddr = 0;
456 }
457 if (aup->rx_ring[0]) {
458 dma_free((void *)aup->rx_ring[0],
459 2*MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
460 aup->rx_ring[0] = 0;
461 }
462 rtnl_lock();
463 unregister_netdevice(dev);
464 rtnl_unlock();
465 ir_devs[0] = 0;
466 }
467
468
469 static inline void
update_tx_stats(struct net_device * dev,u32 status,u32 pkt_len)470 update_tx_stats(struct net_device *dev, u32 status, u32 pkt_len)
471 {
472 struct au1k_private *aup = (struct au1k_private *) dev->priv;
473 struct net_device_stats *ps = &aup->stats;
474
475 ps->tx_packets++;
476 ps->tx_bytes += pkt_len;
477
478 if (status & IR_TX_ERROR) {
479 ps->tx_errors++;
480 ps->tx_aborted_errors++;
481 }
482 }
483
484
au1k_tx_ack(struct net_device * dev)485 static void au1k_tx_ack(struct net_device *dev)
486 {
487 struct au1k_private *aup = (struct au1k_private *) dev->priv;
488 volatile ring_dest_t *ptxd;
489
490 ptxd = aup->tx_ring[aup->tx_tail];
491 while (!(ptxd->flags & AU_OWN) && (aup->tx_tail != aup->tx_head)) {
492 update_tx_stats(dev, ptxd->flags,
493 ptxd->count_1<<8 | ptxd->count_0);
494 ptxd->count_0 = 0;
495 ptxd->count_1 = 0;
496 au_sync();
497
498 aup->tx_tail = (aup->tx_tail + 1) & (NUM_IR_DESC - 1);
499 ptxd = aup->tx_ring[aup->tx_tail];
500
501 if (aup->tx_full) {
502 aup->tx_full = 0;
503 netif_wake_queue(dev);
504 }
505 }
506
507 if (aup->tx_tail == aup->tx_head) {
508 if (aup->newspeed) {
509 au1k_irda_set_speed(dev, aup->newspeed);
510 aup->newspeed = 0;
511 }
512 else {
513 writel(read_ir_reg(IR_CONFIG_1) & ~IR_TX_ENABLE,
514 IR_CONFIG_1);
515 au_sync();
516 writel(read_ir_reg(IR_CONFIG_1) | IR_RX_ENABLE,
517 IR_CONFIG_1);
518 writel(0, IR_RING_PROMPT);
519 au_sync();
520 }
521 }
522 }
523
524
525 /*
526 * Au1000 transmit routine.
527 */
au1k_irda_hard_xmit(struct sk_buff * skb,struct net_device * dev)528 static int au1k_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
529 {
530 struct au1k_private *aup = (struct au1k_private *) dev->priv;
531 int speed = irda_get_next_speed(skb);
532 volatile ring_dest_t *ptxd;
533 u32 len;
534
535 u32 flags;
536 db_dest_t *pDB;
537
538 if (speed != aup->speed && speed != -1) {
539 aup->newspeed = speed;
540 }
541
542 if ((skb->len == 0) && (aup->newspeed)) {
543 if (aup->tx_tail == aup->tx_head) {
544 au1k_irda_set_speed(dev, speed);
545 aup->newspeed = 0;
546 }
547 dev_kfree_skb(skb);
548 return 0;
549 }
550
551 ptxd = aup->tx_ring[aup->tx_head];
552 flags = ptxd->flags;
553
554 if (flags & AU_OWN) {
555 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
556 netif_stop_queue(dev);
557 aup->tx_full = 1;
558 return 1;
559 }
560 else if (((aup->tx_head + 1) & (NUM_IR_DESC - 1)) == aup->tx_tail) {
561 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
562 netif_stop_queue(dev);
563 aup->tx_full = 1;
564 return 1;
565 }
566
567 pDB = aup->tx_db_inuse[aup->tx_head];
568
569 #if 0
570 if (read_ir_reg(IR_RX_BYTE_CNT) != 0) {
571 printk("tx warning: rx byte cnt %x\n",
572 read_ir_reg(IR_RX_BYTE_CNT));
573 }
574 #endif
575
576 if (aup->speed == 4000000) {
577 /* FIR */
578 memcpy((void *)pDB->vaddr, skb->data, skb->len);
579 ptxd->count_0 = skb->len & 0xff;
580 ptxd->count_1 = (skb->len >> 8) & 0xff;
581
582 }
583 else {
584 /* SIR */
585 len = async_wrap_skb(skb, (u8 *)pDB->vaddr, MAX_BUF_SIZE);
586 ptxd->count_0 = len & 0xff;
587 ptxd->count_1 = (len >> 8) & 0xff;
588 ptxd->flags |= IR_DIS_CRC;
589 au_writel(au_readl(0xae00000c) & ~(1<<13), 0xae00000c);
590 }
591 ptxd->flags |= AU_OWN;
592 au_sync();
593
594 writel(read_ir_reg(IR_CONFIG_1) | IR_TX_ENABLE, IR_CONFIG_1);
595 writel(0, IR_RING_PROMPT);
596 au_sync();
597
598 dev_kfree_skb(skb);
599 aup->tx_head = (aup->tx_head + 1) & (NUM_IR_DESC - 1);
600 dev->trans_start = jiffies;
601 return 0;
602 }
603
604
605 static inline void
update_rx_stats(struct net_device * dev,u32 status,u32 count)606 update_rx_stats(struct net_device *dev, u32 status, u32 count)
607 {
608 struct au1k_private *aup = (struct au1k_private *) dev->priv;
609 struct net_device_stats *ps = &aup->stats;
610
611 ps->rx_packets++;
612
613 if (status & IR_RX_ERROR) {
614 ps->rx_errors++;
615 if (status & (IR_PHY_ERROR|IR_FIFO_OVER))
616 ps->rx_missed_errors++;
617 if (status & IR_MAX_LEN)
618 ps->rx_length_errors++;
619 if (status & IR_CRC_ERROR)
620 ps->rx_crc_errors++;
621 }
622 else
623 ps->rx_bytes += count;
624 }
625
626 /*
627 * Au1000 receive routine.
628 */
au1k_irda_rx(struct net_device * dev)629 static int au1k_irda_rx(struct net_device *dev)
630 {
631 struct au1k_private *aup = (struct au1k_private *) dev->priv;
632 struct sk_buff *skb;
633 volatile ring_dest_t *prxd;
634 u32 flags, count;
635 db_dest_t *pDB;
636
637 prxd = aup->rx_ring[aup->rx_head];
638 flags = prxd->flags;
639
640 while (!(flags & AU_OWN)) {
641 pDB = aup->rx_db_inuse[aup->rx_head];
642 count = prxd->count_1<<8 | prxd->count_0;
643 if (!(flags & IR_RX_ERROR)) {
644 /* good frame */
645 update_rx_stats(dev, flags, count);
646 skb=alloc_skb(count+1,GFP_ATOMIC);
647 if (skb == NULL) {
648 aup->stats.rx_dropped++;
649 continue;
650 }
651 skb_reserve(skb, 1);
652 if (aup->speed == 4000000)
653 skb_put(skb, count);
654 else
655 skb_put(skb, count-2);
656 memcpy(skb->data, (void *)pDB->vaddr, count-2);
657 skb->dev = dev;
658 skb->mac.raw = skb->data;
659 skb->protocol = htons(ETH_P_IRDA);
660 netif_rx(skb);
661 prxd->count_0 = 0;
662 prxd->count_1 = 0;
663 }
664 prxd->flags |= AU_OWN;
665 aup->rx_head = (aup->rx_head + 1) & (NUM_IR_DESC - 1);
666 writel(0, IR_RING_PROMPT);
667 au_sync();
668
669 /* next descriptor */
670 prxd = aup->rx_ring[aup->rx_head];
671 flags = prxd->flags;
672 dev->last_rx = jiffies;
673
674 }
675 return 0;
676 }
677
678
au1k_irda_interrupt(int irq,void * dev_id,struct pt_regs * regs)679 void au1k_irda_interrupt(int irq, void *dev_id, struct pt_regs *regs)
680 {
681 struct net_device *dev = (struct net_device *) dev_id;
682
683 if (dev == NULL) {
684 printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
685 return;
686 }
687
688 writel(0, IR_INT_CLEAR); /* ack irda interrupts */
689
690 au1k_irda_rx(dev);
691 au1k_tx_ack(dev);
692 }
693
694
695 /*
696 * The Tx ring has been full longer than the watchdog timeout
697 * value. The transmitter must be hung?
698 */
au1k_tx_timeout(struct net_device * dev)699 static void au1k_tx_timeout(struct net_device *dev)
700 {
701 u32 speed;
702 struct au1k_private *aup = (struct au1k_private *) dev->priv;
703
704 printk(KERN_ERR "%s: tx timeout\n", dev->name);
705 speed = aup->speed;
706 aup->speed = 0;
707 au1k_irda_set_speed(dev, speed);
708 aup->tx_full = 0;
709 netif_wake_queue(dev);
710 }
711
712
713 /*
714 * Set the IrDA communications speed.
715 */
716 static int
au1k_irda_set_speed(struct net_device * dev,int speed)717 au1k_irda_set_speed(struct net_device *dev, int speed)
718 {
719 unsigned long flags;
720 struct au1k_private *aup = (struct au1k_private *) dev->priv;
721 u32 control;
722 int ret = 0, timeout = 10, i;
723 volatile ring_dest_t *ptxd;
724 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
725 unsigned long irda_resets;
726 #endif
727
728 if (speed == aup->speed)
729 return ret;
730
731 spin_lock_irqsave(&ir_lock, flags);
732
733 /* disable PHY first */
734 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE);
735
736 /* disable RX/TX */
737 writel(read_ir_reg(IR_CONFIG_1) & ~(IR_RX_ENABLE|IR_TX_ENABLE),
738 IR_CONFIG_1);
739 au_sync_delay(1);
740 while (read_ir_reg(IR_ENABLE) & (IR_RX_STATUS | IR_TX_STATUS)) {
741 mdelay(1);
742 if (!timeout--) {
743 printk(KERN_ERR "%s: rx/tx disable timeout\n",
744 dev->name);
745 break;
746 }
747 }
748
749 /* disable DMA */
750 writel(read_ir_reg(IR_CONFIG_1) & ~IR_DMA_ENABLE, IR_CONFIG_1);
751 au_sync_delay(1);
752
753 /*
754 * After we disable tx/rx. the index pointers
755 * go back to zero.
756 */
757 aup->tx_head = aup->tx_tail = aup->rx_head = 0;
758 for (i=0; i<NUM_IR_DESC; i++) {
759 ptxd = aup->tx_ring[i];
760 ptxd->flags = 0;
761 ptxd->count_0 = 0;
762 ptxd->count_1 = 0;
763 }
764
765 for (i=0; i<NUM_IR_DESC; i++) {
766 ptxd = aup->rx_ring[i];
767 ptxd->count_0 = 0;
768 ptxd->count_1 = 0;
769 ptxd->flags = AU_OWN;
770 }
771
772 if (speed == 4000000) {
773 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
774 bcsr->resets |= BCSR_RESETS_FIR_SEL;
775 #else /* Pb1000 and Pb1100 */
776 writel(1<<13, CPLD_AUX1);
777 #endif
778 }
779 else {
780 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
781 bcsr->resets &= ~BCSR_RESETS_FIR_SEL;
782 #else /* Pb1000 and Pb1100 */
783 writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1);
784 #endif
785 }
786
787 switch (speed) {
788 case 9600:
789 writel(11<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
790 writel(IR_SIR_MODE, IR_CONFIG_1);
791 break;
792 case 19200:
793 writel(5<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
794 writel(IR_SIR_MODE, IR_CONFIG_1);
795 break;
796 case 38400:
797 writel(2<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
798 writel(IR_SIR_MODE, IR_CONFIG_1);
799 break;
800 case 57600:
801 writel(1<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
802 writel(IR_SIR_MODE, IR_CONFIG_1);
803 break;
804 case 115200:
805 writel(12<<5, IR_WRITE_PHY_CONFIG);
806 writel(IR_SIR_MODE, IR_CONFIG_1);
807 break;
808 case 4000000:
809 writel(0xF, IR_WRITE_PHY_CONFIG);
810 writel(IR_FIR|IR_DMA_ENABLE|IR_RX_ENABLE, IR_CONFIG_1);
811 break;
812 default:
813 printk(KERN_ERR "%s unsupported speed %x\n", dev->name, speed);
814 ret = -EINVAL;
815 break;
816 }
817
818 aup->speed = speed;
819 writel(read_ir_reg(IR_ENABLE) | 0x8000, IR_ENABLE);
820 au_sync();
821
822 control = read_ir_reg(IR_ENABLE);
823 writel(0, IR_RING_PROMPT);
824 au_sync();
825
826 if (control & (1<<14)) {
827 printk(KERN_ERR "%s: configuration error\n", dev->name);
828 }
829 else {
830 if (control & (1<<11))
831 printk(KERN_DEBUG "%s Valid SIR config\n", dev->name);
832 if (control & (1<<12))
833 printk(KERN_DEBUG "%s Valid MIR config\n", dev->name);
834 if (control & (1<<13))
835 printk(KERN_DEBUG "%s Valid FIR config\n", dev->name);
836 if (control & (1<<10))
837 printk(KERN_DEBUG "%s TX enabled\n", dev->name);
838 if (control & (1<<9))
839 printk(KERN_DEBUG "%s RX enabled\n", dev->name);
840 }
841
842 spin_unlock_irqrestore(&ir_lock, flags);
843 return ret;
844 }
845
846 static int
au1k_irda_ioctl(struct net_device * dev,struct ifreq * ifreq,int cmd)847 au1k_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
848 {
849 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
850 struct au1k_private *aup = dev->priv;
851 int ret = -EOPNOTSUPP;
852
853 switch (cmd) {
854 case SIOCSBANDWIDTH:
855 if (capable(CAP_NET_ADMIN)) {
856 /*
857 * We are unable to set the speed if the
858 * device is not running.
859 */
860 if (aup->open)
861 ret = au1k_irda_set_speed(dev,
862 rq->ifr_baudrate);
863 else {
864 printk(KERN_ERR "%s ioctl: !netif_running\n",
865 dev->name);
866 ret = 0;
867 }
868 }
869 break;
870
871 case SIOCSMEDIABUSY:
872 ret = -EPERM;
873 if (capable(CAP_NET_ADMIN)) {
874 irda_device_set_media_busy(dev, TRUE);
875 ret = 0;
876 }
877 break;
878
879 case SIOCGRECEIVING:
880 rq->ifr_receiving = 0;
881 break;
882 default:
883 break;
884 }
885 return ret;
886 }
887
888
au1k_irda_stats(struct net_device * dev)889 static struct net_device_stats *au1k_irda_stats(struct net_device *dev)
890 {
891 struct au1k_private *aup = (struct au1k_private *) dev->priv;
892 return &aup->stats;
893 }
894
895 #ifdef MODULE
896 MODULE_AUTHOR("Pete Popov <ppopov@mvista.com>");
897 MODULE_DESCRIPTION("Au1000 IrDA Device Driver");
898 MODULE_LICENSE("GPL");
899
900 module_init(au1k_irda_init);
901 module_exit(au1k_irda_exit);
902 #endif /* MODULE */
903