1 #ifndef PIIX_H 2 #define PIIX_H 3 4 #include <linux/config.h> 5 #include <linux/pci.h> 6 #include <linux/ide.h> 7 8 #define PIIX_DEBUG_DRIVE_INFO 0 9 10 #define DISPLAY_PIIX_TIMINGS 11 12 #if defined(DISPLAY_PIIX_TIMINGS) && defined(CONFIG_PROC_FS) 13 #include <linux/stat.h> 14 #include <linux/proc_fs.h> 15 16 static u8 piix_proc; 17 18 static int piix_get_info(char *, char **, off_t, int); 19 20 static ide_pci_host_proc_t piix_procs[] __devinitdata = { 21 { 22 .name = "piix", 23 .set = 1, 24 .get_info = piix_get_info, 25 .parent = NULL, 26 }, 27 }; 28 #endif /* defined(DISPLAY_PIIX_TIMINGS) && defined(CONFIG_PROC_FS) */ 29 30 static void init_setup_piix(struct pci_dev *, ide_pci_device_t *); 31 static unsigned int __devinit init_chipset_piix(struct pci_dev *, const char *); 32 static void init_hwif_piix(ide_hwif_t *); 33 static void init_dma_piix(ide_hwif_t *, unsigned long); 34 35 36 /* 37 * Table of the various PIIX capability blocks 38 * 39 */ 40 41 static ide_pci_device_t piix_pci_info[] __devinitdata = { 42 { /* 0 */ 43 .vendor = PCI_VENDOR_ID_INTEL, 44 .device = PCI_DEVICE_ID_INTEL_82371FB_0, 45 .name = "PIIXa", 46 .init_setup = init_setup_piix, 47 .init_chipset = init_chipset_piix, 48 .init_iops = NULL, 49 .init_hwif = init_hwif_piix, 50 .init_dma = init_dma_piix, 51 .channels = 2, 52 .autodma = AUTODMA, 53 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 54 .bootable = ON_BOARD, 55 .extra = 0, 56 },{ /* 1 */ 57 .vendor = PCI_VENDOR_ID_INTEL, 58 .device = PCI_DEVICE_ID_INTEL_82371FB_1, 59 .name = "PIIXb", 60 .init_setup = init_setup_piix, 61 .init_chipset = init_chipset_piix, 62 .init_iops = NULL, 63 .init_hwif = init_hwif_piix, 64 .init_dma = init_dma_piix, 65 .channels = 2, 66 .autodma = AUTODMA, 67 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 68 .bootable = ON_BOARD, 69 .extra = 0, 70 },{ /* 2 */ 71 .vendor = PCI_VENDOR_ID_INTEL, 72 .device = PCI_DEVICE_ID_INTEL_82371MX, 73 .name = "MPIIX", 74 .init_setup = init_setup_piix, 75 .init_chipset = NULL, 76 .init_iops = NULL, 77 .init_hwif = init_hwif_piix, 78 .init_dma = NULL, 79 .channels = 2, 80 .autodma = NODMA, 81 .enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}}, 82 .bootable = ON_BOARD, 83 .extra = 0, 84 },{ /* 3 */ 85 .vendor = PCI_VENDOR_ID_INTEL, 86 .device = PCI_DEVICE_ID_INTEL_82371SB_1, 87 .name = "PIIX3", 88 .init_setup = init_setup_piix, 89 .init_chipset = init_chipset_piix, 90 .init_iops = NULL, 91 .init_hwif = init_hwif_piix, 92 .init_dma = init_dma_piix, 93 .channels = 2, 94 .autodma = AUTODMA, 95 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 96 .bootable = ON_BOARD, 97 .extra = 0, 98 },{ /* 4 */ 99 .vendor = PCI_VENDOR_ID_INTEL, 100 .device = PCI_DEVICE_ID_INTEL_82371AB, 101 .name = "PIIX4", 102 .init_setup = init_setup_piix, 103 .init_chipset = init_chipset_piix, 104 .init_iops = NULL, 105 .init_hwif = init_hwif_piix, 106 .init_dma = init_dma_piix, 107 .channels = 2, 108 .autodma = AUTODMA, 109 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 110 .bootable = ON_BOARD, 111 .extra = 0, 112 },{ /* 5 */ 113 .vendor = PCI_VENDOR_ID_INTEL, 114 .device = PCI_DEVICE_ID_INTEL_82801AB_1, 115 .name = "ICH0", 116 .init_setup = init_setup_piix, 117 .init_chipset = init_chipset_piix, 118 .init_iops = NULL, 119 .init_hwif = init_hwif_piix, 120 .init_dma = init_dma_piix, 121 .channels = 2, 122 .autodma = AUTODMA, 123 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 124 .bootable = ON_BOARD, 125 .extra = 0, 126 },{ /* 6 */ 127 .vendor = PCI_VENDOR_ID_INTEL, 128 .device = PCI_DEVICE_ID_INTEL_82443MX_1, 129 .name = "PIIX4", 130 .init_setup = init_setup_piix, 131 .init_chipset = init_chipset_piix, 132 .init_iops = NULL, 133 .init_hwif = init_hwif_piix, 134 .init_dma = init_dma_piix, 135 .channels = 2, 136 .autodma = AUTODMA, 137 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 138 .bootable = ON_BOARD, 139 .extra = 0, 140 },{ /* 7 */ 141 .vendor = PCI_VENDOR_ID_INTEL, 142 .device = PCI_DEVICE_ID_INTEL_82801AA_1, 143 .name = "ICH", 144 .init_setup = init_setup_piix, 145 .init_chipset = init_chipset_piix, 146 .init_iops = NULL, 147 .init_hwif = init_hwif_piix, 148 .init_dma = init_dma_piix, 149 .channels = 2, 150 .autodma = AUTODMA, 151 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 152 .bootable = ON_BOARD, 153 .extra = 0, 154 },{ /* 8 */ 155 .vendor = PCI_VENDOR_ID_INTEL, 156 .device = PCI_DEVICE_ID_INTEL_82372FB_1, 157 .name = "PIIX4", 158 .init_setup = init_setup_piix, 159 .init_chipset = init_chipset_piix, 160 .init_iops = NULL, 161 .init_hwif = init_hwif_piix, 162 .init_dma = init_dma_piix, 163 .channels = 2, 164 .autodma = AUTODMA, 165 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 166 .bootable = ON_BOARD, 167 .extra = 0, 168 },{ /* 9 */ 169 .vendor = PCI_VENDOR_ID_INTEL, 170 .device = PCI_DEVICE_ID_INTEL_82451NX, 171 .name = "PIIX4", 172 .init_setup = init_setup_piix, 173 .init_chipset = init_chipset_piix, 174 .init_iops = NULL, 175 .init_hwif = init_hwif_piix, 176 .init_dma = init_dma_piix, 177 .channels = 2, 178 .autodma = NOAUTODMA, 179 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 180 .bootable = ON_BOARD, 181 .extra = 0, 182 },{ /* 10 */ 183 .vendor = PCI_VENDOR_ID_INTEL, 184 .device = PCI_DEVICE_ID_INTEL_82801BA_9, 185 .name = "ICH2", 186 .init_setup = init_setup_piix, 187 .init_chipset = init_chipset_piix, 188 .init_iops = NULL, 189 .init_hwif = init_hwif_piix, 190 .init_dma = init_dma_piix, 191 .channels = 2, 192 .autodma = AUTODMA, 193 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 194 .bootable = ON_BOARD, 195 .extra = 0, 196 },{ /* 11 */ 197 .vendor = PCI_VENDOR_ID_INTEL, 198 .device = PCI_DEVICE_ID_INTEL_82801BA_8, 199 .name = "ICH2M", 200 .init_setup = init_setup_piix, 201 .init_chipset = init_chipset_piix, 202 .init_iops = NULL, 203 .init_hwif = init_hwif_piix, 204 .init_dma = init_dma_piix, 205 .channels = 2, 206 .autodma = AUTODMA, 207 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 208 .bootable = ON_BOARD, 209 .extra = 0, 210 },{ /* 12 */ 211 .vendor = PCI_VENDOR_ID_INTEL, 212 .device = PCI_DEVICE_ID_INTEL_82801CA_10, 213 .name = "ICH3M", 214 .init_setup = init_setup_piix, 215 .init_chipset = init_chipset_piix, 216 .init_iops = NULL, 217 .init_hwif = init_hwif_piix, 218 .init_dma = init_dma_piix, 219 .channels = 2, 220 .autodma = AUTODMA, 221 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 222 .bootable = ON_BOARD, 223 .extra = 0, 224 },{ /* 13 */ 225 .vendor = PCI_VENDOR_ID_INTEL, 226 .device = PCI_DEVICE_ID_INTEL_82801CA_11, 227 .name = "ICH3", 228 .init_setup = init_setup_piix, 229 .init_chipset = init_chipset_piix, 230 .init_iops = NULL, 231 .init_hwif = init_hwif_piix, 232 .init_dma = init_dma_piix, 233 .channels = 2, 234 .autodma = AUTODMA, 235 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 236 .bootable = ON_BOARD, 237 .extra = 0, 238 },{ /* 14 */ 239 .vendor = PCI_VENDOR_ID_INTEL, 240 .device = PCI_DEVICE_ID_INTEL_82801DB_11, 241 .name = "ICH4", 242 .init_setup = init_setup_piix, 243 .init_chipset = init_chipset_piix, 244 .init_iops = NULL, 245 .init_hwif = init_hwif_piix, 246 .init_dma = init_dma_piix, 247 .channels = 2, 248 .autodma = AUTODMA, 249 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 250 .bootable = ON_BOARD, 251 .extra = 0, 252 },{ /* 15 */ 253 .vendor = PCI_VENDOR_ID_INTEL, 254 .device = PCI_DEVICE_ID_INTEL_82801EB_11, 255 .name = "ICH5", 256 .init_setup = init_setup_piix, 257 .init_chipset = init_chipset_piix, 258 .init_iops = NULL, 259 .init_hwif = init_hwif_piix, 260 .init_dma = init_dma_piix, 261 .channels = 2, 262 .autodma = AUTODMA, 263 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 264 .bootable = ON_BOARD, 265 .extra = 0, 266 },{ /* 16 */ 267 .vendor = PCI_VENDOR_ID_INTEL, 268 .device = PCI_DEVICE_ID_INTEL_82801E_11, 269 .name = "C-ICH", 270 .init_setup = init_setup_piix, 271 .init_chipset = init_chipset_piix, 272 .init_iops = NULL, 273 .init_hwif = init_hwif_piix, 274 .init_dma = init_dma_piix, 275 .channels = 2, 276 .autodma = AUTODMA, 277 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 278 .bootable = ON_BOARD, 279 .extra = 0, 280 },{ /* 17 */ 281 .vendor = PCI_VENDOR_ID_INTEL, 282 .device = PCI_DEVICE_ID_INTEL_82801DB_10, 283 .name = "ICH4", 284 .init_setup = init_setup_piix, 285 .init_chipset = init_chipset_piix, 286 .init_iops = NULL, 287 .init_hwif = init_hwif_piix, 288 .init_dma = init_dma_piix, 289 .channels = 2, 290 .autodma = AUTODMA, 291 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 292 .bootable = ON_BOARD, 293 .extra = 0, 294 },{ /* 18 */ 295 .vendor = PCI_VENDOR_ID_INTEL, 296 .device = PCI_DEVICE_ID_INTEL_82801EB_1, 297 .name = "ICH5-SATA", 298 .init_setup = init_setup_piix, 299 .init_chipset = init_chipset_piix, 300 .init_iops = NULL, 301 .init_hwif = init_hwif_piix, 302 .init_dma = init_dma_piix, 303 .channels = 2, 304 .autodma = AUTODMA, 305 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 306 .bootable = ON_BOARD, 307 .extra = 0, 308 },{ /* 19 */ 309 .vendor = PCI_VENDOR_ID_INTEL, 310 .device = PCI_DEVICE_ID_INTEL_ESB_2, 311 .name = "ICH5", 312 .init_setup = init_setup_piix, 313 .init_chipset = init_chipset_piix, 314 .init_iops = NULL, 315 .init_hwif = init_hwif_piix, 316 .init_dma = init_dma_piix, 317 .channels = 2, 318 .autodma = AUTODMA, 319 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 320 .bootable = ON_BOARD, 321 .extra = 0, 322 },{ /* 20 */ 323 .vendor = PCI_VENDOR_ID_INTEL, 324 .device = PCI_DEVICE_ID_INTEL_ICH6_2, 325 .name = "ICH6", 326 .init_setup = init_setup_piix, 327 .init_chipset = init_chipset_piix, 328 .init_iops = NULL, 329 .init_hwif = init_hwif_piix, 330 .init_dma = init_dma_piix, 331 .channels = 2, 332 .autodma = AUTODMA, 333 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 334 .bootable = ON_BOARD, 335 .extra = 0, 336 },{ /* 21 */ 337 .vendor = PCI_VENDOR_ID_INTEL, 338 .device = PCI_DEVICE_ID_INTEL_ICH7_21, 339 .name = "ICH7", 340 .init_setup = init_setup_piix, 341 .init_chipset = init_chipset_piix, 342 .init_iops = NULL, 343 .init_hwif = init_hwif_piix, 344 .init_dma = init_dma_piix, 345 .channels = 1, 346 .autodma = AUTODMA, 347 .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, 348 .bootable = ON_BOARD, 349 .extra = 0, 350 },{ 351 .vendor = 0, 352 .device = 0, 353 .channels = 0, 354 .init_setup = NULL, 355 .bootable = EOL, 356 } 357 }; 358 359 #endif /* PIIX_H */ 360