1 /*
2  * PCI Express Hot Plug Controller Driver
3  *
4  * Copyright (C) 1995,2001 Compaq Computer Corporation
5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6  * Copyright (C) 2001 IBM Corp.
7  * Copyright (C) 2003-2004 Intel Corporation
8  *
9  * All rights reserved.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
19  * NON INFRINGEMENT.  See the GNU General Public License for more
20  * details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25  *
26  * Send feedback to <greg@kroah.com>, <dely.l.sy@intel.com>
27  *
28  */
29 
30 #include <linux/config.h>
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/types.h>
34 #include <linux/slab.h>
35 #include <linux/tqueue.h>
36 #include <linux/interrupt.h>
37 #include <linux/delay.h>
38 #include <linux/wait.h>
39 #include <linux/smp_lock.h>
40 #include <linux/pci.h>
41 #include "pciehp.h"
42 #include "pciehprm.h"
43 
44 static u32 configure_new_device(struct controller *ctrl, struct pci_func *func,
45 	u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
46 static int configure_new_function( struct controller *ctrl, struct pci_func *func,
47 	u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev);
48 static void interrupt_event_handler(struct controller *ctrl);
49 
50 static struct semaphore event_semaphore;	/* mutex for process loop (up if something to process) */
51 static struct semaphore event_exit;		/* guard ensure thread has exited before calling it quits */
52 static int event_finished;
53 static unsigned long pushbutton_pending;	/* = 0 */
54 
pciehp_handle_attention_button(u8 hp_slot,void * inst_id)55 u8 pciehp_handle_attention_button(u8 hp_slot, void *inst_id)
56 {
57 	struct controller *ctrl = (struct controller *) inst_id;
58 	struct slot *p_slot;
59 	u8 rc = 0;
60 	u8 getstatus;
61 	struct pci_func *func;
62 	struct event_info *taskInfo;
63 
64 	/* Attention Button Change */
65 	dbg("pciehp:  Attention button interrupt received.\n");
66 
67 	func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
68 
69 	/* This is the structure that tells the worker thread what to do */
70 	taskInfo = &(ctrl->event_queue[ctrl->next_event]);
71 	p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
72 
73 	p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
74 	p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
75 
76 	ctrl->next_event = (ctrl->next_event + 1) % 10;
77 	taskInfo->hp_slot = hp_slot;
78 
79 	rc++;
80 
81 	/*
82 	 *  Button pressed - See if need to TAKE ACTION!!!
83 	 */
84 	info("Button pressed on Slot(%d)\n", ctrl->first_slot + hp_slot);
85 	taskInfo->event_type = INT_BUTTON_PRESS;
86 
87 	if ((p_slot->state == BLINKINGON_STATE)
88 	    || (p_slot->state == BLINKINGOFF_STATE)) {
89 		/* Cancel if we are still blinking; this means that we press the
90 		 * attention again before the 5 sec. limit expires to cancel hot-add
91 		 * or hot-remove
92 		 */
93 		taskInfo->event_type = INT_BUTTON_CANCEL;
94 		info("Button cancel on Slot(%d)\n", ctrl->first_slot + hp_slot);
95 	} else if ((p_slot->state == POWERON_STATE)
96 		   || (p_slot->state == POWEROFF_STATE)) {
97 		/* Ignore if the slot is on power-on or power-off state; this
98 		 * means that the previous attention button action to hot-add or
99 		 * hot-remove is undergoing
100 		 */
101 		taskInfo->event_type = INT_BUTTON_IGNORE;
102 		info("Button ignore on Slot(%d)\n", ctrl->first_slot + hp_slot);
103 	}
104 	if (rc)
105 		up(&event_semaphore);	/* signal event thread that new event is posted */
106 
107 	return 0;
108 
109 }
110 
pciehp_handle_switch_change(u8 hp_slot,void * inst_id)111 u8 pciehp_handle_switch_change(u8 hp_slot, void *inst_id)
112 {
113 	struct controller *ctrl = (struct controller *) inst_id;
114 	struct slot *p_slot;
115 	u8 rc = 0;
116 	u8 getstatus;
117 	struct pci_func *func;
118 	struct event_info *taskInfo;
119 
120 	/* Switch Change */
121 	dbg("pciehp:  Switch interrupt received.\n");
122 
123 	func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
124 
125 	/* this is the structure that tells the worker thread
126 	 * what to do
127 	 */
128 	taskInfo = &(ctrl->event_queue[ctrl->next_event]);
129 	ctrl->next_event = (ctrl->next_event + 1) % 10;
130 	taskInfo->hp_slot = hp_slot;
131 
132 	rc++;
133 	p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
134 	p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
135 	p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
136 
137 	if (getstatus) {
138 		/*
139 		 * Switch opened
140 		 */
141 		info("Latch open on Slot(%d)\n", ctrl->first_slot + hp_slot);
142 		func->switch_save = 0;
143 		taskInfo->event_type = INT_SWITCH_OPEN;
144 	} else {
145 		/*
146 		 *  Switch closed
147 		 */
148 		info("Latch close on Slot(%d)\n", ctrl->first_slot + hp_slot);
149 		func->switch_save = 0x10;
150 		taskInfo->event_type = INT_SWITCH_CLOSE;
151 	}
152 	if (rc)
153 		up(&event_semaphore);	/* signal event thread that new event is posted */
154 
155 	return rc;
156 }
157 
pciehp_handle_presence_change(u8 hp_slot,void * inst_id)158 u8 pciehp_handle_presence_change(u8 hp_slot, void *inst_id)
159 {
160 	struct controller *ctrl = (struct controller *) inst_id;
161 	struct slot *p_slot;
162 	u8 rc = 0;
163 	struct pci_func *func;
164 	struct event_info *taskInfo;
165 
166 	/* Presence Change */
167 	dbg("pciehp:  Presence/Notify input change.\n");
168 
169 	func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
170 
171 	/* This is the structure that tells the worker thread
172 	 * what to do
173 	 */
174 	taskInfo = &(ctrl->event_queue[ctrl->next_event]);
175 	ctrl->next_event = (ctrl->next_event + 1) % 10;
176 	taskInfo->hp_slot = hp_slot;
177 
178 	rc++;
179 	p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
180 
181 	/* Switch is open, assume a presence change
182 	 * Save the presence state
183 	 */
184 	p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
185 	if (func->presence_save) {
186 		/*
187 		 * Card Present
188 		 */
189 		info("Card present on Slot(%d)\n", ctrl->first_slot + hp_slot);
190 		taskInfo->event_type = INT_PRESENCE_ON;
191 	} else {
192 		/*
193 		 * Not Present
194 		 */
195 		info("Card not present on Slot(%d)\n", ctrl->first_slot + hp_slot);
196 		taskInfo->event_type = INT_PRESENCE_OFF;
197 	}
198 	if (rc)
199 		up(&event_semaphore);	/* signal event thread that new event is posted */
200 
201 	return rc;
202 }
203 
pciehp_handle_power_fault(u8 hp_slot,void * inst_id)204 u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id)
205 {
206 	struct controller *ctrl = (struct controller *) inst_id;
207 	struct slot *p_slot;
208 	u8 rc = 0;
209 	struct pci_func *func;
210 	struct event_info *taskInfo;
211 
212 	/* power fault */
213 	dbg("pciehp:  Power fault interrupt received.\n");
214 
215 	func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
216 
217 	/* This is the structure that tells the worker thread
218 	 * what to do
219 	 */
220 	taskInfo = &(ctrl->event_queue[ctrl->next_event]);
221 	ctrl->next_event = (ctrl->next_event + 1) % 10;
222 	taskInfo->hp_slot = hp_slot;
223 
224 	rc++;
225 	p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
226 
227 	if ( !(p_slot->hpc_ops->query_power_fault(p_slot))) {
228 		/*
229 		 * Power fault cleared
230 		 */
231 		info("Power fault cleared on Slot(%d)\n", ctrl->first_slot + hp_slot);
232 		func->status = 0x00;
233 		taskInfo->event_type = INT_POWER_FAULT_CLEAR;
234 	} else {
235 		/*
236 		 *   Power fault
237 		 */
238 		info("Power fault on Slot(%d)\n", ctrl->first_slot + hp_slot);
239 		taskInfo->event_type = INT_POWER_FAULT;
240 		/* Set power fault status for this board */
241 		func->status = 0xFF;
242 		info("power fault bit %x set\n", hp_slot);
243 	}
244 	if (rc)
245 		up(&event_semaphore);	/* Signal event thread that new event is posted */
246 
247 	return rc;
248 }
249 
250 
251 /*
252  * sort_by_size
253  *
254  * Sorts nodes on the list by their length.
255  * Smallest first.
256  *
257  */
sort_by_size(struct pci_resource ** head)258 static int sort_by_size(struct pci_resource **head)
259 {
260 	struct pci_resource *current_res;
261 	struct pci_resource *next_res;
262 	int out_of_order = 1;
263 
264 	if (!(*head))
265 		return(1);
266 
267 	if (!((*head)->next))
268 		return(0);
269 
270 	while (out_of_order) {
271 		out_of_order = 0;
272 
273 		/* Special case for swapping list head */
274 		if (((*head)->next) &&
275 		    ((*head)->length > (*head)->next->length)) {
276 			out_of_order++;
277 			current_res = *head;
278 			*head = (*head)->next;
279 			current_res->next = (*head)->next;
280 			(*head)->next = current_res;
281 		}
282 
283 		current_res = *head;
284 
285 		while (current_res->next && current_res->next->next) {
286 			if (current_res->next->length > current_res->next->next->length) {
287 				out_of_order++;
288 				next_res = current_res->next;
289 				current_res->next = current_res->next->next;
290 				current_res = current_res->next;
291 				next_res->next = current_res->next;
292 				current_res->next = next_res;
293 			} else
294 				current_res = current_res->next;
295 		}
296 	}  /* End of out_of_order loop */
297 
298 	return(0);
299 }
300 
301 
302 /*
303  * sort_by_max_size
304  *
305  * Sorts nodes on the list by their length.
306  * Largest first.
307  *
308  */
sort_by_max_size(struct pci_resource ** head)309 static int sort_by_max_size(struct pci_resource **head)
310 {
311 	struct pci_resource *current_res;
312 	struct pci_resource *next_res;
313 	int out_of_order = 1;
314 
315 	if (!(*head))
316 		return(1);
317 
318 	if (!((*head)->next))
319 		return(0);
320 
321 	while (out_of_order) {
322 		out_of_order = 0;
323 
324 		/* Special case for swapping list head */
325 		if (((*head)->next) &&
326 		    ((*head)->length < (*head)->next->length)) {
327 			out_of_order++;
328 			current_res = *head;
329 			*head = (*head)->next;
330 			current_res->next = (*head)->next;
331 			(*head)->next = current_res;
332 		}
333 
334 		current_res = *head;
335 
336 		while (current_res->next && current_res->next->next) {
337 			if (current_res->next->length < current_res->next->next->length) {
338 				out_of_order++;
339 				next_res = current_res->next;
340 				current_res->next = current_res->next->next;
341 				current_res = current_res->next;
342 				next_res->next = current_res->next;
343 				current_res->next = next_res;
344 			} else
345 				current_res = current_res->next;
346 		}
347 	}  /* End of out_of_order loop */
348 
349 	return(0);
350 }
351 
352 
353 /*
354  * do_pre_bridge_resource_split
355  *
356  *	Returns zero or one node of resources that aren't in use
357  *
358  */
do_pre_bridge_resource_split(struct pci_resource ** head,struct pci_resource ** orig_head,u32 alignment)359 static struct pci_resource *do_pre_bridge_resource_split (struct pci_resource **head, struct pci_resource **orig_head, u32 alignment)
360 {
361 	struct pci_resource *prevnode = NULL;
362 	struct pci_resource *node;
363 	struct pci_resource *split_node;
364 	u32 rc;
365 	u32 temp_dword;
366 	dbg("do_pre_bridge_resource_split\n");
367 
368 	if (!(*head) || !(*orig_head))
369 		return(NULL);
370 
371 	rc = pciehp_resource_sort_and_combine(head);
372 
373 	if (rc)
374 		return(NULL);
375 
376 	if ((*head)->base != (*orig_head)->base)
377 		return(NULL);
378 
379 	if ((*head)->length == (*orig_head)->length)
380 		return(NULL);
381 
382 
383 	/* If we got here, there the bridge requires some of the resource, but
384 	 *  we may be able to split some off of the front
385 	 */
386 	node = *head;
387 
388 	if (node->length & (alignment -1)) {
389 		/* This one isn't an aligned length, so we'll make a new entry
390 		 * and split it up.
391 		 */
392 		split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
393 
394 		if (!split_node)
395 			return(NULL);
396 
397 		temp_dword = (node->length | (alignment-1)) + 1 - alignment;
398 
399 		split_node->base = node->base;
400 		split_node->length = temp_dword;
401 
402 		node->length -= temp_dword;
403 		node->base += split_node->length;
404 
405 		/* Put it in the list */
406 		*head = split_node;
407 		split_node->next = node;
408 	}
409 
410 	if (node->length < alignment) {
411 		return(NULL);
412 	}
413 
414 	/* Now unlink it */
415 	if (*head == node) {
416 		*head = node->next;
417 		node->next = NULL;
418 	} else {
419 		prevnode = *head;
420 		while (prevnode->next != node)
421 			prevnode = prevnode->next;
422 
423 		prevnode->next = node->next;
424 		node->next = NULL;
425 	}
426 
427 	return(node);
428 }
429 
430 
431 /*
432  * do_bridge_resource_split
433  *
434  *	Returns zero or one node of resources that aren't in use
435  *
436  */
do_bridge_resource_split(struct pci_resource ** head,u32 alignment)437 static struct pci_resource *do_bridge_resource_split (struct pci_resource **head, u32 alignment)
438 {
439 	struct pci_resource *prevnode = NULL;
440 	struct pci_resource *node;
441 	u32 rc;
442 	u32 temp_dword;
443 
444 	if (!(*head))
445 		return(NULL);
446 
447 	rc = pciehp_resource_sort_and_combine(head);
448 
449 	if (rc)
450 		return(NULL);
451 
452 	node = *head;
453 
454 	while (node->next) {
455 		prevnode = node;
456 		node = node->next;
457 		kfree(prevnode);
458 	}
459 
460 	if (node->length < alignment) {
461 		kfree(node);
462 		return(NULL);
463 	}
464 
465 	if (node->base & (alignment - 1)) {
466 		/* Short circuit if adjusted size is too small */
467 		temp_dword = (node->base | (alignment-1)) + 1;
468 		if ((node->length - (temp_dword - node->base)) < alignment) {
469 			kfree(node);
470 			return(NULL);
471 		}
472 
473 		node->length -= (temp_dword - node->base);
474 		node->base = temp_dword;
475 	}
476 
477 	if (node->length & (alignment - 1)) {
478 		/* There's stuff in use after this node */
479 		kfree(node);
480 		return(NULL);
481 	}
482 
483 	return(node);
484 }
485 
486 
487 /*
488  * get_io_resource
489  *
490  * this function sorts the resource list by size and then
491  * returns the first node of "size" length that is not in the
492  * ISA aliasing window.  If it finds a node larger than "size"
493  * it will split it up.
494  *
495  * size must be a power of two.
496  */
get_io_resource(struct pci_resource ** head,u32 size)497 static struct pci_resource *get_io_resource (struct pci_resource **head, u32 size)
498 {
499 	struct pci_resource *prevnode;
500 	struct pci_resource *node;
501 	struct pci_resource *split_node = NULL;
502 	u32 temp_dword;
503 
504 	if (!(*head))
505 		return(NULL);
506 
507 	if ( pciehp_resource_sort_and_combine(head) )
508 		return(NULL);
509 
510 	if ( sort_by_size(head) )
511 		return(NULL);
512 
513 	for (node = *head; node; node = node->next) {
514 		if (node->length < size)
515 			continue;
516 
517 		if (node->base & (size - 1)) {
518 			/* This one isn't base aligned properly
519 			   so we'll make a new entry and split it up */
520 			temp_dword = (node->base | (size-1)) + 1;
521 
522 			/*/ Short circuit if adjusted size is too small */
523 			if ((node->length - (temp_dword - node->base)) < size)
524 				continue;
525 
526 			split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
527 
528 			if (!split_node)
529 				return(NULL);
530 
531 			split_node->base = node->base;
532 			split_node->length = temp_dword - node->base;
533 			node->base = temp_dword;
534 			node->length -= split_node->length;
535 
536 			/* Put it in the list */
537 			split_node->next = node->next;
538 			node->next = split_node;
539 		} /* End of non-aligned base */
540 
541 		/* Don't need to check if too small since we already did */
542 		if (node->length > size) {
543 			/* This one is longer than we need
544 			   so we'll make a new entry and split it up */
545 			split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
546 
547 			if (!split_node)
548 				return(NULL);
549 
550 			split_node->base = node->base + size;
551 			split_node->length = node->length - size;
552 			node->length = size;
553 
554 			/* Put it in the list */
555 			split_node->next = node->next;
556 			node->next = split_node;
557 		}  /* End of too big on top end */
558 
559 		/* For IO make sure it's not in the ISA aliasing space */
560 		if (node->base & 0x300L)
561 			continue;
562 
563 		/* If we got here, then it is the right size
564 		   Now take it out of the list */
565 		if (*head == node) {
566 			*head = node->next;
567 		} else {
568 			prevnode = *head;
569 			while (prevnode->next != node)
570 				prevnode = prevnode->next;
571 
572 			prevnode->next = node->next;
573 		}
574 		node->next = NULL;
575 		/* Stop looping */
576 		break;
577 	}
578 
579 	return(node);
580 }
581 
582 
583 /*
584  * get_max_resource
585  *
586  * Gets the largest node that is at least "size" big from the
587  * list pointed to by head.  It aligns the node on top and bottom
588  * to "size" alignment before returning it.
589  * J.I. modified to put max size limits of; 64M->32M->16M->8M->4M->1M
590  *  This is needed to avoid allocating entire ACPI _CRS res to one child bridge/slot.
591  */
get_max_resource(struct pci_resource ** head,u32 size)592 static struct pci_resource *get_max_resource (struct pci_resource **head, u32 size)
593 {
594 	struct pci_resource *max;
595 	struct pci_resource *temp;
596 	struct pci_resource *split_node;
597 	u32 temp_dword;
598 	u32 max_size[] = { 0x4000000, 0x2000000, 0x1000000, 0x0800000, 0x0400000, 0x0200000, 0x0100000, 0x00 };
599 	int i;
600 
601 	if (!(*head))
602 		return(NULL);
603 
604 	if (pciehp_resource_sort_and_combine(head))
605 		return(NULL);
606 
607 	if (sort_by_max_size(head))
608 		return(NULL);
609 
610 	for (max = *head;max; max = max->next) {
611 
612 		/* If not big enough we could probably just bail,
613 		   instead we'll continue to the next. */
614 		if (max->length < size)
615 			continue;
616 
617 		if (max->base & (size - 1)) {
618 			/* This one isn't base aligned properly
619 			   so we'll make a new entry and split it up */
620 			temp_dword = (max->base | (size-1)) + 1;
621 
622 			/* Short circuit if adjusted size is too small */
623 			if ((max->length - (temp_dword - max->base)) < size)
624 				continue;
625 
626 			split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
627 
628 			if (!split_node)
629 				return(NULL);
630 
631 			split_node->base = max->base;
632 			split_node->length = temp_dword - max->base;
633 			max->base = temp_dword;
634 			max->length -= split_node->length;
635 
636 			/* Put it next in the list */
637 			split_node->next = max->next;
638 			max->next = split_node;
639 		}
640 
641 		if ((max->base + max->length) & (size - 1)) {
642 			/* This one isn't end aligned properly at the top
643 			   so we'll make a new entry and split it up */
644 			split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
645 
646 			if (!split_node)
647 				return(NULL);
648 			temp_dword = ((max->base + max->length) & ~(size - 1));
649 			split_node->base = temp_dword;
650 			split_node->length = max->length + max->base
651 					     - split_node->base;
652 			max->length -= split_node->length;
653 
654 			/* Put it in the list */
655 			split_node->next = max->next;
656 			max->next = split_node;
657 		}
658 
659 		/* Make sure it didn't shrink too much when we aligned it */
660 		if (max->length < size)
661 			continue;
662 
663 		for ( i = 0; max_size[i] > size; i++) {
664 			if (max->length > max_size[i]) {
665 				split_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
666 				if (!split_node)
667 					break;	/* return (NULL); */
668 				split_node->base = max->base + max_size[i];
669 				split_node->length = max->length - max_size[i];
670 				max->length = max_size[i];
671 				/* Put it next in the list */
672 				split_node->next = max->next;
673 				max->next = split_node;
674 				break;
675 			}
676 		}
677 
678 		/* Now take it out of the list */
679 		temp = (struct pci_resource*) *head;
680 		if (temp == max) {
681 			*head = max->next;
682 		} else {
683 			while (temp && temp->next != max) {
684 				temp = temp->next;
685 			}
686 
687 			temp->next = max->next;
688 		}
689 
690 		max->next = NULL;
691 		return(max);
692 	}
693 
694 	/* If we get here, we couldn't find one */
695 	return(NULL);
696 }
697 
698 
699 /*
700  * get_resource
701  *
702  * this function sorts the resource list by size and then
703  * returns the first node of "size" length.  If it finds a node
704  * larger than "size" it will split it up.
705  *
706  * size must be a power of two.
707  */
get_resource(struct pci_resource ** head,u32 size)708 static struct pci_resource *get_resource (struct pci_resource **head, u32 size)
709 {
710 	struct pci_resource *prevnode;
711 	struct pci_resource *node;
712 	struct pci_resource *split_node;
713 	u32 temp_dword;
714 
715 	if (!(*head))
716 		return(NULL);
717 
718 	if ( pciehp_resource_sort_and_combine(head) )
719 		return(NULL);
720 
721 	if ( sort_by_size(head) )
722 		return(NULL);
723 
724 	for (node = *head; node; node = node->next) {
725 		dbg("%s: req_size =0x%x node=%p, base=0x%x, length=0x%x\n",
726 		    __FUNCTION__, size, node, node->base, node->length);
727 		if (node->length < size)
728 			continue;
729 
730 		if (node->base & (size - 1)) {
731 			dbg("%s: not aligned\n", __FUNCTION__);
732 			/* This one isn't base aligned properly
733 			   so we'll make a new entry and split it up */
734 			temp_dword = (node->base | (size-1)) + 1;
735 
736 			/* Short circuit if adjusted size is too small */
737 			if ((node->length - (temp_dword - node->base)) < size)
738 				continue;
739 
740 			split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
741 
742 			if (!split_node)
743 				return(NULL);
744 
745 			split_node->base = node->base;
746 			split_node->length = temp_dword - node->base;
747 			node->base = temp_dword;
748 			node->length -= split_node->length;
749 
750 			/* Put it in the list */
751 			split_node->next = node->next;
752 			node->next = split_node;
753 		} /* End of non-aligned base */
754 
755 		/* Don't need to check if too small since we already did */
756 		if (node->length > size) {
757 			dbg("%s: too big\n", __FUNCTION__);
758 			/* This one is longer than we need
759 			   so we'll make a new entry and split it up */
760 			split_node = (struct pci_resource*) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
761 
762 			if (!split_node)
763 				return(NULL);
764 
765 			split_node->base = node->base + size;
766 			split_node->length = node->length - size;
767 			node->length = size;
768 
769 			/* Put it in the list */
770 			split_node->next = node->next;
771 			node->next = split_node;
772 		}  /* End of too big on top end */
773 
774 		dbg("%s: got one!!!\n", __FUNCTION__);
775 		/* If we got here, then it is the right size
776 		   Now take it out of the list */
777 		if (*head == node) {
778 			*head = node->next;
779 		} else {
780 			prevnode = *head;
781 			while (prevnode->next != node)
782 				prevnode = prevnode->next;
783 
784 			prevnode->next = node->next;
785 		}
786 		node->next = NULL;
787 		/* Stop looping */
788 		break;
789 	}
790 	return(node);
791 }
792 
793 
794 /*
795  * pciehp_resource_sort_and_combine
796  *
797  * Sorts all of the nodes in the list in ascending order by
798  * their base addresses.  Also does garbage collection by
799  * combining adjacent nodes.
800  *
801  * returns 0 if success
802  */
pciehp_resource_sort_and_combine(struct pci_resource ** head)803 int pciehp_resource_sort_and_combine(struct pci_resource **head)
804 {
805 	struct pci_resource *node1;
806 	struct pci_resource *node2;
807 	int out_of_order = 1;
808 
809 	dbg("%s: head = %p, *head = %p\n", __FUNCTION__, head, *head);
810 
811 	if (!(*head))
812 		return(1);
813 
814 	dbg("*head->next = %p\n",(*head)->next);
815 
816 	if (!(*head)->next)
817 		return(0);	/* Only one item on the list, already sorted! */
818 
819 	dbg("*head->base = 0x%x\n",(*head)->base);
820 	dbg("*head->next->base = 0x%x\n",(*head)->next->base);
821 	while (out_of_order) {
822 		out_of_order = 0;
823 
824 		/* Special case for swapping list head */
825 		if (((*head)->next) &&
826 		    ((*head)->base > (*head)->next->base)) {
827 			node1 = *head;
828 			(*head) = (*head)->next;
829 			node1->next = (*head)->next;
830 			(*head)->next = node1;
831 			out_of_order++;
832 		}
833 
834 		node1 = (*head);
835 
836 		while (node1->next && node1->next->next) {
837 			if (node1->next->base > node1->next->next->base) {
838 				out_of_order++;
839 				node2 = node1->next;
840 				node1->next = node1->next->next;
841 				node1 = node1->next;
842 				node2->next = node1->next;
843 				node1->next = node2;
844 			} else
845 				node1 = node1->next;
846 		}
847 	}  /* End of out_of_order loop */
848 
849 	node1 = *head;
850 
851 	while (node1 && node1->next) {
852 		if ((node1->base + node1->length) == node1->next->base) {
853 			/* Combine */
854 			dbg("8..\n");
855 			node1->length += node1->next->length;
856 			node2 = node1->next;
857 			node1->next = node1->next->next;
858 			kfree(node2);
859 		} else
860 			node1 = node1->next;
861 	}
862 
863 	return(0);
864 }
865 
866 
867 /**
868  * pciehp_slot_create - Creates a node and adds it to the proper bus.
869  * @busnumber - bus where new node is to be located
870  *
871  * Returns pointer to the new node or NULL if unsuccessful
872  */
pciehp_slot_create(u8 busnumber)873 struct pci_func *pciehp_slot_create(u8 busnumber)
874 {
875 	struct pci_func *new_slot;
876 	struct pci_func *next;
877 	dbg("%s: busnumber %x\n", __FUNCTION__, busnumber);
878 	new_slot = (struct pci_func *) kmalloc(sizeof(struct pci_func), GFP_KERNEL);
879 
880 	if (new_slot == NULL) {
881 		return(new_slot);
882 	}
883 
884 	memset(new_slot, 0, sizeof(struct pci_func));
885 
886 	new_slot->next = NULL;
887 	new_slot->configured = 1;
888 
889 	if (pciehp_slot_list[busnumber] == NULL) {
890 		pciehp_slot_list[busnumber] = new_slot;
891 	} else {
892 		next = pciehp_slot_list[busnumber];
893 		while (next->next != NULL)
894 			next = next->next;
895 		next->next = new_slot;
896 	}
897 	return(new_slot);
898 }
899 
900 
901 /*
902  * slot_remove - Removes a node from the linked list of slots.
903  * @old_slot: slot to remove
904  *
905  * Returns 0 if successful, !0 otherwise.
906  */
slot_remove(struct pci_func * old_slot)907 static int slot_remove(struct pci_func * old_slot)
908 {
909 	struct pci_func *next;
910 
911 	if (old_slot == NULL)
912 		return(1);
913 
914 	next = pciehp_slot_list[old_slot->bus];
915 
916 	if (next == NULL) {
917 		return(1);
918 	}
919 
920 	if (next == old_slot) {
921 		pciehp_slot_list[old_slot->bus] = old_slot->next;
922 		pciehp_destroy_board_resources(old_slot);
923 		kfree(old_slot);
924 		return(0);
925 	}
926 
927 	while ((next->next != old_slot) && (next->next != NULL)) {
928 		next = next->next;
929 	}
930 
931 	if (next->next == old_slot) {
932 		next->next = old_slot->next;
933 		pciehp_destroy_board_resources(old_slot);
934 		kfree(old_slot);
935 		return(0);
936 	} else
937 		return(2);
938 }
939 
940 
941 /**
942  * bridge_slot_remove - Removes a node from the linked list of slots.
943  * @bridge: bridge to remove
944  *
945  * Returns 0 if successful, !0 otherwise.
946  */
bridge_slot_remove(struct pci_func * bridge)947 static int bridge_slot_remove(struct pci_func *bridge)
948 {
949 	u8 subordinateBus, secondaryBus;
950 	u8 tempBus;
951 	struct pci_func *next;
952 
953 	if (bridge == NULL)
954 		return(1);
955 
956 	secondaryBus = (bridge->config_space[0x06] >> 8) & 0xFF;
957 	subordinateBus = (bridge->config_space[0x06] >> 16) & 0xFF;
958 
959 	for (tempBus = secondaryBus; tempBus <= subordinateBus; tempBus++) {
960 		next = pciehp_slot_list[tempBus];
961 
962 		while (!slot_remove(next)) {
963 			next = pciehp_slot_list[tempBus];
964 		}
965 	}
966 
967 	next = pciehp_slot_list[bridge->bus];
968 
969 	if (next == NULL) {
970 		return(1);
971 	}
972 
973 	if (next == bridge) {
974 		pciehp_slot_list[bridge->bus] = bridge->next;
975 		kfree(bridge);
976 		return(0);
977 	}
978 
979 	while ((next->next != bridge) && (next->next != NULL)) {
980 		next = next->next;
981 	}
982 
983 	if (next->next == bridge) {
984 		next->next = bridge->next;
985 		kfree(bridge);
986 		return(0);
987 	} else
988 		return(2);
989 }
990 
991 
992 /**
993  * pciehp_slot_find - Looks for a node by bus, and device, multiple functions accessed
994  * @bus: bus to find
995  * @device: device to find
996  * @index: is 0 for first function found, 1 for the second...
997  *
998  * Returns pointer to the node if successful, %NULL otherwise.
999  */
pciehp_slot_find(u8 bus,u8 device,u8 index)1000 struct pci_func *pciehp_slot_find(u8 bus, u8 device, u8 index)
1001 {
1002 	int found = -1;
1003 	struct pci_func *func;
1004 
1005 	func = pciehp_slot_list[bus];
1006 	dbg("%s: bus %x device %x index %x\n",
1007 		__FUNCTION__, bus, device, index);
1008 	if (func != NULL) {
1009 		dbg("%s: func-> bus %x device %x function %x pci_dev %p\n",
1010 			__FUNCTION__, func->bus, func->device, func->function,
1011 			func->pci_dev);
1012 	} else
1013 		dbg("%s: func == NULL\n", __FUNCTION__);
1014 
1015 	if ((func == NULL) || ((func->device == device) && (index == 0)))
1016 		return(func);
1017 
1018 	if (func->device == device)
1019 		found++;
1020 
1021 	while (func->next != NULL) {
1022 		func = func->next;
1023 
1024 		dbg("%s: In while loop, func-> bus %x device %x function %x pci_dev %p\n",
1025 			__FUNCTION__, func->bus, func->device, func->function,
1026 			func->pci_dev);
1027 		if (func->device == device)
1028 			found++;
1029 		dbg("%s: while loop, found %d, index %d\n", __FUNCTION__,
1030 			found, index);
1031 
1032 		if ((found == index) ||(func->function == index)) {
1033 			dbg("%s: Found bus %x dev %x func %x\n", __FUNCTION__,
1034 			func->bus, func->device, func->function);
1035 			return(func);
1036 		}
1037 	}
1038 
1039 	return(NULL);
1040 }
1041 
is_bridge(struct pci_func * func)1042 static int is_bridge(struct pci_func * func)
1043 {
1044 	/* Check the header type */
1045 	if (((func->config_space[0x03] >> 16) & 0xFF) == 0x01)
1046 		return 1;
1047 	else
1048 		return 0;
1049 }
1050 
1051 
1052 /* the following routines constitute the bulk of the
1053    hotplug controller logic
1054  */
1055 
set_slot_off(struct controller * ctrl,struct slot * pslot)1056 static void set_slot_off(struct controller *ctrl, struct slot * pslot)
1057 {
1058 	/* Wait for exclusive access to hardware */
1059 	down(&ctrl->crit_sect);
1060 
1061 	/* turn off slot, turn on Amber LED, turn off Green LED */
1062 	if (pslot->hpc_ops->power_off_slot(pslot)) {
1063 		err("%s: Issue of Slot Power Off command failed\n", __FUNCTION__);
1064 		up(&ctrl->crit_sect);
1065 		return;
1066 	}
1067 	wait_for_ctrl_irq (ctrl);
1068 
1069 	pslot->hpc_ops->green_led_off(pslot);
1070 
1071 	wait_for_ctrl_irq (ctrl);
1072 
1073 	/* turn on Amber LED */
1074 	if (pslot->hpc_ops->set_attention_status(pslot, 1)) {
1075 		err("%s: Issue of Set Attention Led command failed\n", __FUNCTION__);
1076 		up(&ctrl->crit_sect);
1077 		return;
1078 	}
1079 	wait_for_ctrl_irq (ctrl);
1080 
1081 	/* Done with exclusive hardware access */
1082 	up(&ctrl->crit_sect);
1083 }
1084 
1085 /**
1086  * board_added - Called after a board has been added to the system.
1087  *
1088  * Turns power on for the board
1089  * Configures board
1090  *
1091  */
board_added(struct pci_func * func,struct controller * ctrl)1092 static u32 board_added(struct pci_func * func, struct controller * ctrl)
1093 {
1094 	u8 hp_slot;
1095 	int index;
1096 	u32 temp_register = 0xFFFFFFFF;
1097 	u32 rc = 0;
1098 	struct pci_func *new_func = NULL;
1099 	struct slot *p_slot;
1100 	struct resource_lists res_lists;
1101 
1102 	p_slot = pciehp_find_slot(ctrl, func->device);
1103 	hp_slot = func->device - ctrl->slot_device_offset;
1104 
1105 	dbg("%s: func->device, slot_offset, hp_slot = %d, %d ,%d\n",
1106 		__FUNCTION__, func->device, ctrl->slot_device_offset, hp_slot);
1107 
1108 	/* Wait for exclusive access to hardware */
1109 	down(&ctrl->crit_sect);
1110 
1111 	/* Power on slot */
1112 	rc = p_slot->hpc_ops->power_on_slot(p_slot);
1113 	if (rc) {
1114 		up(&ctrl->crit_sect);
1115 		return -1;
1116 	}
1117 
1118 	/* Wait for the command to complete */
1119 	wait_for_ctrl_irq(ctrl);
1120 
1121 	dbg("%s: after power on\n", __FUNCTION__);
1122 
1123 	p_slot->hpc_ops->green_led_blink(p_slot);
1124 
1125 	/* Wait for the command to complete */
1126 	wait_for_ctrl_irq(ctrl);
1127 	dbg("%s: after green_led_blink", __FUNCTION__);
1128 
1129 	/* Done with exclusive hardware access */
1130 	up(&ctrl->crit_sect);
1131 
1132 	/* Wait for ~1 second */
1133 	dbg("%s: before long_delay\n", __FUNCTION__);
1134 	wait_for_ctrl_irq (ctrl);
1135 	dbg("%s: afterlong_delay\n", __FUNCTION__);
1136 
1137 	dbg("%s: before check link status", __FUNCTION__);
1138 	/*  Check link training status */
1139 	rc = p_slot->hpc_ops->check_lnk_status(ctrl);
1140 	if (rc) {
1141 		err("%s: Failed to check link status\n", __FUNCTION__);
1142 		set_slot_off(ctrl, p_slot);
1143 		return -1;
1144 	}
1145 
1146 	dbg("%s: func status = %x\n", __FUNCTION__, func->status);
1147 
1148 	/* Check for a power fault */
1149 	if (func->status == 0xFF) {
1150 		/* power fault occurred, but it was benign */
1151 		temp_register = 0xFFFFFFFF;
1152 		dbg("%s: temp register set to %x by power fault\n",
1153 			__FUNCTION__, temp_register);
1154 		rc = POWER_FAILURE;
1155 		func->status = 0;
1156 	} else {
1157 		/* Get vendor/device ID u32 */
1158 		rc = pci_bus_read_config_dword (ctrl->pci_dev->subordinate,
1159 			PCI_DEVFN(func->device, func->function), PCI_VENDOR_ID, &temp_register);
1160 		dbg("%s: pci_bus_read_config_dword returns %d\n", __FUNCTION__, rc);
1161 		dbg("%s: temp_register is %x\n", __FUNCTION__, temp_register);
1162 
1163 		if (rc != 0) {
1164 			/* Something's wrong here */
1165 			temp_register = 0xFFFFFFFF;
1166 			dbg("%s: temp register set to %x by error\n", __FUNCTION__,
1167 				temp_register);
1168 		}
1169 		/* Preset return code.  It will be changed later if things go okay. */
1170 		rc = NO_ADAPTER_PRESENT;
1171 	}
1172 
1173 	/* All F's is an empty slot or an invalid board */
1174 	if (temp_register != 0xFFFFFFFF) {	  /* Check for a board in the slot */
1175 		res_lists.io_head = ctrl->io_head;
1176 		res_lists.mem_head = ctrl->mem_head;
1177 		res_lists.p_mem_head = ctrl->p_mem_head;
1178 		res_lists.bus_head = ctrl->bus_head;
1179 		res_lists.irqs = NULL;
1180 
1181 		rc = configure_new_device(ctrl, func, 0, &res_lists, 0, 0);
1182 		dbg("%s: back from configure_new_device\n", __FUNCTION__);
1183 
1184 		ctrl->io_head = res_lists.io_head;
1185 		ctrl->mem_head = res_lists.mem_head;
1186 		ctrl->p_mem_head = res_lists.p_mem_head;
1187 		ctrl->bus_head = res_lists.bus_head;
1188 
1189 		pciehp_resource_sort_and_combine(&(ctrl->mem_head));
1190 		pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
1191 		pciehp_resource_sort_and_combine(&(ctrl->io_head));
1192 		pciehp_resource_sort_and_combine(&(ctrl->bus_head));
1193 
1194 		if (rc) {
1195 			set_slot_off(ctrl, p_slot);
1196 			return(rc);
1197 		}
1198 		pciehp_save_slot_config(ctrl, func);
1199 
1200 		func->status = 0;
1201 		func->switch_save = 0x10;
1202 		func->is_a_board = 0x01;
1203 
1204 		/* Next, we will instantiate the linux pci_dev structures
1205 		 * (with appropriate driver notification, if already present)
1206 		 */
1207 		index = 0;
1208 		do {
1209 			new_func = pciehp_slot_find(ctrl->slot_bus, func->device, index++);
1210 			if (new_func && !new_func->pci_dev) {
1211 				dbg("%s:call pci_hp_configure_dev, func %x\n",
1212 					__FUNCTION__, index);
1213 				pciehp_configure_device(ctrl, new_func);
1214 			}
1215 		} while (new_func);
1216 
1217 		/* Wait for exclusive access to hardware */
1218 		down(&ctrl->crit_sect);
1219 
1220 		p_slot->hpc_ops->green_led_on(p_slot);
1221 
1222 		/* Wait for the command to complete */
1223 		wait_for_ctrl_irq(ctrl);
1224 
1225 		/* Done with exclusive hardware access */
1226 		up(&ctrl->crit_sect);
1227 
1228 	} else {
1229 		set_slot_off(ctrl, p_slot);
1230 		return -1;
1231 	}
1232 	return 0;
1233 }
1234 
1235 
1236 /**
1237  * remove_board - Turns off slot and LED's
1238  *
1239  */
remove_board(struct pci_func * func,struct controller * ctrl)1240 static u32 remove_board(struct pci_func *func, struct controller *ctrl)
1241 {
1242 	int index;
1243 	u8 skip = 0;
1244 	u8 device;
1245 	u8 hp_slot;
1246 	u32 rc;
1247 	struct resource_lists res_lists;
1248 	struct pci_func *temp_func;
1249 	struct slot *p_slot;
1250 
1251 	if (func == NULL)
1252 		return(1);
1253 
1254 	if (pciehp_unconfigure_device(func))
1255 		return(1);
1256 
1257 	device = func->device;
1258 
1259 	hp_slot = func->device - ctrl->slot_device_offset;
1260 	p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1261 
1262 	dbg("In %s, hp_slot = %d\n", __FUNCTION__, hp_slot);
1263 
1264 	if ((ctrl->add_support) &&
1265 		!(func->bus_head || func->mem_head || func->p_mem_head || func->io_head)) {
1266 		/* Here we check to see if we've saved any of the board's
1267 		 * resources already.  If so, we'll skip the attempt to
1268 		 * determine what's being used.
1269 		 */
1270 		index = 0;
1271 
1272 		temp_func = func;
1273 
1274 		while ((temp_func = pciehp_slot_find(temp_func->bus, temp_func->device,
1275 			index++))) {
1276 			if (temp_func->bus_head || temp_func->mem_head
1277 			    || temp_func->p_mem_head || temp_func->io_head) {
1278 				skip = 1;
1279 				break;
1280 			}
1281 		}
1282 
1283 		if (!skip)
1284 			rc = pciehp_save_used_resources(ctrl, func, DISABLE_CARD);
1285 	}
1286 	/* Change status to shutdown */
1287 	if (func->is_a_board)
1288 		func->status = 0x01;
1289 	func->configured = 0;
1290 
1291 	/* Wait for exclusive access to hardware */
1292 	down(&ctrl->crit_sect);
1293 
1294 	/* Power off slot */
1295 	rc = p_slot->hpc_ops->power_off_slot(p_slot);
1296 	if (rc) {
1297 		err("%s: Issue of Slot Disable command failed\n", __FUNCTION__);
1298 		up(&ctrl->crit_sect);
1299 		return rc;
1300 	}
1301 	/* Wait for the command to complete */
1302 	wait_for_ctrl_irq(ctrl);
1303 
1304 	/* Turn off Green LED */
1305 	p_slot->hpc_ops->green_led_off(p_slot);
1306 
1307 	/* Wait for the command to complete */
1308 	wait_for_ctrl_irq(ctrl);
1309 
1310 	/* Done with exclusive hardware access */
1311 	up(&ctrl->crit_sect);
1312 
1313 	if (ctrl->add_support) {
1314 		while (func) {
1315 			res_lists.io_head = ctrl->io_head;
1316 			res_lists.mem_head = ctrl->mem_head;
1317 			res_lists.p_mem_head = ctrl->p_mem_head;
1318 			res_lists.bus_head = ctrl->bus_head;
1319 
1320 			dbg("Returning resources to ctlr lists for (B/D/F) = (%#x/%#x/%#x)\n",
1321 				 func->bus, func->device, func->function);
1322 
1323 			pciehp_return_board_resources(func, &res_lists);
1324 
1325 			ctrl->io_head = res_lists.io_head;
1326 			ctrl->mem_head = res_lists.mem_head;
1327 			ctrl->p_mem_head = res_lists.p_mem_head;
1328 			ctrl->bus_head = res_lists.bus_head;
1329 
1330 			pciehp_resource_sort_and_combine(&(ctrl->mem_head));
1331 			pciehp_resource_sort_and_combine(&(ctrl->p_mem_head));
1332 			pciehp_resource_sort_and_combine(&(ctrl->io_head));
1333 			pciehp_resource_sort_and_combine(&(ctrl->bus_head));
1334 
1335 			if (is_bridge(func)) {
1336 				dbg("PCI Bridge Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
1337 					ctrl->seg, func->bus, func->device, func->function);
1338 				bridge_slot_remove(func);
1339 			} else
1340 				dbg("PCI Function Hot-Remove s:b:d:f(%02x:%02x:%02x:%02x)\n",
1341 					 ctrl->seg, func->bus, func->device, func->function);
1342 				slot_remove(func);
1343 
1344 			func = pciehp_slot_find(ctrl->slot_bus, device, 0);
1345 		}
1346 
1347 		/* Setup slot structure with entry for empty slot */
1348 		func = pciehp_slot_create(ctrl->slot_bus);
1349 
1350 		if (func == NULL) {
1351 			return(1);
1352 		}
1353 
1354 		func->bus = ctrl->slot_bus;
1355 		func->device = device;
1356 		func->function = 0;
1357 		func->configured = 0;
1358 		func->switch_save = 0x10;
1359 		func->is_a_board = 0;
1360 	}
1361 	return 0;
1362 }
1363 
1364 
pushbutton_helper_thread(unsigned long data)1365 static void pushbutton_helper_thread (unsigned long data)
1366 {
1367 	pushbutton_pending = data;
1368 	up(&event_semaphore);
1369 }
1370 
1371 
1372 /* this is the main worker thread */
event_thread(void * data)1373 static int event_thread(void* data)
1374 {
1375 	struct controller *ctrl;
1376 	lock_kernel();
1377 	daemonize();
1378 
1379 	/* New name */
1380 	strcpy(current->comm, "pciehpd_event");
1381 
1382 	unlock_kernel();
1383 
1384 	while (1) {
1385 		dbg("!!!!event_thread sleeping\n");
1386 		down_interruptible (&event_semaphore);
1387 		dbg("event_thread woken finished = %d\n", event_finished);
1388 		if (event_finished || signal_pending(current))
1389 			break;
1390 		/* Do stuff here */
1391 		if (pushbutton_pending)
1392 			pciehp_pushbutton_thread(pushbutton_pending);
1393 		else
1394 			for (ctrl = pciehp_ctrl_list; ctrl; ctrl=ctrl->next)
1395 				interrupt_event_handler(ctrl);
1396 	}
1397 	dbg("event_thread signals exit\n");
1398 	up(&event_exit);
1399 	return 0;
1400 }
1401 
pciehp_event_start_thread(void)1402 int pciehp_event_start_thread (void)
1403 {
1404 	int pid;
1405 
1406 	/* Initialize our semaphores */
1407 	init_MUTEX_LOCKED(&event_exit);
1408 	event_finished=0;
1409 
1410 	init_MUTEX_LOCKED(&event_semaphore);
1411 	pid = kernel_thread(event_thread, 0, 0);
1412 
1413 	if (pid < 0) {
1414 		err ("Can't start up our event thread\n");
1415 		return -1;
1416 	}
1417 	dbg("Our event thread pid = %d\n", pid);
1418 	return 0;
1419 }
1420 
1421 
pciehp_event_stop_thread(void)1422 void pciehp_event_stop_thread (void)
1423 {
1424 	event_finished = 1;
1425 	dbg("event_thread finish command given\n");
1426 	up(&event_semaphore);
1427 	dbg("wait for event_thread to exit\n");
1428 	down(&event_exit);
1429 }
1430 
1431 
update_slot_info(struct slot * slot)1432 static int update_slot_info (struct slot *slot)
1433 {
1434 	struct hotplug_slot_info *info;
1435 	char buffer[SLOT_NAME_SIZE];
1436 	int result;
1437 
1438 	info = kmalloc (sizeof (struct hotplug_slot_info), GFP_KERNEL);
1439 	if (!info)
1440 		return -ENOMEM;
1441 
1442 	make_slot_name (&buffer[0], SLOT_NAME_SIZE, slot);
1443 
1444 	slot->hpc_ops->get_power_status(slot, &(info->power_status));
1445 	slot->hpc_ops->get_attention_status(slot, &(info->attention_status));
1446 	slot->hpc_ops->get_latch_status(slot, &(info->latch_status));
1447 	slot->hpc_ops->get_adapter_status(slot, &(info->adapter_status));
1448 
1449 	result = pci_hp_change_slot_info(buffer, info);
1450 	kfree (info);
1451 	return result;
1452 }
1453 
interrupt_event_handler(struct controller * ctrl)1454 static void interrupt_event_handler(struct controller *ctrl)
1455 {
1456 	int loop = 0;
1457 	int change = 1;
1458 	struct pci_func *func;
1459 	u8 hp_slot;
1460 	u8 getstatus;
1461 	struct slot *p_slot;
1462 
1463 	while (change) {
1464 		change = 0;
1465 
1466 		for (loop = 0; loop < 10; loop++) {
1467 			if (ctrl->event_queue[loop].event_type != 0) {
1468 				hp_slot = ctrl->event_queue[loop].hp_slot;
1469 
1470 				func = pciehp_slot_find(ctrl->slot_bus, (hp_slot + ctrl->slot_device_offset), 0);
1471 
1472 				p_slot = pciehp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset);
1473 
1474 				dbg("hp_slot %d, func %p, p_slot %p\n", hp_slot, func, p_slot);
1475 
1476 				if (ctrl->event_queue[loop].event_type == INT_BUTTON_CANCEL) {
1477 					dbg("button cancel\n");
1478 					del_timer(&p_slot->task_event);
1479 
1480 					switch (p_slot->state) {
1481 					case BLINKINGOFF_STATE:
1482 						/* Wait for exclusive access to hardware */
1483 						down(&ctrl->crit_sect);
1484 
1485 						p_slot->hpc_ops->green_led_on(p_slot);
1486 						/* Wait for the command to complete */
1487 						wait_for_ctrl_irq(ctrl);
1488 
1489 						p_slot->hpc_ops->set_attention_status(p_slot, 0);
1490 
1491 						/* Wait for the command to complete */
1492 						wait_for_ctrl_irq(ctrl);
1493 
1494 						/* Done with exclusive hardware access */
1495 						up(&ctrl->crit_sect);
1496 						break;
1497 					case BLINKINGON_STATE:
1498 						/* Wait for exclusive access to hardware */
1499 						down(&ctrl->crit_sect);
1500 
1501 						p_slot->hpc_ops->green_led_off(p_slot);
1502 						/* Wait for the command to complete */
1503 						wait_for_ctrl_irq(ctrl);
1504 
1505 						p_slot->hpc_ops->set_attention_status(p_slot, 0);
1506 						/* Wait for the command to complete */
1507 						wait_for_ctrl_irq(ctrl);
1508 
1509 						/* Done with exclusive hardware access */
1510 						up(&ctrl->crit_sect);
1511 
1512 						break;
1513 					default:
1514 						warn("Not a valid state\n");
1515 						return;
1516 					}
1517 					info(msg_button_cancel, p_slot->number);
1518 					p_slot->state = STATIC_STATE;
1519 				}
1520 				/* ***********Button Pressed (No action on 1st press...) */
1521 				else if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) {
1522 					dbg("Button pressed\n");
1523 
1524 					p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1525 					if (getstatus) {
1526 						/* Slot is on */
1527 						dbg("Slot is on\n");
1528 						p_slot->state = BLINKINGOFF_STATE;
1529 						info(msg_button_off, p_slot->number);
1530 					} else {
1531 						/* Slot is off */
1532 						dbg("Slot is off\n");
1533 						p_slot->state = BLINKINGON_STATE;
1534 						info(msg_button_on, p_slot->number);
1535 					}
1536 
1537 					/* Wait for exclusive access to hardware */
1538 					down(&ctrl->crit_sect);
1539 
1540 					/* blink green LED and turn off amber */
1541 					p_slot->hpc_ops->green_led_blink(p_slot);
1542 					/* Wait for the command to complete */
1543 					wait_for_ctrl_irq(ctrl);
1544 
1545 					p_slot->hpc_ops->set_attention_status(p_slot, 0);
1546 
1547 					/* Wait for the command to complete */
1548 					wait_for_ctrl_irq(ctrl);
1549 
1550 					/* Done with exclusive hardware access */
1551 					up(&ctrl->crit_sect);
1552 
1553 					init_timer(&p_slot->task_event);
1554 					p_slot->task_event.expires = jiffies + 5 * HZ;   /* 5 second delay */
1555 					p_slot->task_event.function = (void (*)(unsigned long)) pushbutton_helper_thread;
1556 					p_slot->task_event.data = (unsigned long) p_slot;
1557 
1558 					dbg("add_timer p_slot = %p\n", (void *) p_slot);
1559 					add_timer(&p_slot->task_event);
1560 				}
1561 				/***********POWER FAULT********************/
1562 				else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) {
1563 					dbg("power fault\n");
1564 					/* Wait for exclusive access to hardware */
1565 					down(&ctrl->crit_sect);
1566 
1567 					p_slot->hpc_ops->set_attention_status(p_slot, 1);
1568 					wait_for_ctrl_irq(ctrl);
1569 
1570 					p_slot->hpc_ops->green_led_off(p_slot);
1571 					wait_for_ctrl_irq(ctrl);
1572 
1573 					/* Done with exclusive hardware access */
1574 					up(&ctrl->crit_sect);
1575 				} else {
1576 					/* refresh notification */
1577 					if (p_slot)
1578 						update_slot_info(p_slot);
1579 				}
1580 
1581 				ctrl->event_queue[loop].event_type = 0;
1582 
1583 				change = 1;
1584 			}
1585 		}		/* End of FOR loop */
1586 	}
1587 
1588 	return;
1589 }
1590 
1591 
1592 /**
1593  * pciehp_pushbutton_thread
1594  *
1595  * Scheduled procedure to handle blocking stuff for the pushbuttons
1596  * Handles all pending events and exits.
1597  *
1598  */
pciehp_pushbutton_thread(unsigned long slot)1599 void pciehp_pushbutton_thread (unsigned long slot)
1600 {
1601 	struct slot *p_slot = (struct slot *) slot;
1602 	u8 getstatus;
1603 
1604 	pushbutton_pending = 0;
1605 
1606 	if (!p_slot) {
1607 		dbg("%s: Error! slot NULL\n", __FUNCTION__);
1608 		return;
1609 	}
1610 
1611 	p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1612 	if (getstatus) {
1613 		p_slot->state = POWEROFF_STATE;
1614 		dbg("In power_down_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1615 
1616 		pciehp_disable_slot(p_slot);
1617 		p_slot->state = STATIC_STATE;
1618 	} else {
1619 		p_slot->state = POWERON_STATE;
1620 		dbg("In add_board, b:d(%x:%x)\n", p_slot->bus, p_slot->device);
1621 
1622 		if (pciehp_enable_slot(p_slot)) {
1623 			/* Wait for exclusive access to hardware */
1624 			down(&p_slot->ctrl->crit_sect);
1625 
1626 			p_slot->hpc_ops->green_led_off(p_slot);
1627 
1628 			/* Wait for the command to complete */
1629 			wait_for_ctrl_irq (p_slot->ctrl);
1630 
1631 			/* Done with exclusive hardware access */
1632 			up(&p_slot->ctrl->crit_sect);
1633 		}
1634 		p_slot->state = STATIC_STATE;
1635 	}
1636 
1637 	return;
1638 }
1639 
1640 
pciehp_enable_slot(struct slot * p_slot)1641 int pciehp_enable_slot (struct slot *p_slot)
1642 {
1643 	u8 getstatus = 0;
1644 	int rc;
1645 	struct pci_func *func;
1646 
1647 	func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
1648 	if (!func) {
1649 		dbg("%s: Error! slot NULL\n", __FUNCTION__);
1650 		return (1);
1651 	}
1652 
1653 	/* Check to see if (latch closed, card present, power off) */
1654 	down(&p_slot->ctrl->crit_sect);
1655 	rc = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
1656 	if (rc || !getstatus) {
1657 		info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number);
1658 		up(&p_slot->ctrl->crit_sect);
1659 		return (1);
1660 	}
1661 
1662 	rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1663 	if (rc || getstatus) {
1664 		info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number);
1665 		up(&p_slot->ctrl->crit_sect);
1666 		return (1);
1667 	}
1668 
1669 	rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1670 	if (rc || getstatus) {
1671 		info("%s: already enabled on slot(%x)\n", __FUNCTION__, p_slot->number);
1672 		up(&p_slot->ctrl->crit_sect);
1673 		return (1);
1674 	}
1675 	up(&p_slot->ctrl->crit_sect);
1676 
1677 	slot_remove(func);
1678 
1679 	func = pciehp_slot_create(p_slot->bus);
1680 	if (func == NULL)
1681 		return (1);
1682 
1683 	func->bus = p_slot->bus;
1684 	func->device = p_slot->device;
1685 	func->function = 0;
1686 	func->configured = 0;
1687 	func->is_a_board = 1;
1688 
1689 	/* We have to save the presence info for these slots */
1690 	p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1691 	p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1692 	func->switch_save = !getstatus? 0x10:0;
1693 
1694 	rc = board_added(func, p_slot->ctrl);
1695 	if (rc) {
1696 		if (is_bridge(func))
1697 			bridge_slot_remove(func);
1698 		else
1699 			slot_remove(func);
1700 
1701 		/* Setup slot structure with entry for empty slot */
1702 		func = pciehp_slot_create(p_slot->bus);
1703 		if (func == NULL)
1704 			return (1);	/* Out of memory */
1705 
1706 		func->bus = p_slot->bus;
1707 		func->device = p_slot->device;
1708 		func->function = 0;
1709 		func->configured = 0;
1710 		func->is_a_board = 1;
1711 
1712 		/* We have to save the presence info for these slots */
1713 		p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save));
1714 		p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1715 		func->switch_save = !getstatus? 0x10:0;
1716 	}
1717 
1718 	if (p_slot)
1719 		update_slot_info(p_slot);
1720 
1721 	return rc;
1722 }
1723 
1724 
pciehp_disable_slot(struct slot * p_slot)1725 int pciehp_disable_slot (struct slot *p_slot)
1726 {
1727 	u8 class_code, header_type, BCR;
1728 	u8 index = 0;
1729 	u8 getstatus = 0;
1730 	u32 rc = 0;
1731 	int ret = 0;
1732 	unsigned int devfn;
1733 	struct pci_bus *pci_bus = p_slot->ctrl->pci_dev->subordinate;
1734 	struct pci_func *func;
1735 
1736 	if (!p_slot->ctrl)
1737 		return (1);
1738 
1739 	/* Check to see if (latch closed, card present, power on) */
1740 	down(&p_slot->ctrl->crit_sect);
1741 
1742 	ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus);
1743 	if (ret || !getstatus) {
1744 		info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number);
1745 		up(&p_slot->ctrl->crit_sect);
1746 		return (1);
1747 	}
1748 
1749 	ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
1750 	if (ret || getstatus) {
1751 		info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number);
1752 		up(&p_slot->ctrl->crit_sect);
1753 		return (1);
1754 	}
1755 
1756 	ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus);
1757 	if (ret || !getstatus) {
1758 		info("%s: already disabled slot(%x)\n", __FUNCTION__, p_slot->number);
1759 		up(&p_slot->ctrl->crit_sect);
1760 		return (1);
1761 	}
1762 	up(&p_slot->ctrl->crit_sect);
1763 
1764 	func = pciehp_slot_find(p_slot->bus, p_slot->device, index++);
1765 
1766 	/* Make sure there are no video controllers here
1767 	 * for all func of p_slot
1768 	 */
1769 	while (func && !rc) {
1770 		pci_bus->number = func->bus;
1771 		devfn = PCI_DEVFN(func->device, func->function);
1772 
1773 		/* Check the Class Code */
1774 		rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
1775 		if (rc)
1776 			return rc;
1777 
1778 		if (class_code == PCI_BASE_CLASS_DISPLAY) {
1779 			/* Display/Video adapter (not supported) */
1780 			rc = REMOVE_NOT_SUPPORTED;
1781 		} else {
1782 			/* See if it's a bridge */
1783 			rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1784 			if (rc)
1785 				return rc;
1786 
1787 			/* If it's a bridge, check the VGA Enable bit */
1788 			if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1789 				rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
1790 				if (rc)
1791 					return rc;
1792 
1793 				/* If the VGA Enable bit is set, remove isn't supported */
1794 				if (BCR & PCI_BRIDGE_CTL_VGA) {
1795 					rc = REMOVE_NOT_SUPPORTED;
1796 				}
1797 			}
1798 		}
1799 
1800 		func = pciehp_slot_find(p_slot->bus, p_slot->device, index++);
1801 	}
1802 
1803 	func = pciehp_slot_find(p_slot->bus, p_slot->device, 0);
1804 	if ((func != NULL) && !rc) {
1805 		rc = remove_board(func, p_slot->ctrl);
1806 	} else if (!rc)
1807 		rc = 1;
1808 
1809 	if (p_slot)
1810 		update_slot_info(p_slot);
1811 
1812 	return(rc);
1813 }
1814 
1815 
1816 /**
1817  * configure_new_device - Configures the PCI header information of one board.
1818  *
1819  * @ctrl: pointer to controller structure
1820  * @func: pointer to function structure
1821  * @behind_bridge: 1 if this is a recursive call, 0 if not
1822  * @resources: pointer to set of resource lists
1823  *
1824  * Returns 0 if success
1825  *
1826  */
configure_new_device(struct controller * ctrl,struct pci_func * func,u8 behind_bridge,struct resource_lists * resources,u8 bridge_bus,u8 bridge_dev)1827 static u32 configure_new_device (struct controller * ctrl, struct pci_func * func,
1828 	u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev)
1829 {
1830 	u8 temp_byte, function, max_functions, stop_it;
1831 	int rc;
1832 	u32 ID;
1833 	struct pci_func *new_slot;
1834 	struct pci_bus lpci_bus, *pci_bus;
1835 	int index;
1836 
1837 	new_slot = func;
1838 
1839 	dbg("%s\n", __FUNCTION__);
1840 
1841 	memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
1842 	pci_bus = &lpci_bus;
1843 	pci_bus->number = func->bus;
1844 
1845 	/* Check for Multi-function device */
1846 	rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
1847 	if (rc) {
1848 		dbg("%s: rc = %d\n", __FUNCTION__, rc);
1849 		return rc;
1850 	}
1851 
1852 	if (temp_byte & 0x80)	/* Multi-function device */
1853 		max_functions = 8;
1854 	else
1855 		max_functions = 1;
1856 
1857 	function = 0;
1858 
1859 	do {
1860 		rc = configure_new_function(ctrl, new_slot, behind_bridge, resources, bridge_bus, bridge_dev);
1861 
1862 		if (rc) {
1863 			dbg("configure_new_function failed %d\n",rc);
1864 			index = 0;
1865 
1866 			while (new_slot) {
1867 				new_slot = pciehp_slot_find(new_slot->bus, new_slot->device, index++);
1868 
1869 				if (new_slot)
1870 					pciehp_return_board_resources(new_slot, resources);
1871 			}
1872 
1873 			return(rc);
1874 		}
1875 
1876 		function++;
1877 
1878 		stop_it = 0;
1879 
1880 		/*  The following loop skips to the next present function
1881 		 *  and creates a board structure
1882 		 */
1883 
1884 		while ((function < max_functions) && (!stop_it)) {
1885 			pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID);
1886 
1887 			if (ID == 0xFFFFFFFF) {	  /* There's nothing there. */
1888 				function++;
1889 			} else {  /* There's something there */
1890 				/* Setup slot structure. */
1891 				new_slot = pciehp_slot_create(func->bus);
1892 
1893 				if (new_slot == NULL) {
1894 					/* Out of memory */
1895 					return(1);
1896 				}
1897 
1898 				new_slot->bus = func->bus;
1899 				new_slot->device = func->device;
1900 				new_slot->function = function;
1901 				new_slot->is_a_board = 1;
1902 				new_slot->status = 0;
1903 
1904 				stop_it++;
1905 			}
1906 		}
1907 
1908 	} while (function < max_functions);
1909 	dbg("returning from configure_new_device\n");
1910 
1911 	return 0;
1912 }
1913 
1914 
1915 /*
1916  * Configuration logic that involves the hotplug data structures and
1917  * their bookkeeping
1918  */
1919 
1920 
1921 /**
1922  * configure_new_function - Configures the PCI header information of one device
1923  *
1924  * @ctrl: pointer to controller structure
1925  * @func: pointer to function structure
1926  * @behind_bridge: 1 if this is a recursive call, 0 if not
1927  * @resources: pointer to set of resource lists
1928  *
1929  * Calls itself recursively for bridged devices.
1930  * Returns 0 if success
1931  *
1932  */
configure_new_function(struct controller * ctrl,struct pci_func * func,u8 behind_bridge,struct resource_lists * resources,u8 bridge_bus,u8 bridge_dev)1933 static int configure_new_function (struct controller * ctrl, struct pci_func * func,
1934 	u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev)
1935 {
1936 	int cloop;
1937 	u8 temp_byte;
1938 	u8 device;
1939 	u8 class_code;
1940 	u16 temp_word;
1941 	u32 rc;
1942 	u32 temp_register;
1943 	u32 base;
1944 	u32 ID;
1945 	unsigned int devfn;
1946 	struct pci_resource *mem_node;
1947 	struct pci_resource *p_mem_node;
1948 	struct pci_resource *io_node;
1949 	struct pci_resource *bus_node;
1950 	struct pci_resource *hold_mem_node;
1951 	struct pci_resource *hold_p_mem_node;
1952 	struct pci_resource *hold_IO_node;
1953 	struct pci_resource *hold_bus_node;
1954 	struct irq_mapping irqs;
1955 	struct pci_func *new_slot;
1956 	struct pci_bus lpci_bus, *pci_bus;
1957 	struct resource_lists temp_resources;
1958 
1959 	memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus));
1960 	pci_bus = &lpci_bus;
1961 	pci_bus->number = func->bus;
1962 	devfn = PCI_DEVFN(func->device, func->function);
1963 
1964 	/* Check for Bridge */
1965 	rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
1966 	if (rc)
1967 		return rc;
1968 	dbg("%s: bus %x dev %x func %x temp_byte = %x\n", __FUNCTION__,
1969 		func->bus, func->device, func->function, temp_byte);
1970 
1971 	if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */
1972 		/* Set Primary bus */
1973 		dbg("set Primary bus = 0x%x\n", func->bus);
1974 		rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
1975 		if (rc)
1976 			return rc;
1977 
1978 		/* Find range of busses to use */
1979 		bus_node = get_max_resource(&resources->bus_head, 1L);
1980 
1981 		/* If we don't have any busses to allocate, we can't continue */
1982 		if (!bus_node) {
1983 			err("Got NO bus resource to use\n");
1984 			return -ENOMEM;
1985 		}
1986 		dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length);
1987 
1988 		/* Set Secondary bus */
1989 		dbg("set Secondary bus = 0x%x\n", temp_byte);
1990 		dbg("func->bus %x\n", func->bus);
1991 
1992 		temp_byte = (u8)bus_node->base;
1993 		dbg("set Secondary bus = 0x%x\n", temp_byte);
1994 		rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
1995 		if (rc)
1996 			return rc;
1997 
1998 		/* set subordinate bus */
1999 		temp_byte = (u8)(bus_node->base + bus_node->length - 1);
2000 		dbg("set subordinate bus = 0x%x\n", temp_byte);
2001 		rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2002 		if (rc)
2003 			return rc;
2004 
2005 		/* Set HP parameters (Cache Line Size, Latency Timer) */
2006 		rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2007 		if (rc)
2008 			return rc;
2009 
2010 		/* Setup the IO, memory, and prefetchable windows */
2011 
2012 		io_node = get_max_resource(&(resources->io_head), 0x1000L);
2013 		if (io_node) {
2014 			dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base, io_node->length, io_node->next);
2015 		}
2016 
2017 		mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2018 		if (mem_node) {
2019 			dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base, mem_node->length, mem_node->next);
2020 		}
2021 
2022 		if (resources->p_mem_head)
2023 			p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L);
2024 		else {
2025 			/*
2026 			 * In some platform implementation, MEM and PMEM are not
2027 			 *  distinguished, and hence ACPI _CRS has only MEM entries
2028 			 *  for both MEM and PMEM.
2029 			 */
2030 			dbg("using MEM for PMEM\n");
2031 			p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L);
2032 		}
2033 		if (p_mem_node) {
2034 			dbg("p_mem_node(base, len, next) (%x, %x, %p)\n", p_mem_node->base, p_mem_node->length, p_mem_node->next);
2035 		}
2036 
2037 		/* Set up the IRQ info */
2038 		if (!resources->irqs) {
2039 			irqs.barber_pole = 0;
2040 			irqs.interrupt[0] = 0;
2041 			irqs.interrupt[1] = 0;
2042 			irqs.interrupt[2] = 0;
2043 			irqs.interrupt[3] = 0;
2044 			irqs.valid_INT = 0;
2045 		} else {
2046 			irqs.barber_pole = resources->irqs->barber_pole;
2047 			irqs.interrupt[0] = resources->irqs->interrupt[0];
2048 			irqs.interrupt[1] = resources->irqs->interrupt[1];
2049 			irqs.interrupt[2] = resources->irqs->interrupt[2];
2050 			irqs.interrupt[3] = resources->irqs->interrupt[3];
2051 			irqs.valid_INT = resources->irqs->valid_INT;
2052 		}
2053 
2054 		/* Set up resource lists that are now aligned on top and bottom
2055 		 * for anything behind the bridge.
2056 		 */
2057 		temp_resources.bus_head = bus_node;
2058 		temp_resources.io_head = io_node;
2059 		temp_resources.mem_head = mem_node;
2060 		temp_resources.p_mem_head = p_mem_node;
2061 		temp_resources.irqs = &irqs;
2062 
2063 		/* Make copies of the nodes we are going to pass down so that
2064 		 * if there is a problem,we can just use these to free resources
2065 		 */
2066 		hold_bus_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2067 		hold_IO_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2068 		hold_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2069 		hold_p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
2070 
2071 		if (!hold_bus_node || !hold_IO_node || !hold_mem_node || !hold_p_mem_node) {
2072 			if (hold_bus_node)
2073 				kfree(hold_bus_node);
2074 			if (hold_IO_node)
2075 				kfree(hold_IO_node);
2076 			if (hold_mem_node)
2077 				kfree(hold_mem_node);
2078 			if (hold_p_mem_node)
2079 				kfree(hold_p_mem_node);
2080 
2081 			return(1);
2082 		}
2083 
2084 		memcpy(hold_bus_node, bus_node, sizeof(struct pci_resource));
2085 
2086 		bus_node->base += 1;
2087 		bus_node->length -= 1;
2088 		bus_node->next = NULL;
2089 
2090 		/* If we have IO resources copy them and fill in the bridge's
2091 		 * IO range registers
2092 		 */
2093 		if (io_node) {
2094 			memcpy(hold_IO_node, io_node, sizeof(struct pci_resource));
2095 			io_node->next = NULL;
2096 
2097 			/* set IO base and Limit registers */
2098 			RES_CHECK(io_node->base, 8);
2099 			temp_byte = (u8)(io_node->base >> 8);
2100 			rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2101 
2102 			RES_CHECK(io_node->base + io_node->length - 1, 8);
2103 			temp_byte = (u8)((io_node->base + io_node->length - 1) >> 8);
2104 			rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2105 		} else {
2106 			kfree(hold_IO_node);
2107 			hold_IO_node = NULL;
2108 		}
2109 
2110 		/* If we have memory resources copy them and fill in the bridge's
2111 		 * memory range registers.  Otherwise, fill in the range
2112 		 * registers with values that disable them.
2113 		 */
2114 		if (mem_node) {
2115 			memcpy(hold_mem_node, mem_node, sizeof(struct pci_resource));
2116 			mem_node->next = NULL;
2117 
2118 			/* set Mem base and Limit registers */
2119 			RES_CHECK(mem_node->base, 16);
2120 			temp_word = (u32)(mem_node->base >> 16);
2121 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2122 
2123 			RES_CHECK(mem_node->base + mem_node->length - 1, 16);
2124 			temp_word = (u32)((mem_node->base + mem_node->length - 1) >> 16);
2125 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2126 		} else {
2127 			temp_word = 0xFFFF;
2128 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2129 
2130 			temp_word = 0x0000;
2131 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2132 
2133 			kfree(hold_mem_node);
2134 			hold_mem_node = NULL;
2135 		}
2136 
2137 		/* If we have prefetchable memory resources copy them and
2138 		 * fill in the bridge's memory range registers.  Otherwise,
2139 		 * fill in the range registers with values that disable them.
2140 		 */
2141 		if (p_mem_node) {
2142 			memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource));
2143 			p_mem_node->next = NULL;
2144 
2145 			/* Set Pre Mem base and Limit registers */
2146 			RES_CHECK(p_mem_node->base, 16);
2147 			temp_word = (u32)(p_mem_node->base >> 16);
2148 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2149 
2150 			RES_CHECK(p_mem_node->base + p_mem_node->length - 1, 16);
2151 			temp_word = (u32)((p_mem_node->base + p_mem_node->length - 1) >> 16);
2152 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2153 		} else {
2154 			temp_word = 0xFFFF;
2155 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2156 
2157 			temp_word = 0x0000;
2158 			rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2159 
2160 			kfree(hold_p_mem_node);
2161 			hold_p_mem_node = NULL;
2162 		}
2163 
2164 		/* Adjust this to compensate for extra adjustment in first loop */
2165 		irqs.barber_pole--;
2166 
2167 		rc = 0;
2168 
2169 		/* Here we actually find the devices and configure them */
2170 		for (device = 0; (device <= 0x1F) && !rc; device++) {
2171 			irqs.barber_pole = (irqs.barber_pole + 1) & 0x03;
2172 
2173 			ID = 0xFFFFFFFF;
2174 			pci_bus->number = hold_bus_node->base;
2175 			pci_bus_read_config_dword (pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
2176 			pci_bus->number = func->bus;
2177 
2178 			if (ID != 0xFFFFFFFF) {	  /*  device Present */
2179 				/* Setup slot structure. */
2180 				new_slot = pciehp_slot_create(hold_bus_node->base);
2181 
2182 				if (new_slot == NULL) {
2183 					/* Out of memory */
2184 					rc = -ENOMEM;
2185 					continue;
2186 				}
2187 
2188 				new_slot->bus = hold_bus_node->base;
2189 				new_slot->device = device;
2190 				new_slot->function = 0;
2191 				new_slot->is_a_board = 1;
2192 				new_slot->status = 0;
2193 
2194 				rc = configure_new_device(ctrl, new_slot, 1, &temp_resources, func->bus, func->device);
2195 				dbg("configure_new_device rc=0x%x\n",rc);
2196 			}	/* End of IF (device in slot?) */
2197 		}		/* End of FOR loop */
2198 
2199 		if (rc) {
2200 			pciehp_destroy_resource_list(&temp_resources);
2201 
2202 			return_resource(&(resources->bus_head), hold_bus_node);
2203 			return_resource(&(resources->io_head), hold_IO_node);
2204 			return_resource(&(resources->mem_head), hold_mem_node);
2205 			return_resource(&(resources->p_mem_head), hold_p_mem_node);
2206 			return(rc);
2207 		}
2208 
2209 		/* Save the interrupt routing information */
2210 		if (resources->irqs) {
2211 			resources->irqs->interrupt[0] = irqs.interrupt[0];
2212 			resources->irqs->interrupt[1] = irqs.interrupt[1];
2213 			resources->irqs->interrupt[2] = irqs.interrupt[2];
2214 			resources->irqs->interrupt[3] = irqs.interrupt[3];
2215 			resources->irqs->valid_INT = irqs.valid_INT;
2216 		} else if (!behind_bridge) {
2217 			/* We need to hook up the interrupts here */
2218 			for (cloop = 0; cloop < 4; cloop++) {
2219 				if (irqs.valid_INT & (0x01 << cloop)) {
2220 					rc = pciehp_set_irq(func->bus, func->device,
2221 							   0x0A + cloop, irqs.interrupt[cloop]);
2222 					if (rc) {
2223 						pciehp_destroy_resource_list (&temp_resources);
2224 						return_resource(&(resources->bus_head), hold_bus_node);
2225 						return_resource(&(resources->io_head), hold_IO_node);
2226 						return_resource(&(resources->mem_head), hold_mem_node);
2227 						return_resource(&(resources->p_mem_head), hold_p_mem_node);
2228 						return rc;
2229 					}
2230 				}
2231 			}	/* end of for loop */
2232 		}
2233 
2234 		/* Return unused bus resources
2235 		 * First use the temporary node to store information for the board
2236 		 */
2237 		if (hold_bus_node && bus_node && temp_resources.bus_head) {
2238 			hold_bus_node->length = bus_node->base - hold_bus_node->base;
2239 
2240 			hold_bus_node->next = func->bus_head;
2241 			func->bus_head = hold_bus_node;
2242 
2243 			temp_byte = (u8)(temp_resources.bus_head->base - 1);
2244 
2245 			/* Set subordinate bus */
2246 			dbg("re-set subordinate bus = 0x%x\n", temp_byte);
2247 
2248 			rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2249 
2250 			if (temp_resources.bus_head->length == 0) {
2251 				kfree(temp_resources.bus_head);
2252 				temp_resources.bus_head = NULL;
2253 			} else {
2254 				dbg("return bus res of b:d(0x%x:%x) base:len(0x%x:%x)\n",
2255 					func->bus, func->device, temp_resources.bus_head->base, temp_resources.bus_head->length);
2256 				return_resource(&(resources->bus_head), temp_resources.bus_head);
2257 			}
2258 		}
2259 
2260 		/* If we have IO space available and there is some left,
2261 		 * return the unused portion
2262 		 */
2263 		if (hold_IO_node && temp_resources.io_head) {
2264 			io_node = do_pre_bridge_resource_split(&(temp_resources.io_head),
2265 							       &hold_IO_node, 0x1000);
2266 
2267 			/* Check if we were able to split something off */
2268 			if (io_node) {
2269 				hold_IO_node->base = io_node->base + io_node->length;
2270 
2271 				RES_CHECK(hold_IO_node->base, 8);
2272 				temp_byte = (u8)((hold_IO_node->base) >> 8);
2273 				rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_BASE, temp_byte);
2274 
2275 				return_resource(&(resources->io_head), io_node);
2276 			}
2277 
2278 			io_node = do_bridge_resource_split(&(temp_resources.io_head), 0x1000);
2279 
2280 			/*  Check if we were able to split something off */
2281 			if (io_node) {
2282 				/* First use the temporary node to store information for the board */
2283 				hold_IO_node->length = io_node->base - hold_IO_node->base;
2284 
2285 				/* If we used any, add it to the board's list */
2286 				if (hold_IO_node->length) {
2287 					hold_IO_node->next = func->io_head;
2288 					func->io_head = hold_IO_node;
2289 
2290 					RES_CHECK(io_node->base - 1, 8);
2291 					temp_byte = (u8)((io_node->base - 1) >> 8);
2292 					rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2293 
2294 					return_resource(&(resources->io_head), io_node);
2295 				} else {
2296 					/* It doesn't need any IO */
2297 					temp_byte = 0x00;
2298 					rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2299 
2300 					return_resource(&(resources->io_head), io_node);
2301 					kfree(hold_IO_node);
2302 				}
2303 			} else {
2304 				/* It used most of the range */
2305 				hold_IO_node->next = func->io_head;
2306 				func->io_head = hold_IO_node;
2307 			}
2308 		} else if (hold_IO_node) {
2309 			/* It used the whole range */
2310 			hold_IO_node->next = func->io_head;
2311 			func->io_head = hold_IO_node;
2312 		}
2313 
2314 		/* If we have memory space available and there is some left,
2315 		 * return the unused portion
2316 		 */
2317 		if (hold_mem_node && temp_resources.mem_head) {
2318 			mem_node = do_pre_bridge_resource_split(&(temp_resources.mem_head), &hold_mem_node, 0x100000L);
2319 
2320 			/* Check if we were able to split something off */
2321 			if (mem_node) {
2322 				hold_mem_node->base = mem_node->base + mem_node->length;
2323 
2324 				RES_CHECK(hold_mem_node->base, 16);
2325 				temp_word = (u32)((hold_mem_node->base) >> 16);
2326 				rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word);
2327 
2328 				return_resource(&(resources->mem_head), mem_node);
2329 			}
2330 
2331 			mem_node = do_bridge_resource_split(&(temp_resources.mem_head), 0x100000L);
2332 
2333 			/* Check if we were able to split something off */
2334 			if (mem_node) {
2335 				/* First use the temporary node to store information for the board */
2336 				hold_mem_node->length = mem_node->base - hold_mem_node->base;
2337 
2338 				if (hold_mem_node->length) {
2339 					hold_mem_node->next = func->mem_head;
2340 					func->mem_head = hold_mem_node;
2341 
2342 					/* Configure end address */
2343 					RES_CHECK(mem_node->base - 1, 16);
2344 					temp_word = (u32)((mem_node->base - 1) >> 16);
2345 					rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2346 
2347 					/* Return unused resources to the pool */
2348 					return_resource(&(resources->mem_head), mem_node);
2349 				} else {
2350 					/* It doesn't need any Mem */
2351 					temp_word = 0x0000;
2352 					rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word);
2353 
2354 					return_resource(&(resources->mem_head), mem_node);
2355 					kfree(hold_mem_node);
2356 				}
2357 			} else {
2358 				/* It used most of the range */
2359 				hold_mem_node->next = func->mem_head;
2360 				func->mem_head = hold_mem_node;
2361 			}
2362 		} else if (hold_mem_node) {
2363 			/* It used the whole range */
2364 			hold_mem_node->next = func->mem_head;
2365 			func->mem_head = hold_mem_node;
2366 		}
2367 
2368 		/* If we have prefetchable memory space available and there is some
2369 		 * left at the end, return the unused portion
2370 		 */
2371 		if (hold_p_mem_node && temp_resources.p_mem_head) {
2372 			p_mem_node = do_pre_bridge_resource_split(&(temp_resources.p_mem_head),
2373 								  &hold_p_mem_node, 0x100000L);
2374 
2375 			/* Check if we were able to split something off */
2376 			if (p_mem_node) {
2377 				hold_p_mem_node->base = p_mem_node->base + p_mem_node->length;
2378 
2379 				RES_CHECK(hold_p_mem_node->base, 16);
2380 				temp_word = (u32)((hold_p_mem_node->base) >> 16);
2381 				rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word);
2382 
2383 				return_resource(&(resources->p_mem_head), p_mem_node);
2384 			}
2385 
2386 			p_mem_node = do_bridge_resource_split(&(temp_resources.p_mem_head), 0x100000L);
2387 
2388 			/* Check if we were able to split something off */
2389 			if (p_mem_node) {
2390 				/* First use the temporary node to store information for the board */
2391 				hold_p_mem_node->length = p_mem_node->base - hold_p_mem_node->base;
2392 
2393 				/* If we used any, add it to the board's list */
2394 				if (hold_p_mem_node->length) {
2395 					hold_p_mem_node->next = func->p_mem_head;
2396 					func->p_mem_head = hold_p_mem_node;
2397 
2398 					RES_CHECK(p_mem_node->base - 1, 16);
2399 					temp_word = (u32)((p_mem_node->base - 1) >> 16);
2400 					rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2401 
2402 					return_resource(&(resources->p_mem_head), p_mem_node);
2403 				} else {
2404 					/* It doesn't need any PMem */
2405 					temp_word = 0x0000;
2406 					rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2407 
2408 					return_resource(&(resources->p_mem_head), p_mem_node);
2409 					kfree(hold_p_mem_node);
2410 				}
2411 			} else {
2412 				/* It used the most of the range */
2413 				hold_p_mem_node->next = func->p_mem_head;
2414 				func->p_mem_head = hold_p_mem_node;
2415 			}
2416 		} else if (hold_p_mem_node) {
2417 			/* It used the whole range */
2418 			hold_p_mem_node->next = func->p_mem_head;
2419 			func->p_mem_head = hold_p_mem_node;
2420 		}
2421 
2422 		/* We should be configuring an IRQ and the bridge's base address
2423 		 * registers if it needs them.  Although we have never seen such
2424 		 * a device
2425 		 */
2426 
2427 		pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_BRIDGE);
2428 
2429 		dbg("PCI Bridge Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus,
2430 			func->device, func->function);
2431 	} else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2432 		/* Standard device */
2433 		u64	base64;
2434 		rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code);
2435 
2436 		if (class_code == PCI_BASE_CLASS_DISPLAY)
2437 			return (DEVICE_TYPE_NOT_SUPPORTED);
2438 
2439 		/* Figure out IO and memory needs */
2440 		for (cloop = PCI_BASE_ADDRESS_0; cloop <= PCI_BASE_ADDRESS_5; cloop += 4) {
2441 			temp_register = 0xFFFFFFFF;
2442 
2443 			rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
2444 			rc = pci_bus_read_config_dword(pci_bus, devfn, cloop, &temp_register);
2445 			dbg("Bar[%x]=0x%x on bus:dev:func(0x%x:%x:%x)\n", cloop, temp_register, func->bus, func->device, func->function);
2446 
2447 			if (!temp_register)
2448 				continue;
2449 
2450 			base64 = 0L;
2451 			if (temp_register & PCI_BASE_ADDRESS_SPACE_IO) {
2452 				/* Map IO */
2453 
2454 				/* Set base = amount of IO space */
2455 				base = temp_register & 0xFFFFFFFC;
2456 				base = ~base + 1;
2457 
2458 				dbg("NEED IO length(0x%x)\n", base);
2459 				io_node = get_io_resource(&(resources->io_head),(ulong)base);
2460 
2461 				/* Allocate the resource to the board */
2462 				if (io_node) {
2463 					dbg("Got IO base=0x%x(length=0x%x)\n", io_node->base, io_node->length);
2464 					base = (u32)io_node->base;
2465 					io_node->next = func->io_head;
2466 					func->io_head = io_node;
2467 				} else {
2468 					err("Got NO IO resource(length=0x%x)\n", base);
2469 					return -ENOMEM;
2470 				}
2471 			} else {	/* Map MEM */
2472 				int prefetchable = 1;
2473 				struct pci_resource **res_node = &func->p_mem_head;
2474 				char *res_type_str = "PMEM";
2475 				u32	temp_register2;
2476 
2477 				if (!(temp_register & PCI_BASE_ADDRESS_MEM_PREFETCH)) {
2478 					prefetchable = 0;
2479 					res_node = &func->mem_head;
2480 					res_type_str++;
2481 				}
2482 
2483 				base = temp_register & 0xFFFFFFF0;
2484 				base = ~base + 1;
2485 
2486 				switch (temp_register & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
2487 				case PCI_BASE_ADDRESS_MEM_TYPE_32:
2488 					dbg("NEED 32 %s bar=0x%x(length=0x%x)\n", res_type_str, temp_register, base);
2489 
2490 					if (prefetchable && resources->p_mem_head)
2491 						mem_node=get_resource(&(resources->p_mem_head), (ulong)base);
2492 					else {
2493 						if (prefetchable)
2494 							dbg("using MEM for PMEM\n");
2495 						mem_node=get_resource(&(resources->mem_head), (ulong)base);
2496 					}
2497 
2498 					/* Allocate the resource to the board */
2499 					if (mem_node) {
2500 						base = (u32)mem_node->base;
2501 						mem_node->next = *res_node;
2502 						*res_node = mem_node;
2503 						dbg("Got 32 %s base=0x%x(length=0x%x)\n", res_type_str, mem_node->base, mem_node->length);
2504 					} else {
2505 						err("Got NO 32 %s resource(length=0x%x)\n", res_type_str, base);
2506 						return -ENOMEM;
2507 					}
2508 					break;
2509 				case PCI_BASE_ADDRESS_MEM_TYPE_64:
2510 					rc = pci_bus_read_config_dword(pci_bus, devfn, cloop+4, &temp_register2);
2511 					dbg("NEED 64 %s bar=0x%x:%x(length=0x%x)\n", res_type_str, temp_register2, temp_register, base);
2512 
2513 					if (prefetchable && resources->p_mem_head)
2514 						mem_node = get_resource(&(resources->p_mem_head), (ulong)base);
2515 					else {
2516 						if (prefetchable)
2517 							dbg("using MEM for PMEM\n");
2518 						mem_node = get_resource(&(resources->mem_head), (ulong)base);
2519 					}
2520 
2521 					/* Allocate the resource to the board */
2522 					if (mem_node) {
2523 						base64 = mem_node->base;
2524 						mem_node->next = *res_node;
2525 						*res_node = mem_node;
2526 						dbg("Got 64 %s base=0x%x:%x(length=%x)\n", res_type_str, (u32)(base64 >> 32), (u32)base64, mem_node->length);
2527 					} else {
2528 						err("Got NO 64 %s resource(length=0x%x)\n", res_type_str, base);
2529 						return -ENOMEM;
2530 					}
2531 					break;
2532 				default:
2533 					dbg("reserved BAR type=0x%x\n", temp_register);
2534 					break;
2535 				}
2536 
2537 			}
2538 
2539 			if (base64) {
2540 				rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2541 				cloop += 4;
2542 				base64 >>= 32;
2543 
2544 				if (base64) {
2545 					dbg("%s: high dword of base64(0x%x) set to 0\n", __FUNCTION__, (u32)base64);
2546 					base64 = 0x0L;
2547 				}
2548 
2549 				rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, (u32)base64);
2550 			} else {
2551 				rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base);
2552 			}
2553 		}		/* End of base register loop */
2554 
2555 		/* Disable ROM base Address */
2556 		temp_word = 0x00L;
2557 		rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word);
2558 
2559 		/* Set HP parameters (Cache Line Size, Latency Timer) */
2560 		rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2561 		if (rc)
2562 			return rc;
2563 
2564 		pciehprm_enable_card(ctrl, func, PCI_HEADER_TYPE_NORMAL);
2565 
2566 		dbg("PCI function Hot-Added s:b:d:f(%02x:%02x:%02x:%02x)\n", ctrl->seg, func->bus, func->device, func->function);
2567 	}			/* End of Not-A-Bridge else */
2568 	else {
2569 		/* It's some strange type of PCI adapter (Cardbus?) */
2570 		return(DEVICE_TYPE_NOT_SUPPORTED);
2571 	}
2572 
2573 	func->configured = 1;
2574 
2575 	dbg("%s: exit\n", __FUNCTION__);
2576 
2577 	return 0;
2578 }
2579 
2580