1 /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*- 2 * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com 3 * 4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 6 * All rights reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Authors: 28 * Rickard E. (Rik) Faith <faith@valinux.com> 29 * 30 * Acknowledgements: 31 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg. 32 * 33 */ 34 35 #ifndef _DRM_H_ 36 #define _DRM_H_ 37 38 #if defined(__linux__) 39 #include <linux/config.h> 40 #include <asm/ioctl.h> /* For _IO* macros */ 41 #define DRM_IOCTL_NR(n) _IOC_NR(n) 42 #define DRM_IOC_VOID _IOC_NONE 43 #define DRM_IOC_READ _IOC_READ 44 #define DRM_IOC_WRITE _IOC_WRITE 45 #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE 46 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 47 #elif defined(__FreeBSD__) || defined(__NetBSD__) 48 #if defined(__FreeBSD__) && defined(XFree86Server) 49 /* Prevent name collision when including sys/ioccom.h */ 50 #undef ioctl 51 #include <sys/ioccom.h> 52 #define ioctl(a,b,c) xf86ioctl(a,b,c) 53 #else 54 #include <sys/ioccom.h> 55 #endif /* __FreeBSD__ && xf86ioctl */ 56 #define DRM_IOCTL_NR(n) ((n) & 0xff) 57 #define DRM_IOC_VOID IOC_VOID 58 #define DRM_IOC_READ IOC_OUT 59 #define DRM_IOC_WRITE IOC_IN 60 #define DRM_IOC_READWRITE IOC_INOUT 61 #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size) 62 #endif 63 64 #define XFREE86_VERSION(major,minor,patch,snap) \ 65 ((major << 16) | (minor << 8) | patch) 66 67 #ifndef CONFIG_XFREE86_VERSION 68 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0) 69 #endif 70 71 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) 72 #define DRM_PROC_DEVICES "/proc/devices" 73 #define DRM_PROC_MISC "/proc/misc" 74 #define DRM_PROC_DRM "/proc/drm" 75 #define DRM_DEV_DRM "/dev/drm" 76 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 77 #define DRM_DEV_UID 0 78 #define DRM_DEV_GID 0 79 #endif 80 81 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) 82 #define DRM_MAJOR 226 83 #define DRM_MAX_MINOR 15 84 #endif 85 #define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */ 86 #define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */ 87 #define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */ 88 #define DRM_RAM_PERCENT 10 /* How much system ram can we lock? */ 89 90 #define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */ 91 #define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */ 92 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 93 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 94 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 95 96 typedef unsigned long drm_handle_t; 97 typedef unsigned int drm_context_t; 98 typedef unsigned int drm_drawable_t; 99 typedef unsigned int drm_magic_t; 100 101 /* Warning: If you change this structure, make sure you change 102 * XF86DRIClipRectRec in the server as well */ 103 104 /* KW: Actually it's illegal to change either for 105 * backwards-compatibility reasons. 106 */ 107 108 typedef struct drm_clip_rect { 109 unsigned short x1; 110 unsigned short y1; 111 unsigned short x2; 112 unsigned short y2; 113 } drm_clip_rect_t; 114 115 typedef struct drm_tex_region { 116 unsigned char next; 117 unsigned char prev; 118 unsigned char in_use; 119 unsigned char padding; 120 unsigned int age; 121 } drm_tex_region_t; 122 123 /* Seperate include files for the i810/mga/r128 specific structures */ 124 #include "mga_drm.h" 125 #include "i810_drm.h" 126 #include "r128_drm.h" 127 #include "radeon_drm.h" 128 #include "sis_drm.h" 129 #include "i830_drm.h" 130 #include "savage_drm.h" 131 #include "via_drm.h" 132 133 typedef struct drm_version { 134 int version_major; /* Major version */ 135 int version_minor; /* Minor version */ 136 int version_patchlevel;/* Patch level */ 137 size_t name_len; /* Length of name buffer */ 138 char *name; /* Name of driver */ 139 size_t date_len; /* Length of date buffer */ 140 char *date; /* User-space buffer to hold date */ 141 size_t desc_len; /* Length of desc buffer */ 142 char *desc; /* User-space buffer to hold desc */ 143 } drm_version_t; 144 145 typedef struct drm_unique { 146 size_t unique_len; /* Length of unique */ 147 char *unique; /* Unique name for driver instantiation */ 148 } drm_unique_t; 149 150 typedef struct drm_list { 151 int count; /* Length of user-space structures */ 152 drm_version_t *version; 153 } drm_list_t; 154 155 typedef struct drm_block { 156 int unused; 157 } drm_block_t; 158 159 typedef struct drm_control { 160 enum { 161 DRM_ADD_COMMAND, 162 DRM_RM_COMMAND, 163 DRM_INST_HANDLER, 164 DRM_UNINST_HANDLER 165 } func; 166 int irq; 167 } drm_control_t; 168 169 typedef enum drm_map_type { 170 _DRM_FRAME_BUFFER = 0, /* WC (no caching), no core dump */ 171 _DRM_REGISTERS = 1, /* no caching, no core dump */ 172 _DRM_SHM = 2, /* shared, cached */ 173 _DRM_AGP = 3, /* AGP/GART */ 174 _DRM_SCATTER_GATHER = 4 /* Scatter/gather memory for PCI DMA */ 175 } drm_map_type_t; 176 177 typedef enum drm_map_flags { 178 _DRM_RESTRICTED = 0x01, /* Cannot be mapped to user-virtual */ 179 _DRM_READ_ONLY = 0x02, 180 _DRM_LOCKED = 0x04, /* shared, cached, locked */ 181 _DRM_KERNEL = 0x08, /* kernel requires access */ 182 _DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */ 183 _DRM_CONTAINS_LOCK = 0x20, /* SHM page that contains lock */ 184 _DRM_REMOVABLE = 0x40 /* Removable mapping */ 185 } drm_map_flags_t; 186 187 typedef struct drm_ctx_priv_map { 188 unsigned int ctx_id; /* Context requesting private mapping */ 189 void *handle; /* Handle of map */ 190 } drm_ctx_priv_map_t; 191 192 typedef struct drm_map { 193 unsigned long offset; /* Requested physical address (0 for SAREA)*/ 194 unsigned long size; /* Requested physical size (bytes) */ 195 drm_map_type_t type; /* Type of memory to map */ 196 drm_map_flags_t flags; /* Flags */ 197 void *handle; /* User-space: "Handle" to pass to mmap */ 198 /* Kernel-space: kernel-virtual address */ 199 int mtrr; /* MTRR slot used */ 200 /* Private data */ 201 } drm_map_t; 202 203 typedef struct drm_client { 204 int idx; /* Which client desired? */ 205 int auth; /* Is client authenticated? */ 206 unsigned long pid; /* Process id */ 207 unsigned long uid; /* User id */ 208 unsigned long magic; /* Magic */ 209 unsigned long iocs; /* Ioctl count */ 210 } drm_client_t; 211 212 typedef enum { 213 _DRM_STAT_LOCK, 214 _DRM_STAT_OPENS, 215 _DRM_STAT_CLOSES, 216 _DRM_STAT_IOCTLS, 217 _DRM_STAT_LOCKS, 218 _DRM_STAT_UNLOCKS, 219 _DRM_STAT_VALUE, /* Generic value */ 220 _DRM_STAT_BYTE, /* Generic byte counter (1024bytes/K) */ 221 _DRM_STAT_COUNT, /* Generic non-byte counter (1000/k) */ 222 223 _DRM_STAT_IRQ, /* IRQ */ 224 _DRM_STAT_PRIMARY, /* Primary DMA bytes */ 225 _DRM_STAT_SECONDARY, /* Secondary DMA bytes */ 226 _DRM_STAT_DMA, /* DMA */ 227 _DRM_STAT_SPECIAL, /* Special DMA (e.g., priority or polled) */ 228 _DRM_STAT_MISSED /* Missed DMA opportunity */ 229 230 /* Add to the *END* of the list */ 231 } drm_stat_type_t; 232 233 typedef struct drm_stats { 234 unsigned long count; 235 struct { 236 unsigned long value; 237 drm_stat_type_t type; 238 } data[15]; 239 } drm_stats_t; 240 241 typedef enum drm_lock_flags { 242 _DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */ 243 _DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */ 244 _DRM_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */ 245 _DRM_LOCK_FLUSH_ALL = 0x08, /* Flush all DMA queues first */ 246 /* These *HALT* flags aren't supported yet 247 -- they will be used to support the 248 full-screen DGA-like mode. */ 249 _DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues */ 250 _DRM_HALT_CUR_QUEUES = 0x20 /* Halt all current queues */ 251 } drm_lock_flags_t; 252 253 typedef struct drm_lock { 254 int context; 255 drm_lock_flags_t flags; 256 } drm_lock_t; 257 258 typedef enum drm_dma_flags { /* These values *MUST* match xf86drm.h */ 259 /* Flags for DMA buffer dispatch */ 260 _DRM_DMA_BLOCK = 0x01, /* Block until buffer dispatched. 261 Note, the buffer may not yet have 262 been processed by the hardware -- 263 getting a hardware lock with the 264 hardware quiescent will ensure 265 that the buffer has been 266 processed. */ 267 _DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held */ 268 _DRM_DMA_PRIORITY = 0x04, /* High priority dispatch */ 269 270 /* Flags for DMA buffer request */ 271 _DRM_DMA_WAIT = 0x10, /* Wait for free buffers */ 272 _DRM_DMA_SMALLER_OK = 0x20, /* Smaller-than-requested buffers ok */ 273 _DRM_DMA_LARGER_OK = 0x40 /* Larger-than-requested buffers ok */ 274 } drm_dma_flags_t; 275 276 typedef struct drm_buf_desc { 277 int count; /* Number of buffers of this size */ 278 int size; /* Size in bytes */ 279 int low_mark; /* Low water mark */ 280 int high_mark; /* High water mark */ 281 enum { 282 _DRM_PAGE_ALIGN = 0x01, /* Align on page boundaries for DMA */ 283 _DRM_AGP_BUFFER = 0x02, /* Buffer is in agp space */ 284 _DRM_SG_BUFFER = 0x04 /* Scatter/gather memory buffer */ 285 } flags; 286 unsigned long agp_start; /* Start address of where the agp buffers 287 * are in the agp aperture */ 288 } drm_buf_desc_t; 289 290 typedef struct drm_buf_info { 291 int count; /* Entries in list */ 292 drm_buf_desc_t *list; 293 } drm_buf_info_t; 294 295 typedef struct drm_buf_free { 296 int count; 297 int *list; 298 } drm_buf_free_t; 299 300 typedef struct drm_buf_pub { 301 int idx; /* Index into master buflist */ 302 int total; /* Buffer size */ 303 int used; /* Amount of buffer in use (for DMA) */ 304 void *address; /* Address of buffer */ 305 } drm_buf_pub_t; 306 307 typedef struct drm_buf_map { 308 int count; /* Length of buflist */ 309 void *virtual; /* Mmaped area in user-virtual */ 310 drm_buf_pub_t *list; /* Buffer information */ 311 } drm_buf_map_t; 312 313 typedef struct drm_dma { 314 /* Indices here refer to the offset into 315 buflist in drm_buf_get_t. */ 316 int context; /* Context handle */ 317 int send_count; /* Number of buffers to send */ 318 int *send_indices; /* List of handles to buffers */ 319 int *send_sizes; /* Lengths of data to send */ 320 drm_dma_flags_t flags; /* Flags */ 321 int request_count; /* Number of buffers requested */ 322 int request_size; /* Desired size for buffers */ 323 int *request_indices; /* Buffer information */ 324 int *request_sizes; 325 int granted_count; /* Number of buffers granted */ 326 } drm_dma_t; 327 328 typedef enum { 329 _DRM_CONTEXT_PRESERVED = 0x01, 330 _DRM_CONTEXT_2DONLY = 0x02 331 } drm_ctx_flags_t; 332 333 typedef struct drm_ctx { 334 drm_context_t handle; 335 drm_ctx_flags_t flags; 336 } drm_ctx_t; 337 338 typedef struct drm_ctx_res { 339 int count; 340 drm_ctx_t *contexts; 341 } drm_ctx_res_t; 342 343 typedef struct drm_draw { 344 drm_drawable_t handle; 345 } drm_draw_t; 346 347 typedef struct drm_auth { 348 drm_magic_t magic; 349 } drm_auth_t; 350 351 typedef struct drm_irq_busid { 352 int irq; 353 int busnum; 354 int devnum; 355 int funcnum; 356 } drm_irq_busid_t; 357 358 typedef enum { 359 _DRM_VBLANK_ABSOLUTE = 0x0, /* Wait for specific vblank sequence number */ 360 _DRM_VBLANK_RELATIVE = 0x1, /* Wait for given number of vblanks */ 361 _DRM_VBLANK_SIGNAL = 0x40000000 /* Send signal instead of blocking */ 362 } drm_vblank_seq_type_t; 363 364 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL 365 366 struct drm_wait_vblank_request { 367 drm_vblank_seq_type_t type; 368 unsigned int sequence; 369 unsigned long signal; 370 }; 371 372 struct drm_wait_vblank_reply { 373 drm_vblank_seq_type_t type; 374 unsigned int sequence; 375 long tval_sec; 376 long tval_usec; 377 }; 378 379 typedef union drm_wait_vblank { 380 struct drm_wait_vblank_request request; 381 struct drm_wait_vblank_reply reply; 382 } drm_wait_vblank_t; 383 384 typedef struct drm_agp_mode { 385 unsigned long mode; 386 } drm_agp_mode_t; 387 388 /* For drm_agp_alloc -- allocated a buffer */ 389 typedef struct drm_agp_buffer { 390 unsigned long size; /* In bytes -- will round to page boundary */ 391 unsigned long handle; /* Used for BIND/UNBIND ioctls */ 392 unsigned long type; /* Type of memory to allocate */ 393 unsigned long physical; /* Physical used by i810 */ 394 } drm_agp_buffer_t; 395 396 /* For drm_agp_bind */ 397 typedef struct drm_agp_binding { 398 unsigned long handle; /* From drm_agp_buffer */ 399 unsigned long offset; /* In bytes -- will round to page boundary */ 400 } drm_agp_binding_t; 401 402 typedef struct drm_agp_info { 403 int agp_version_major; 404 int agp_version_minor; 405 unsigned long mode; 406 unsigned long aperture_base; /* physical address */ 407 unsigned long aperture_size; /* bytes */ 408 unsigned long memory_allowed; /* bytes */ 409 unsigned long memory_used; 410 411 /* PCI information */ 412 unsigned short id_vendor; 413 unsigned short id_device; 414 } drm_agp_info_t; 415 416 typedef struct drm_scatter_gather { 417 unsigned long size; /* In bytes -- will round to page boundary */ 418 unsigned long handle; /* Used for mapping / unmapping */ 419 } drm_scatter_gather_t; 420 421 #define DRM_IOCTL_BASE 'd' 422 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 423 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 424 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 425 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 426 427 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) 428 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) 429 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t) 430 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t) 431 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t) 432 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t) 433 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t) 434 435 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t) 436 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t) 437 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t) 438 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t) 439 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t) 440 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t) 441 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t) 442 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t) 443 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t) 444 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t) 445 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t) 446 447 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t) 448 449 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t) 450 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t) 451 452 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t) 453 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t) 454 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t) 455 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t) 456 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t) 457 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t) 458 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t) 459 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t) 460 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t) 461 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t) 462 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t) 463 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t) 464 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t) 465 466 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 467 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 468 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t) 469 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t) 470 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t) 471 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t) 472 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t) 473 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t) 474 475 #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) 476 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) 477 478 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t) 479 480 /* Device specfic ioctls should only be in their respective headers 481 * The device specific ioctl range is 0x40 to 0x79. */ 482 #define DRM_COMMAND_BASE 0x40 483 484 #endif 485