1 /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- 2 * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com 3 * 4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 6 * All rights reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 25 * DEALINGS IN THE SOFTWARE. 26 * 27 * Authors: Jeff Hartmann <jhartmann@valinux.com> 28 * Keith Whitwell <keithw@valinux.com> 29 * 30 */ 31 32 #ifndef _MGA_DRM_H_ 33 #define _MGA_DRM_H_ 34 35 /* WARNING: If you change any of these defines, make sure to change the 36 * defines in the Xserver file (xf86drmMga.h) 37 */ 38 #ifndef _MGA_DEFINES_ 39 #define _MGA_DEFINES_ 40 41 #define MGA_F 0x1 /* fog */ 42 #define MGA_A 0x2 /* alpha */ 43 #define MGA_S 0x4 /* specular */ 44 #define MGA_T2 0x8 /* multitexture */ 45 46 #define MGA_WARP_TGZ 0 47 #define MGA_WARP_TGZF (MGA_F) 48 #define MGA_WARP_TGZA (MGA_A) 49 #define MGA_WARP_TGZAF (MGA_F|MGA_A) 50 #define MGA_WARP_TGZS (MGA_S) 51 #define MGA_WARP_TGZSF (MGA_S|MGA_F) 52 #define MGA_WARP_TGZSA (MGA_S|MGA_A) 53 #define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) 54 #define MGA_WARP_T2GZ (MGA_T2) 55 #define MGA_WARP_T2GZF (MGA_T2|MGA_F) 56 #define MGA_WARP_T2GZA (MGA_T2|MGA_A) 57 #define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) 58 #define MGA_WARP_T2GZS (MGA_T2|MGA_S) 59 #define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) 60 #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) 61 #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) 62 63 #define MGA_MAX_G400_PIPES 16 64 #define MGA_MAX_G200_PIPES 8 /* no multitex */ 65 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES 66 67 #define MGA_CARD_TYPE_G200 1 68 #define MGA_CARD_TYPE_G400 2 69 70 #define MGA_FRONT 0x1 71 #define MGA_BACK 0x2 72 #define MGA_DEPTH 0x4 73 74 /* 3d state excluding texture units: 75 */ 76 #define MGA_CTXREG_DSTORG 0 /* validated */ 77 #define MGA_CTXREG_MACCESS 1 78 #define MGA_CTXREG_PLNWT 2 79 #define MGA_CTXREG_DWGCTL 3 80 #define MGA_CTXREG_ALPHACTRL 4 81 #define MGA_CTXREG_FOGCOLOR 5 82 #define MGA_CTXREG_WFLAG 6 83 #define MGA_CTXREG_TDUAL0 7 84 #define MGA_CTXREG_TDUAL1 8 85 #define MGA_CTXREG_FCOL 9 86 #define MGA_CTXREG_STENCIL 10 87 #define MGA_CTXREG_STENCILCTL 11 88 #define MGA_CTX_SETUP_SIZE 12 89 90 /* 2d state 91 */ 92 #define MGA_2DREG_PITCH 0 93 #define MGA_2D_SETUP_SIZE 1 94 95 /* Each texture unit has a state: 96 */ 97 #define MGA_TEXREG_CTL 0 98 #define MGA_TEXREG_CTL2 1 99 #define MGA_TEXREG_FILTER 2 100 #define MGA_TEXREG_BORDERCOL 3 101 #define MGA_TEXREG_ORG 4 /* validated */ 102 #define MGA_TEXREG_ORG1 5 103 #define MGA_TEXREG_ORG2 6 104 #define MGA_TEXREG_ORG3 7 105 #define MGA_TEXREG_ORG4 8 106 #define MGA_TEXREG_WIDTH 9 107 #define MGA_TEXREG_HEIGHT 10 108 #define MGA_TEX_SETUP_SIZE 11 109 110 /* What needs to be changed for the current vertex dma buffer? 111 */ 112 #define MGA_UPLOAD_CTX 0x1 113 #define MGA_UPLOAD_TEX0 0x2 114 #define MGA_UPLOAD_TEX1 0x4 115 #define MGA_UPLOAD_PIPE 0x8 116 #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ 117 #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ 118 #define MGA_UPLOAD_2D 0x40 119 #define MGA_WAIT_AGE 0x80 /* handled client-side */ 120 #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ 121 #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock 122 quiescent */ 123 124 /* 32 buffers of 64k each, total 2 meg. 125 */ 126 #define MGA_DMA_BUF_ORDER 16 127 #define MGA_DMA_BUF_SZ (1<<MGA_DMA_BUF_ORDER) 128 #define MGA_DMA_BUF_NR 31 129 130 /* Keep these small for testing. 131 */ 132 #define MGA_NR_SAREA_CLIPRECTS 8 133 134 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128 135 * regions, subject to a minimum region size of (1<<16) == 64k. 136 * 137 * Clients may subdivide regions internally, but when sharing between 138 * clients, the region size is the minimum granularity. 139 */ 140 141 #define MGA_CARD_HEAP 0 142 #define MGA_AGP_HEAP 1 143 #define MGA_NR_TEX_HEAPS 2 144 #define MGA_NR_TEX_REGIONS 16 145 #define MGA_LOG_MIN_TEX_REGION_SIZE 16 146 #endif 147 148 typedef struct _drm_mga_warp_index { 149 int installed; 150 unsigned long phys_addr; 151 int size; 152 } drm_mga_warp_index_t; 153 154 typedef struct drm_mga_init { 155 enum { 156 MGA_INIT_DMA = 0x01, 157 MGA_CLEANUP_DMA = 0x02 158 } func; 159 int reserved_map_agpstart; 160 int reserved_map_idx; 161 int buffer_map_idx; 162 int sarea_priv_offset; 163 int primary_size; 164 int warp_ucode_size; 165 unsigned int frontOffset; 166 unsigned int backOffset; 167 unsigned int depthOffset; 168 unsigned int textureOffset; 169 unsigned int textureSize; 170 unsigned int agpTextureOffset; 171 unsigned int agpTextureSize; 172 unsigned int cpp; 173 unsigned int stride; 174 int sgram; 175 int chipset; 176 drm_mga_warp_index_t WarpIndex[MGA_MAX_WARP_PIPES]; 177 unsigned int mAccess; 178 } drm_mga_init_t; 179 180 /* Warning: if you change the sarea structure, you must change the Xserver 181 * structures as well */ 182 183 typedef struct _drm_mga_tex_region { 184 unsigned char next, prev; 185 unsigned char in_use; 186 unsigned int age; 187 } drm_mga_tex_region_t; 188 189 typedef struct _drm_mga_sarea { 190 /* The channel for communication of state information to the kernel 191 * on firing a vertex dma buffer. 192 */ 193 unsigned int ContextState[MGA_CTX_SETUP_SIZE]; 194 unsigned int ServerState[MGA_2D_SETUP_SIZE]; 195 unsigned int TexState[2][MGA_TEX_SETUP_SIZE]; 196 unsigned int WarpPipe; 197 unsigned int dirty; 198 199 unsigned int nbox; 200 drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; 201 202 203 /* Information about the most recently used 3d drawable. The 204 * client fills in the req_* fields, the server fills in the 205 * exported_ fields and puts the cliprects into boxes, above. 206 * 207 * The client clears the exported_drawable field before 208 * clobbering the boxes data. 209 */ 210 unsigned int req_drawable; /* the X drawable id */ 211 unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ 212 213 unsigned int exported_drawable; 214 unsigned int exported_index; 215 unsigned int exported_stamp; 216 unsigned int exported_buffers; 217 unsigned int exported_nfront; 218 unsigned int exported_nback; 219 int exported_back_x, exported_front_x, exported_w; 220 int exported_back_y, exported_front_y, exported_h; 221 drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; 222 223 /* Counters for aging textures and for client-side throttling. 224 */ 225 unsigned int last_enqueue; /* last time a buffer was enqueued */ 226 unsigned int last_dispatch; /* age of the most recently dispatched buffer */ 227 unsigned int last_quiescent; /* */ 228 229 230 /* LRU lists for texture memory in agp space and on the card 231 */ 232 drm_mga_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; 233 unsigned int texAge[MGA_NR_TEX_HEAPS]; 234 235 /* Mechanism to validate card state. 236 */ 237 int ctxOwner; 238 int vertexsize; 239 } drm_mga_sarea_t; 240 241 /* Device specific ioctls: 242 */ 243 typedef struct _drm_mga_clear { 244 unsigned int clear_color; 245 unsigned int clear_depth; 246 unsigned int flags; 247 unsigned int clear_depth_mask; 248 unsigned int clear_color_mask; 249 } drm_mga_clear_t; 250 251 typedef struct _drm_mga_swap { 252 int dummy; 253 } drm_mga_swap_t; 254 255 typedef struct _drm_mga_iload { 256 int idx; 257 int length; 258 unsigned int destOrg; 259 } drm_mga_iload_t; 260 261 typedef struct _drm_mga_vertex { 262 int idx; /* buffer to queue */ 263 int used; /* bytes in use */ 264 int discard; /* client finished with buffer? */ 265 } drm_mga_vertex_t; 266 267 typedef struct _drm_mga_indices { 268 int idx; /* buffer to queue */ 269 unsigned int start; 270 unsigned int end; 271 int discard; /* client finished with buffer? */ 272 } drm_mga_indices_t; 273 274 #endif 275