1 /*
2 frpw.c (c) 1996-8 Grant R. Guenther <grant@torque.net>
3 Under the terms of the GNU General Public License
4
5 frpw.c is a low-level protocol driver for the Freecom "Power"
6 parallel port IDE adapter.
7
8 Some applications of this adapter may require a "printer" reset
9 prior to loading the driver. This can be done by loading and
10 unloading the "lp" driver, or it can be done by this driver
11 if you define FRPW_HARD_RESET. The latter is not recommended
12 as it may upset devices on other ports.
13
14 */
15
16 /* Changes:
17
18 1.01 GRG 1998.05.06 init_proto, release_proto
19 fix chip detect
20 added EPP-16 and EPP-32
21 1.02 GRG 1998.09.23 added hard reset to initialisation process
22 1.03 GRG 1998.12.14 made hard reset conditional
23
24 */
25
26 #define FRPW_VERSION "1.03"
27
28 #include <linux/module.h>
29 #include <linux/delay.h>
30 #include <linux/kernel.h>
31 #include <linux/types.h>
32 #include <linux/wait.h>
33 #include <asm/io.h>
34
35 #include "paride.h"
36
37 #define cec4 w2(0xc);w2(0xe);w2(0xe);w2(0xc);w2(4);w2(4);w2(4);
38 #define j44(l,h) (((l>>4)&0x0f)|(h&0xf0))
39
40 /* cont = 0 - access the IDE register file
41 cont = 1 - access the IDE command set
42 */
43
44 static int cont_map[2] = { 0x08, 0x10 };
45
frpw_read_regr(PIA * pi,int cont,int regr)46 static int frpw_read_regr( PIA *pi, int cont, int regr )
47
48 { int h,l,r;
49
50 r = regr + cont_map[cont];
51
52 w2(4);
53 w0(r); cec4;
54 w2(6); l = r1();
55 w2(4); h = r1();
56 w2(4);
57
58 return j44(l,h);
59
60 }
61
frpw_write_regr(PIA * pi,int cont,int regr,int val)62 static void frpw_write_regr( PIA *pi, int cont, int regr, int val)
63
64 { int r;
65
66 r = regr + cont_map[cont];
67
68 w2(4); w0(r); cec4;
69 w0(val);
70 w2(5);w2(7);w2(5);w2(4);
71 }
72
frpw_read_block_int(PIA * pi,char * buf,int count,int regr)73 static void frpw_read_block_int( PIA *pi, char * buf, int count, int regr )
74
75 { int h, l, k, ph;
76
77 switch(pi->mode) {
78
79 case 0: w2(4); w0(regr); cec4;
80 for (k=0;k<count;k++) {
81 w2(6); l = r1();
82 w2(4); h = r1();
83 buf[k] = j44(l,h);
84 }
85 w2(4);
86 break;
87
88 case 1: ph = 2;
89 w2(4); w0(regr + 0xc0); cec4;
90 w0(0xff);
91 for (k=0;k<count;k++) {
92 w2(0xa4 + ph);
93 buf[k] = r0();
94 ph = 2 - ph;
95 }
96 w2(0xac); w2(0xa4); w2(4);
97 break;
98
99 case 2: w2(4); w0(regr + 0x80); cec4;
100 for (k=0;k<count;k++) buf[k] = r4();
101 w2(0xac); w2(0xa4);
102 w2(4);
103 break;
104
105 case 3: w2(4); w0(regr + 0x80); cec4;
106 for (k=0;k<count-2;k++) buf[k] = r4();
107 w2(0xac); w2(0xa4);
108 buf[count-2] = r4();
109 buf[count-1] = r4();
110 w2(4);
111 break;
112
113 case 4: w2(4); w0(regr + 0x80); cec4;
114 for (k=0;k<(count/2)-1;k++) ((u16 *)buf)[k] = r4w();
115 w2(0xac); w2(0xa4);
116 buf[count-2] = r4();
117 buf[count-1] = r4();
118 w2(4);
119 break;
120
121 case 5: w2(4); w0(regr + 0x80); cec4;
122 for (k=0;k<(count/4)-1;k++) ((u32 *)buf)[k] = r4l();
123 buf[count-4] = r4();
124 buf[count-3] = r4();
125 w2(0xac); w2(0xa4);
126 buf[count-2] = r4();
127 buf[count-1] = r4();
128 w2(4);
129 break;
130
131 }
132 }
133
frpw_read_block(PIA * pi,char * buf,int count)134 static void frpw_read_block( PIA *pi, char * buf, int count)
135
136 { frpw_read_block_int(pi,buf,count,0x08);
137 }
138
frpw_write_block(PIA * pi,char * buf,int count)139 static void frpw_write_block( PIA *pi, char * buf, int count )
140
141 { int k;
142
143 switch(pi->mode) {
144
145 case 0:
146 case 1:
147 case 2: w2(4); w0(8); cec4; w2(5);
148 for (k=0;k<count;k++) {
149 w0(buf[k]);
150 w2(7);w2(5);
151 }
152 w2(4);
153 break;
154
155 case 3: w2(4); w0(0xc8); cec4; w2(5);
156 for (k=0;k<count;k++) w4(buf[k]);
157 w2(4);
158 break;
159
160 case 4: w2(4); w0(0xc8); cec4; w2(5);
161 for (k=0;k<count/2;k++) w4w(((u16 *)buf)[k]);
162 w2(4);
163 break;
164
165 case 5: w2(4); w0(0xc8); cec4; w2(5);
166 for (k=0;k<count/4;k++) w4l(((u32 *)buf)[k]);
167 w2(4);
168 break;
169 }
170 }
171
frpw_connect(PIA * pi)172 static void frpw_connect ( PIA *pi )
173
174 { pi->saved_r0 = r0();
175 pi->saved_r2 = r2();
176 w2(4);
177 }
178
frpw_disconnect(PIA * pi)179 static void frpw_disconnect ( PIA *pi )
180
181 { w2(4); w0(0x20); cec4;
182 w0(pi->saved_r0);
183 w2(pi->saved_r2);
184 }
185
186 /* Stub logic to see if PNP string is available - used to distinguish
187 between the Xilinx and ASIC implementations of the Freecom adapter.
188 */
189
frpw_test_pnp(PIA * pi)190 static int frpw_test_pnp ( PIA *pi )
191
192 /* returns chip_type: 0 = Xilinx, 1 = ASIC */
193
194 { int olddelay, a, b;
195
196 #ifdef FRPW_HARD_RESET
197 w0(0); w2(8); udelay(50); w2(0xc); /* parallel bus reset */
198 mdelay(1500);
199 #endif
200
201 olddelay = pi->delay;
202 pi->delay = 10;
203
204 pi->saved_r0 = r0();
205 pi->saved_r2 = r2();
206
207 w2(4); w0(4); w2(6); w2(7);
208 a = r1() & 0xff; w2(4); b = r1() & 0xff;
209 w2(0xc); w2(0xe); w2(4);
210
211 pi->delay = olddelay;
212 w0(pi->saved_r0);
213 w2(pi->saved_r2);
214
215 return ((~a&0x40) && (b&0x40));
216 }
217
218 /* We use the pi->private to remember the result of the PNP test.
219 To make this work, private = port*2 + chip. Yes, I know it's
220 a hack :-(
221 */
222
frpw_test_proto(PIA * pi,char * scratch,int verbose)223 static int frpw_test_proto( PIA *pi, char * scratch, int verbose )
224
225 { int j, k, r;
226 int e[2] = {0,0};
227
228 if ((pi->private>>1) != pi->port)
229 pi->private = frpw_test_pnp(pi) + 2*pi->port;
230
231 if (((pi->private%2) == 0) && (pi->mode > 2)) {
232 if (verbose)
233 printk("%s: frpw: Xilinx does not support mode %d\n",
234 pi->device, pi->mode);
235 return 1;
236 }
237
238 if (((pi->private%2) == 1) && (pi->mode == 2)) {
239 if (verbose)
240 printk("%s: frpw: ASIC does not support mode 2\n",
241 pi->device);
242 return 1;
243 }
244
245 frpw_connect(pi);
246 for (j=0;j<2;j++) {
247 frpw_write_regr(pi,0,6,0xa0+j*0x10);
248 for (k=0;k<256;k++) {
249 frpw_write_regr(pi,0,2,k^0xaa);
250 frpw_write_regr(pi,0,3,k^0x55);
251 if (frpw_read_regr(pi,0,2) != (k^0xaa)) e[j]++;
252 }
253 }
254 frpw_disconnect(pi);
255
256 frpw_connect(pi);
257 frpw_read_block_int(pi,scratch,512,0x10);
258 r = 0;
259 for (k=0;k<128;k++) if (scratch[k] != k) r++;
260 frpw_disconnect(pi);
261
262 if (verbose) {
263 printk("%s: frpw: port 0x%x, chip %d, mode %d, test=(%d,%d,%d)\n",
264 pi->device,pi->port,(pi->private%2),pi->mode,e[0],e[1],r);
265 }
266
267 return (r || (e[0] && e[1]));
268 }
269
270
frpw_log_adapter(PIA * pi,char * scratch,int verbose)271 static void frpw_log_adapter( PIA *pi, char * scratch, int verbose )
272
273 { char *mode_string[6] = {"4-bit","8-bit","EPP",
274 "EPP-8","EPP-16","EPP-32"};
275
276 printk("%s: frpw %s, Freecom (%s) adapter at 0x%x, ", pi->device,
277 FRPW_VERSION,((pi->private%2) == 0)?"Xilinx":"ASIC",pi->port);
278 printk("mode %d (%s), delay %d\n",pi->mode,
279 mode_string[pi->mode],pi->delay);
280
281 }
282
frpw_init_proto(PIA * pi)283 static void frpw_init_proto( PIA *pi)
284
285 { MOD_INC_USE_COUNT;
286 pi->private = 0;
287 }
288
frpw_release_proto(PIA * pi)289 static void frpw_release_proto( PIA *pi)
290
291 { MOD_DEC_USE_COUNT;
292 }
293
294 struct pi_protocol frpw = {"frpw",0,6,2,2,1,
295 frpw_write_regr,
296 frpw_read_regr,
297 frpw_write_block,
298 frpw_read_block,
299 frpw_connect,
300 frpw_disconnect,
301 0,
302 0,
303 frpw_test_proto,
304 frpw_log_adapter,
305 frpw_init_proto,
306 frpw_release_proto
307 };
308
309
310 #ifdef MODULE
311
init_module(void)312 int init_module(void)
313
314 { return pi_register( &frpw ) - 1;
315 }
316
cleanup_module(void)317 void cleanup_module(void)
318
319 { pi_unregister( &frpw );
320 }
321
322 #endif
323
324 /* end of frpw.c */
325 MODULE_LICENSE("GPL");
326