1 /* 2 * linux/drivers/acorn/scsi/fas216.h 3 * 4 * Copyright (C) 1997-2000 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * FAS216 generic driver 11 */ 12 #ifndef FAS216_H 13 #define FAS216_H 14 15 #ifndef NO_IRQ 16 #define NO_IRQ 255 17 #endif 18 19 #include "queue.h" 20 #include "msgqueue.h" 21 22 /* FAS register definitions */ 23 24 /* transfer count low */ 25 #define REG_CTCL (0) 26 #define REG_STCL (0) 27 28 /* transfer count medium */ 29 #define REG_CTCM (1) 30 #define REG_STCM (1) 31 32 /* fifo data */ 33 #define REG_FF (2) 34 35 /* command */ 36 #define REG_CMD (3) 37 #define CMD_NOP 0x00 38 #define CMD_FLUSHFIFO 0x01 39 #define CMD_RESETCHIP 0x02 40 #define CMD_RESETSCSI 0x03 41 42 #define CMD_TRANSFERINFO 0x10 43 #define CMD_INITCMDCOMPLETE 0x11 44 #define CMD_MSGACCEPTED 0x12 45 #define CMD_PADBYTES 0x18 46 #define CMD_SETATN 0x1a 47 #define CMD_RSETATN 0x1b 48 49 #define CMD_SELECTWOATN 0x41 50 #define CMD_SELECTATN 0x42 51 #define CMD_SELECTATNSTOP 0x43 52 #define CMD_ENABLESEL 0x44 53 #define CMD_DISABLESEL 0x45 54 #define CMD_SELECTATN3 0x46 55 #define CMD_RESEL3 0x47 56 57 #define CMD_WITHDMA 0x80 58 59 /* status register (read) */ 60 #define REG_STAT (4) 61 #define STAT_IO (1 << 0) /* IO phase */ 62 #define STAT_CD (1 << 1) /* CD phase */ 63 #define STAT_MSG (1 << 2) /* MSG phase */ 64 #define STAT_TRANSFERDONE (1 << 3) /* Transfer completed */ 65 #define STAT_TRANSFERCNTZ (1 << 4) /* Transfer counter is zero */ 66 #define STAT_PARITYERROR (1 << 5) /* Parity error */ 67 #define STAT_REALBAD (1 << 6) /* Something bad */ 68 #define STAT_INT (1 << 7) /* Interrupt */ 69 70 #define STAT_BUSMASK (STAT_MSG|STAT_CD|STAT_IO) 71 #define STAT_DATAOUT (0) /* Data out */ 72 #define STAT_DATAIN (STAT_IO) /* Data in */ 73 #define STAT_COMMAND (STAT_CD) /* Command out */ 74 #define STAT_STATUS (STAT_CD|STAT_IO) /* Status In */ 75 #define STAT_MESGOUT (STAT_MSG|STAT_CD) /* Message out */ 76 #define STAT_MESGIN (STAT_MSG|STAT_CD|STAT_IO) /* Message In */ 77 78 /* bus ID for select / reselect */ 79 #define REG_SDID (4) 80 #define BUSID(target) ((target) & 7) 81 82 /* Interrupt status register (read) */ 83 #define REG_INST (5) 84 #define INST_SELWOATN (1 << 0) /* Select w/o ATN */ 85 #define INST_SELATN (1 << 1) /* Select w/ATN */ 86 #define INST_RESELECTED (1 << 2) /* Reselected */ 87 #define INST_FUNCDONE (1 << 3) /* Function done */ 88 #define INST_BUSSERVICE (1 << 4) /* Bus service */ 89 #define INST_DISCONNECT (1 << 5) /* Disconnect */ 90 #define INST_ILLEGALCMD (1 << 6) /* Illegal command */ 91 #define INST_BUSRESET (1 << 7) /* SCSI Bus reset */ 92 93 /* Timeout register (write) */ 94 #define REG_STIM (5) 95 96 /* Sequence step register (read) */ 97 #define REG_IS (6) 98 #define IS_BITS 0x07 99 #define IS_SELARB 0x00 /* Select & Arb ok */ 100 #define IS_MSGBYTESENT 0x01 /* One byte message sent*/ 101 #define IS_NOTCOMMAND 0x02 /* Not in command state */ 102 #define IS_EARLYPHASE 0x03 /* Early phase change */ 103 #define IS_COMPLETE 0x04 /* Command ok */ 104 #define IS_SOF 0x08 /* Sync off flag */ 105 106 /* Transfer period step (write) */ 107 #define REG_STP (6) 108 109 /* Synchronous Offset (write) */ 110 #define REG_SOF (7) 111 112 /* Fifo state register (read) */ 113 #define REG_CFIS (7) 114 #define CFIS_CF 0x1f /* Num bytes in FIFO */ 115 #define CFIS_IS 0xe0 /* Step */ 116 117 /* config register 1 */ 118 #define REG_CNTL1 (8) 119 #define CNTL1_CID (7 << 0) /* Chip ID */ 120 #define CNTL1_STE (1 << 3) /* Self test enable */ 121 #define CNTL1_PERE (1 << 4) /* Parity enable reporting en. */ 122 #define CNTL1_PTE (1 << 5) /* Parity test enable */ 123 #define CNTL1_DISR (1 << 6) /* Disable Irq on SCSI reset */ 124 #define CNTL1_ETM (1 << 7) /* Extended Timing Mode */ 125 126 /* Clock conversion factor (read) */ 127 #define REG_CLKF (9) 128 #define CLKF_F37MHZ 0x00 /* 35.01 - 40 MHz */ 129 #define CLKF_F10MHZ 0x02 /* 10 MHz */ 130 #define CLKF_F12MHZ 0x03 /* 10.01 - 15 MHz */ 131 #define CLKF_F17MHZ 0x04 /* 15.01 - 20 MHz */ 132 #define CLKF_F22MHZ 0x05 /* 20.01 - 25 MHz */ 133 #define CLKF_F27MHZ 0x06 /* 25.01 - 30 MHz */ 134 #define CLKF_F32MHZ 0x07 /* 30.01 - 35 MHz */ 135 136 /* Chip test register (write) */ 137 #define REG_FTM (10) 138 #define TEST_FTM 0x01 /* Force target mode */ 139 #define TEST_FIM 0x02 /* Force initiator mode */ 140 #define TEST_FHI 0x04 /* Force high impedance mode */ 141 142 /* Configuration register 2 (read/write) */ 143 #define REG_CNTL2 (11) 144 #define CNTL2_PGDP (1 << 0) /* Pass Th/Generate Data Parity */ 145 #define CNTL2_PGRP (1 << 1) /* Pass Th/Generate Reg Parity */ 146 #define CNTL2_ACDPE (1 << 2) /* Abort on Cmd/Data Parity Err */ 147 #define CNTL2_S2FE (1 << 3) /* SCSI2 Features Enable */ 148 #define CNTL2_TSDR (1 << 4) /* Tristate DREQ */ 149 #define CNTL2_SBO (1 << 5) /* Select Byte Order */ 150 #define CNTL2_ENF (1 << 6) /* Enable features */ 151 #define CNTL2_DAE (1 << 7) /* Data Alignment Enable */ 152 153 /* Configuration register 3 (read/write) */ 154 #define REG_CNTL3 (12) 155 #define CNTL3_BS8 (1 << 0) /* Burst size 8 */ 156 #define CNTL3_MDM (1 << 1) /* Modify DMA mode */ 157 #define CNTL3_LBTM (1 << 2) /* Last Byte Transfer mode */ 158 #define CNTL3_FASTCLK (1 << 3) /* Fast SCSI clocking */ 159 #define CNTL3_FASTSCSI (1 << 4) /* Fast SCSI */ 160 #define CNTL3_G2CB (1 << 5) /* Group2 SCSI support */ 161 #define CNTL3_QTAG (1 << 6) /* Enable 3 byte msgs */ 162 #define CNTL3_ADIDCHK (1 << 7) /* Additional ID check */ 163 164 /* High transfer count (read/write) */ 165 #define REG_CTCH (14) 166 #define REG_STCH (14) 167 168 /* ID register (read only) */ 169 #define REG_ID (14) 170 171 /* Data alignment */ 172 #define REG_DAL (15) 173 174 typedef enum { 175 PHASE_IDLE, /* we're not planning on doing anything */ 176 PHASE_SELECTION, /* selecting a device */ 177 PHASE_SELSTEPS, /* selection with command steps */ 178 PHASE_COMMAND, /* command sent */ 179 PHASE_MESSAGESENT, /* selected, and we're sending cmd */ 180 PHASE_DATAOUT, /* data out to device */ 181 PHASE_DATAIN, /* data in from device */ 182 PHASE_MSGIN, /* message in from device */ 183 PHASE_MSGIN_DISCONNECT, /* disconnecting from bus */ 184 PHASE_MSGOUT, /* after message out phase */ 185 PHASE_MSGOUT_EXPECT, /* expecting message out */ 186 PHASE_STATUS, /* status from device */ 187 PHASE_DONE /* Command complete */ 188 } phase_t; 189 190 typedef enum { 191 DMA_OUT, /* DMA from memory to chip */ 192 DMA_IN /* DMA from chip to memory */ 193 } fasdmadir_t; 194 195 typedef enum { 196 fasdma_none, /* No dma */ 197 fasdma_pio, /* PIO mode */ 198 fasdma_pseudo, /* Pseudo DMA */ 199 fasdma_real_block, /* Real DMA, on block by block basis */ 200 fasdma_real_all /* Real DMA, on request by request */ 201 } fasdmatype_t; 202 203 typedef enum { 204 neg_wait, /* Negociate with device */ 205 neg_inprogress, /* Negociation sent */ 206 neg_complete, /* Negociation complete */ 207 neg_targcomplete, /* Target completed negociation */ 208 neg_invalid /* Negociation not supported */ 209 } neg_t; 210 211 #define MAGIC 0x441296bdUL 212 #define NR_MSGS 8 213 214 #define FASCAP_DMA (1 << 0) 215 #define FASCAP_PSEUDODMA (1 << 1) 216 217 typedef struct { 218 unsigned long magic_start; 219 spinlock_t host_lock; 220 struct Scsi_Host *host; /* host */ 221 Scsi_Cmnd *SCpnt; /* currently processing command */ 222 Scsi_Cmnd *origSCpnt; /* original connecting command */ 223 Scsi_Cmnd *reqSCpnt; /* request sense command */ 224 Scsi_Cmnd *rstSCpnt; /* reset command */ 225 Scsi_Cmnd *pending_SCpnt[8]; /* per-device pending commands */ 226 int next_pending; /* next pending device */ 227 228 /* 229 * Error recovery 230 */ 231 wait_queue_head_t eh_wait; 232 struct timer_list eh_timer; 233 unsigned int rst_dev_status; 234 unsigned int rst_bus_status; 235 236 /* driver information */ 237 struct { 238 phase_t phase; /* current phase */ 239 unsigned int io_port; /* base address of FAS216 */ 240 unsigned int io_shift; /* shift to adjust reg offsets by */ 241 unsigned char cfg[4]; /* configuration registers */ 242 const char *type; /* chip type */ 243 unsigned int irq; /* interrupt */ 244 245 Scsi_Pointer SCp; /* current commands data pointer */ 246 247 MsgQueue_t msgs; /* message queue for connected device */ 248 249 unsigned int async_stp; /* Async transfer STP value */ 250 unsigned char msgin_fifo; /* bytes in fifo at time of message in */ 251 unsigned char message[256]; /* last message received from device */ 252 253 unsigned char disconnectable:1; /* this command can be disconnected */ 254 unsigned char aborting:1; /* aborting command */ 255 } scsi; 256 257 /* statistics information */ 258 struct { 259 unsigned int queues; 260 unsigned int removes; 261 unsigned int fins; 262 unsigned int reads; 263 unsigned int writes; 264 unsigned int miscs; 265 unsigned int disconnects; 266 unsigned int aborts; 267 unsigned int bus_resets; 268 unsigned int host_resets; 269 } stats; 270 271 /* configuration information */ 272 struct { 273 unsigned char clockrate; /* clock rate of FAS device (MHz) */ 274 unsigned char select_timeout; /* timeout (R5) */ 275 unsigned char sync_max_depth; /* Synchronous xfer max fifo depth */ 276 unsigned char wide_max_size; /* Maximum wide transfer size */ 277 unsigned char cntl3; /* Control Reg 3 */ 278 unsigned int asyncperiod; /* Async transfer period (ns) */ 279 unsigned int capabilities; /* driver capabilities */ 280 unsigned int disconnect_ok:1; /* Disconnects allowed? */ 281 } ifcfg; 282 283 /* queue handling */ 284 struct { 285 Queue_t issue; /* issue queue */ 286 Queue_t disconnected; /* disconnected command queue */ 287 } queues; 288 289 /* per-device info */ 290 struct fas216_device { 291 unsigned char disconnect_ok:1; /* device can disconnect */ 292 unsigned char parity_enabled:1; /* parity checking enabled */ 293 unsigned char parity_check:1; /* need to check parity checking */ 294 unsigned char period; /* sync xfer period in (*4ns) */ 295 unsigned char stp; /* synchronous transfer period */ 296 unsigned char sof; /* synchronous offset register */ 297 unsigned char wide_xfer; /* currently negociated wide transfer */ 298 neg_t sync_state; /* synchronous transfer mode */ 299 neg_t wide_state; /* wide transfer mode */ 300 } device[8]; 301 unsigned char busyluns[8]; /* array of bits indicating LUNs busy */ 302 303 /* dma */ 304 struct { 305 fasdmatype_t transfer_type; /* current type of DMA transfer */ 306 fasdmatype_t (*setup) (struct Scsi_Host *host, Scsi_Pointer *SCp, fasdmadir_t direction, fasdmatype_t min_dma); 307 void (*pseudo)(struct Scsi_Host *host, Scsi_Pointer *SCp, fasdmadir_t direction, int transfer); 308 void (*stop) (struct Scsi_Host *host, Scsi_Pointer *SCp); 309 } dma; 310 311 /* miscellaneous */ 312 int internal_done; /* flag to indicate request done */ 313 unsigned long magic_end; 314 } FAS216_Info; 315 316 /* Function: int fas216_init (struct Scsi_Host *instance) 317 * Purpose : initialise FAS/NCR/AMD SCSI structures. 318 * Params : instance - a driver-specific filled-out structure 319 * Returns : 0 on success 320 */ 321 extern int fas216_init (struct Scsi_Host *instance); 322 323 /* Function: int fas216_add (struct Scsi_Host *instance) 324 * Purpose : initialise FAS/NCR/AMD SCSI ic. 325 * Params : instance - a driver-specific filled-out structure 326 * Returns : 0 on success 327 */ 328 extern int fas216_add (struct Scsi_Host *instance); 329 330 /* Function: int fas216_queue_command (Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *)) 331 * Purpose : queue a command for adapter to process. 332 * Params : SCpnt - Command to queue 333 * done - done function to call once command is complete 334 * Returns : 0 - success, else error 335 */ 336 extern int fas216_queue_command (Scsi_Cmnd *, void (*done)(Scsi_Cmnd *)); 337 338 /* Function: int fas216_command (Scsi_Cmnd *SCpnt) 339 * Purpose : queue a command for adapter to process. 340 * Params : SCpnt - Command to queue 341 * Returns : scsi result code 342 */ 343 extern int fas216_command (Scsi_Cmnd *); 344 345 /* Function: void fas216_intr (FAS216_Info *info) 346 * Purpose : handle interrupts from the interface to progress a command 347 * Params : info - interface to service 348 */ 349 extern void fas216_intr (FAS216_Info *info); 350 351 extern void fas216_remove (struct Scsi_Host *instance); 352 353 /* Function: int fas216_release (struct Scsi_Host *instance) 354 * Purpose : release all resources and put everything to bed for FAS/NCR/AMD SCSI ic. 355 * Params : instance - a driver-specific filled-out structure 356 * Returns : 0 on success 357 */ 358 extern void fas216_release (struct Scsi_Host *instance); 359 360 extern int fas216_print_host(FAS216_Info *info, char *buffer); 361 extern int fas216_print_stats(FAS216_Info *info, char *buffer); 362 extern int fas216_print_device(FAS216_Info *info, Scsi_Device *scd, char *buffer); 363 364 /* Function: int fas216_eh_abort(Scsi_Cmnd *SCpnt) 365 * Purpose : abort this command 366 * Params : SCpnt - command to abort 367 * Returns : FAILED if unable to abort 368 */ 369 extern int fas216_eh_abort(Scsi_Cmnd *SCpnt); 370 371 /* Function: int fas216_eh_device_reset(Scsi_Cmnd *SCpnt) 372 * Purpose : Reset the device associated with this command 373 * Params : SCpnt - command specifing device to reset 374 * Returns : FAILED if unable to reset 375 */ 376 extern int fas216_eh_device_reset(Scsi_Cmnd *SCpnt); 377 378 /* Function: int fas216_eh_bus_reset(Scsi_Cmnd *SCpnt) 379 * Purpose : Reset the complete bus associated with this command 380 * Params : SCpnt - command specifing bus to reset 381 * Returns : FAILED if unable to reset 382 */ 383 extern int fas216_eh_bus_reset(Scsi_Cmnd *SCpnt); 384 385 /* Function: int fas216_eh_host_reset(Scsi_Cmnd *SCpnt) 386 * Purpose : Reset the host associated with this command 387 * Params : SCpnt - command specifing host to reset 388 * Returns : FAILED if unable to reset 389 */ 390 extern int fas216_eh_host_reset(Scsi_Cmnd *SCpnt); 391 392 #endif /* FAS216_H */ 393