1 /* $Id: time.c,v 1.41.2.2 2002/03/03 04:08:10 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
3 *
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
6 *
7 * Based largely on code which is:
8 *
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
10 */
11
12 #include <linux/config.h>
13 #include <linux/errno.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/timex.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/mc146818rtc.h>
24 #include <linux/delay.h>
25 #include <linux/timer.h>
26
27 #include <asm/oplib.h>
28 #include <asm/mostek.h>
29 #include <asm/timer.h>
30 #include <asm/irq.h>
31 #include <asm/io.h>
32 #include <asm/sbus.h>
33 #include <asm/fhc.h>
34 #include <asm/pbm.h>
35 #include <asm/ebus.h>
36 #include <asm/isa.h>
37 #include <asm/starfire.h>
38 #include <asm/smp.h>
39
40 extern rwlock_t xtime_lock;
41 extern unsigned long wall_jiffies;
42
43 spinlock_t mostek_lock = SPIN_LOCK_UNLOCKED;
44 spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
45 unsigned long mstk48t02_regs = 0UL;
46 #ifdef CONFIG_PCI
47 unsigned long ds1287_regs = 0UL;
48 #endif
49
50 static unsigned long mstk48t08_regs = 0UL;
51 static unsigned long mstk48t59_regs = 0UL;
52
53 static int set_rtc_mmss(unsigned long);
54
55 struct sparc64_tick_ops *tick_ops;
56
57 #define TICK_PRIV_BIT (1UL << 63)
58
tick_disable_protection(void)59 static void tick_disable_protection(void)
60 {
61 /* Set things up so user can access tick register for profiling
62 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
63 * read back of %tick after writing it.
64 */
65 __asm__ __volatile__(
66 " ba,pt %%xcc, 1f\n"
67 " nop\n"
68 " .align 64\n"
69 "1: rd %%tick, %%g2\n"
70 " add %%g2, 6, %%g2\n"
71 " andn %%g2, %0, %%g2\n"
72 " wrpr %%g2, 0, %%tick\n"
73 " rdpr %%tick, %%g0"
74 : /* no outputs */
75 : "r" (TICK_PRIV_BIT)
76 : "g2");
77 }
78
tick_init_tick(unsigned long offset)79 static void tick_init_tick(unsigned long offset)
80 {
81 tick_disable_protection();
82
83 __asm__ __volatile__(
84 " rd %%tick, %%g1\n"
85 " andn %%g1, %1, %%g1\n"
86 " ba,pt %%xcc, 1f\n"
87 " add %%g1, %0, %%g1\n"
88 " .align 64\n"
89 "1: wr %%g1, 0x0, %%tick_cmpr\n"
90 " rd %%tick_cmpr, %%g0"
91 : /* no outputs */
92 : "r" (offset), "r" (TICK_PRIV_BIT)
93 : "g1");
94 }
95
tick_get_tick(void)96 static unsigned long tick_get_tick(void)
97 {
98 unsigned long ret;
99
100 __asm__ __volatile__("rd %%tick, %0\n\t"
101 "mov %0, %0"
102 : "=r" (ret));
103
104 return ret & ~TICK_PRIV_BIT;
105 }
106
tick_get_compare(void)107 static unsigned long tick_get_compare(void)
108 {
109 unsigned long ret;
110
111 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
112 "mov %0, %0"
113 : "=r" (ret));
114
115 return ret;
116 }
117
tick_add_compare(unsigned long adj)118 static unsigned long tick_add_compare(unsigned long adj)
119 {
120 unsigned long new_compare;
121
122 /* Workaround for Spitfire Errata (#54 I think??), I discovered
123 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
124 * number 103640.
125 *
126 * On Blackbird writes to %tick_cmpr can fail, the
127 * workaround seems to be to execute the wr instruction
128 * at the start of an I-cache line, and perform a dummy
129 * read back from %tick_cmpr right after writing to it. -DaveM
130 */
131 __asm__ __volatile__("rd %%tick_cmpr, %0\n\t"
132 "ba,pt %%xcc, 1f\n\t"
133 " add %0, %1, %0\n\t"
134 ".align 64\n"
135 "1:\n\t"
136 "wr %0, 0, %%tick_cmpr\n\t"
137 "rd %%tick_cmpr, %%g0"
138 : "=&r" (new_compare)
139 : "r" (adj));
140
141 return new_compare;
142 }
143
tick_add_tick(unsigned long adj,unsigned long offset)144 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
145 {
146 unsigned long new_tick, tmp;
147
148 /* Also need to handle Blackbird bug here too. */
149 __asm__ __volatile__("rd %%tick, %0\n\t"
150 "add %0, %2, %0\n\t"
151 "wrpr %0, 0, %%tick\n\t"
152 "andn %0, %4, %1\n\t"
153 "ba,pt %%xcc, 1f\n\t"
154 " add %1, %3, %1\n\t"
155 ".align 64\n"
156 "1:\n\t"
157 "wr %1, 0, %%tick_cmpr\n\t"
158 "rd %%tick_cmpr, %%g0"
159 : "=&r" (new_tick), "=&r" (tmp)
160 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
161
162 return new_tick;
163 }
164
165 static struct sparc64_tick_ops tick_operations = {
166 .init_tick = tick_init_tick,
167 .get_tick = tick_get_tick,
168 .get_compare = tick_get_compare,
169 .add_tick = tick_add_tick,
170 .add_compare = tick_add_compare,
171 .softint_mask = 1UL << 0,
172 };
173
stick_init_tick(unsigned long offset)174 static void stick_init_tick(unsigned long offset)
175 {
176 tick_disable_protection();
177
178 /* Let the user get at STICK too. */
179 __asm__ __volatile__(
180 " rd %%asr24, %%g2\n"
181 " andn %%g2, %0, %%g2\n"
182 " wr %%g2, 0, %%asr24"
183 : /* no outputs */
184 : "r" (TICK_PRIV_BIT)
185 : "g1", "g2");
186
187 __asm__ __volatile__(
188 " rd %%asr24, %%g1\n"
189 " andn %%g1, %1, %%g1\n"
190 " add %%g1, %0, %%g1\n"
191 " wr %%g1, 0x0, %%asr25"
192 : /* no outputs */
193 : "r" (offset), "r" (TICK_PRIV_BIT)
194 : "g1");
195 }
196
stick_get_tick(void)197 static unsigned long stick_get_tick(void)
198 {
199 unsigned long ret;
200
201 __asm__ __volatile__("rd %%asr24, %0"
202 : "=r" (ret));
203
204 return ret & ~TICK_PRIV_BIT;
205 }
206
stick_get_compare(void)207 static unsigned long stick_get_compare(void)
208 {
209 unsigned long ret;
210
211 __asm__ __volatile__("rd %%asr25, %0"
212 : "=r" (ret));
213
214 return ret;
215 }
216
stick_add_tick(unsigned long adj,unsigned long offset)217 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
218 {
219 unsigned long new_tick, tmp;
220
221 __asm__ __volatile__("rd %%asr24, %0\n\t"
222 "add %0, %2, %0\n\t"
223 "wr %0, 0, %%asr24\n\t"
224 "andn %0, %4, %1\n\t"
225 "add %1, %3, %1\n\t"
226 "wr %1, 0, %%asr25"
227 : "=&r" (new_tick), "=&r" (tmp)
228 : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
229
230 return new_tick;
231 }
232
stick_add_compare(unsigned long adj)233 static unsigned long stick_add_compare(unsigned long adj)
234 {
235 unsigned long new_compare;
236
237 __asm__ __volatile__("rd %%asr25, %0\n\t"
238 "add %0, %1, %0\n\t"
239 "wr %0, 0, %%asr25"
240 : "=&r" (new_compare)
241 : "r" (adj));
242
243 return new_compare;
244 }
245
246 static struct sparc64_tick_ops stick_operations = {
247 .init_tick = stick_init_tick,
248 .get_tick = stick_get_tick,
249 .get_compare = stick_get_compare,
250 .add_tick = stick_add_tick,
251 .add_compare = stick_add_compare,
252 .softint_mask = 1UL << 16,
253 };
254
255 /* On Hummingbird the STICK/STICK_CMPR register is implemented
256 * in I/O space. There are two 64-bit registers each, the
257 * first holds the low 32-bits of the value and the second holds
258 * the high 32-bits.
259 *
260 * Since STICK is constantly updating, we have to access it carefully.
261 *
262 * The sequence we use to read is:
263 * 1) read low
264 * 2) read high
265 * 3) read low again, if it rolled over increment high by 1
266 *
267 * Writing STICK safely is also tricky:
268 * 1) write low to zero
269 * 2) write high
270 * 3) write low
271 */
272 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
273 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
274
__hbird_read_stick(void)275 static unsigned long __hbird_read_stick(void)
276 {
277 unsigned long ret, tmp1, tmp2, tmp3;
278 unsigned long addr = HBIRD_STICK_ADDR;
279
280 __asm__ __volatile__("ldxa [%1] %5, %2\n\t"
281 "add %1, 0x8, %1\n\t"
282 "ldxa [%1] %5, %3\n\t"
283 "sub %1, 0x8, %1\n\t"
284 "ldxa [%1] %5, %4\n\t"
285 "cmp %4, %2\n\t"
286 "blu,a,pn %%xcc, 1f\n\t"
287 " add %3, 1, %3\n"
288 "1:\n\t"
289 "sllx %3, 32, %3\n\t"
290 "or %3, %4, %0\n\t"
291 : "=&r" (ret), "=&r" (addr),
292 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
293 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
294
295 return ret;
296 }
297
__hbird_read_compare(void)298 static unsigned long __hbird_read_compare(void)
299 {
300 unsigned long low, high;
301 unsigned long addr = HBIRD_STICKCMP_ADDR;
302
303 __asm__ __volatile__("ldxa [%2] %3, %0\n\t"
304 "add %2, 0x8, %2\n\t"
305 "ldxa [%2] %3, %1"
306 : "=&r" (low), "=&r" (high), "=&r" (addr)
307 : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
308
309 return (high << 32UL) | low;
310 }
311
__hbird_write_stick(unsigned long val)312 static void __hbird_write_stick(unsigned long val)
313 {
314 unsigned long low = (val & 0xffffffffUL);
315 unsigned long high = (val >> 32UL);
316 unsigned long addr = HBIRD_STICK_ADDR;
317
318 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
319 "add %0, 0x8, %0\n\t"
320 "stxa %3, [%0] %4\n\t"
321 "sub %0, 0x8, %0\n\t"
322 "stxa %2, [%0] %4"
323 : "=&r" (addr)
324 : "0" (addr), "r" (low), "r" (high),
325 "i" (ASI_PHYS_BYPASS_EC_E));
326 }
327
__hbird_write_compare(unsigned long val)328 static void __hbird_write_compare(unsigned long val)
329 {
330 unsigned long low = (val & 0xffffffffUL);
331 unsigned long high = (val >> 32UL);
332 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
333
334 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
335 "sub %0, 0x8, %0\n\t"
336 "stxa %2, [%0] %4"
337 : "=&r" (addr)
338 : "0" (addr), "r" (low), "r" (high),
339 "i" (ASI_PHYS_BYPASS_EC_E));
340 }
341
hbtick_init_tick(unsigned long offset)342 static void hbtick_init_tick(unsigned long offset)
343 {
344 unsigned long val;
345
346 tick_disable_protection();
347
348 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
349 * XXX into actually sending STICK interrupts. I think because
350 * XXX of how we store %tick_cmpr in head.S this somehow resets the
351 * XXX {TICK + STICK} interrupt mux. -DaveM
352 */
353 __hbird_write_stick(__hbird_read_stick());
354
355 val = __hbird_read_stick() & ~TICK_PRIV_BIT;
356 __hbird_write_compare(val + offset);
357 }
358
hbtick_get_tick(void)359 static unsigned long hbtick_get_tick(void)
360 {
361 return __hbird_read_stick() & ~TICK_PRIV_BIT;
362 }
363
hbtick_get_compare(void)364 static unsigned long hbtick_get_compare(void)
365 {
366 return __hbird_read_compare();
367 }
368
hbtick_add_tick(unsigned long adj,unsigned long offset)369 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
370 {
371 unsigned long val;
372
373 val = __hbird_read_stick() + adj;
374 __hbird_write_stick(val);
375
376 val &= ~TICK_PRIV_BIT;
377 __hbird_write_compare(val + offset);
378
379 return val;
380 }
381
hbtick_add_compare(unsigned long adj)382 static unsigned long hbtick_add_compare(unsigned long adj)
383 {
384 unsigned long val = __hbird_read_compare() + adj;
385
386 val &= ~TICK_PRIV_BIT;
387 __hbird_write_compare(val);
388
389 return val;
390 }
391
392 static struct sparc64_tick_ops hbtick_operations = {
393 .init_tick = hbtick_init_tick,
394 .get_tick = hbtick_get_tick,
395 .get_compare = hbtick_get_compare,
396 .add_tick = hbtick_add_tick,
397 .add_compare = hbtick_add_compare,
398 .softint_mask = 1UL << 0,
399 };
400
401 /* timer_interrupt() needs to keep up the real-time clock,
402 * as well as call the "do_timer()" routine every clocktick
403 *
404 * NOTE: On SUN5 systems the ticker interrupt comes in using 2
405 * interrupts, one at level14 and one with softint bit 0.
406 */
407 unsigned long timer_tick_offset;
408 unsigned long timer_tick_compare;
409 unsigned long timer_ticks_per_usec_quotient;
410
timer_check_rtc(void)411 static __inline__ void timer_check_rtc(void)
412 {
413 /* last time the cmos clock got updated */
414 static long last_rtc_update;
415
416 /* Determine when to update the Mostek clock. */
417 if ((time_status & STA_UNSYNC) == 0 &&
418 xtime.tv_sec > last_rtc_update + 660 &&
419 xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 &&
420 xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) {
421 if (set_rtc_mmss(xtime.tv_sec) == 0)
422 last_rtc_update = xtime.tv_sec;
423 else
424 last_rtc_update = xtime.tv_sec - 600;
425 /* do it again in 60 s */
426 }
427 }
428
sparc64_do_profile(unsigned long pc,unsigned long o7)429 void sparc64_do_profile(unsigned long pc, unsigned long o7)
430 {
431 if (prof_buffer && current->pid) {
432 extern int _stext;
433 extern int rwlock_impl_begin, rwlock_impl_end;
434 extern int atomic_impl_begin, atomic_impl_end;
435 extern int __bitops_begin, __bitops_end;
436
437 if ((pc >= (unsigned long) &atomic_impl_begin &&
438 pc < (unsigned long) &atomic_impl_end) ||
439 (pc >= (unsigned long) &rwlock_impl_begin &&
440 pc < (unsigned long) &rwlock_impl_end) ||
441 (pc >= (unsigned long) &__bitops_begin &&
442 pc < (unsigned long) &__bitops_end))
443 pc = o7;
444
445 pc -= (unsigned long) &_stext;
446 pc >>= prof_shift;
447
448 if(pc >= prof_len)
449 pc = prof_len - 1;
450 atomic_inc((atomic_t *)&prof_buffer[pc]);
451 }
452 }
453
timer_interrupt(int irq,void * dev_id,struct pt_regs * regs)454 static void timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
455 {
456 unsigned long ticks, pstate;
457
458 write_lock(&xtime_lock);
459
460 do {
461 #ifndef CONFIG_SMP
462 if ((regs->tstate & TSTATE_PRIV) != 0)
463 sparc64_do_profile(regs->tpc, regs->u_regs[UREG_RETPC]);
464 #endif
465 do_timer(regs);
466
467 /* Guarentee that the following sequences execute
468 * uninterrupted.
469 */
470 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
471 "wrpr %0, %1, %%pstate"
472 : "=r" (pstate)
473 : "i" (PSTATE_IE));
474
475 timer_tick_compare = tick_ops->add_compare(timer_tick_offset);
476 ticks = tick_ops->get_tick();
477
478 /* Restore PSTATE_IE. */
479 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
480 : /* no outputs */
481 : "r" (pstate));
482 } while (time_after_eq(ticks, timer_tick_compare));
483
484 timer_check_rtc();
485
486 write_unlock(&xtime_lock);
487 }
488
489 #ifdef CONFIG_SMP
timer_tick_interrupt(struct pt_regs * regs)490 void timer_tick_interrupt(struct pt_regs *regs)
491 {
492 write_lock(&xtime_lock);
493
494 do_timer(regs);
495
496 /*
497 * Only keep timer_tick_offset uptodate, but don't set TICK_CMPR.
498 */
499 timer_tick_compare = tick_ops->get_compare() + timer_tick_offset;
500
501 timer_check_rtc();
502
503 write_unlock(&xtime_lock);
504 }
505 #endif
506
507 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
kick_start_clock(void)508 static void __init kick_start_clock(void)
509 {
510 unsigned long regs = mstk48t02_regs;
511 u8 sec, tmp;
512 int i, count;
513
514 prom_printf("CLOCK: Clock was stopped. Kick start ");
515
516 spin_lock_irq(&mostek_lock);
517
518 /* Turn on the kick start bit to start the oscillator. */
519 tmp = mostek_read(regs + MOSTEK_CREG);
520 tmp |= MSTK_CREG_WRITE;
521 mostek_write(regs + MOSTEK_CREG, tmp);
522 tmp = mostek_read(regs + MOSTEK_SEC);
523 tmp &= ~MSTK_STOP;
524 mostek_write(regs + MOSTEK_SEC, tmp);
525 tmp = mostek_read(regs + MOSTEK_HOUR);
526 tmp |= MSTK_KICK_START;
527 mostek_write(regs + MOSTEK_HOUR, tmp);
528 tmp = mostek_read(regs + MOSTEK_CREG);
529 tmp &= ~MSTK_CREG_WRITE;
530 mostek_write(regs + MOSTEK_CREG, tmp);
531
532 spin_unlock_irq(&mostek_lock);
533
534 /* Delay to allow the clock oscillator to start. */
535 sec = MSTK_REG_SEC(regs);
536 for (i = 0; i < 3; i++) {
537 while (sec == MSTK_REG_SEC(regs))
538 for (count = 0; count < 100000; count++)
539 /* nothing */ ;
540 prom_printf(".");
541 sec = MSTK_REG_SEC(regs);
542 }
543 prom_printf("\n");
544
545 spin_lock_irq(&mostek_lock);
546
547 /* Turn off kick start and set a "valid" time and date. */
548 tmp = mostek_read(regs + MOSTEK_CREG);
549 tmp |= MSTK_CREG_WRITE;
550 mostek_write(regs + MOSTEK_CREG, tmp);
551 tmp = mostek_read(regs + MOSTEK_HOUR);
552 tmp &= ~MSTK_KICK_START;
553 mostek_write(regs + MOSTEK_HOUR, tmp);
554 MSTK_SET_REG_SEC(regs,0);
555 MSTK_SET_REG_MIN(regs,0);
556 MSTK_SET_REG_HOUR(regs,0);
557 MSTK_SET_REG_DOW(regs,5);
558 MSTK_SET_REG_DOM(regs,1);
559 MSTK_SET_REG_MONTH(regs,8);
560 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
561 tmp = mostek_read(regs + MOSTEK_CREG);
562 tmp &= ~MSTK_CREG_WRITE;
563 mostek_write(regs + MOSTEK_CREG, tmp);
564
565 spin_unlock_irq(&mostek_lock);
566
567 /* Ensure the kick start bit is off. If it isn't, turn it off. */
568 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
569 prom_printf("CLOCK: Kick start still on!\n");
570
571 spin_lock_irq(&mostek_lock);
572
573 tmp = mostek_read(regs + MOSTEK_CREG);
574 tmp |= MSTK_CREG_WRITE;
575 mostek_write(regs + MOSTEK_CREG, tmp);
576
577 tmp = mostek_read(regs + MOSTEK_HOUR);
578 tmp &= ~MSTK_KICK_START;
579 mostek_write(regs + MOSTEK_HOUR, tmp);
580
581 tmp = mostek_read(regs + MOSTEK_CREG);
582 tmp &= ~MSTK_CREG_WRITE;
583 mostek_write(regs + MOSTEK_CREG, tmp);
584
585 spin_unlock_irq(&mostek_lock);
586 }
587
588 prom_printf("CLOCK: Kick start procedure successful.\n");
589 }
590
591 /* Return nonzero if the clock chip battery is low. */
has_low_battery(void)592 static int __init has_low_battery(void)
593 {
594 unsigned long regs = mstk48t02_regs;
595 u8 data1, data2;
596
597 spin_lock_irq(&mostek_lock);
598
599 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
600 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
601 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
602 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
603
604 spin_unlock_irq(&mostek_lock);
605
606 return (data1 == data2); /* Was the write blocked? */
607 }
608
609 #ifndef BCD_TO_BIN
610 #define BCD_TO_BIN(val) (((val)&15) + ((val)>>4)*10)
611 #endif
612
613 #ifndef BIN_TO_BCD
614 #define BIN_TO_BCD(val) ((((val)/10)<<4) + (val)%10)
615 #endif
616
617 /* Probe for the real time clock chip. */
set_system_time(void)618 static void __init set_system_time(void)
619 {
620 unsigned int year, mon, day, hour, min, sec;
621 unsigned long mregs = mstk48t02_regs;
622 #ifdef CONFIG_PCI
623 unsigned long dregs = ds1287_regs;
624 #else
625 unsigned long dregs = 0UL;
626 #endif
627 u8 tmp;
628
629 if (!mregs && !dregs) {
630 prom_printf("Something wrong, clock regs not mapped yet.\n");
631 prom_halt();
632 }
633
634 if (mregs) {
635 spin_lock_irq(&mostek_lock);
636
637 /* Traditional Mostek chip. */
638 tmp = mostek_read(mregs + MOSTEK_CREG);
639 tmp |= MSTK_CREG_READ;
640 mostek_write(mregs + MOSTEK_CREG, tmp);
641
642 sec = MSTK_REG_SEC(mregs);
643 min = MSTK_REG_MIN(mregs);
644 hour = MSTK_REG_HOUR(mregs);
645 day = MSTK_REG_DOM(mregs);
646 mon = MSTK_REG_MONTH(mregs);
647 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
648 } else {
649 int i;
650
651 /* Dallas 12887 RTC chip. */
652
653 /* Stolen from arch/i386/kernel/time.c, see there for
654 * credits and descriptive comments.
655 */
656 for (i = 0; i < 1000000; i++) {
657 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
658 break;
659 udelay(10);
660 }
661 for (i = 0; i < 1000000; i++) {
662 if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
663 break;
664 udelay(10);
665 }
666 do {
667 sec = CMOS_READ(RTC_SECONDS);
668 min = CMOS_READ(RTC_MINUTES);
669 hour = CMOS_READ(RTC_HOURS);
670 day = CMOS_READ(RTC_DAY_OF_MONTH);
671 mon = CMOS_READ(RTC_MONTH);
672 year = CMOS_READ(RTC_YEAR);
673 } while (sec != CMOS_READ(RTC_SECONDS));
674 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
675 BCD_TO_BIN(sec);
676 BCD_TO_BIN(min);
677 BCD_TO_BIN(hour);
678 BCD_TO_BIN(day);
679 BCD_TO_BIN(mon);
680 BCD_TO_BIN(year);
681 }
682 if ((year += 1900) < 1970)
683 year += 100;
684 }
685
686 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
687 xtime.tv_usec = 0;
688
689 if (mregs) {
690 tmp = mostek_read(mregs + MOSTEK_CREG);
691 tmp &= ~MSTK_CREG_READ;
692 mostek_write(mregs + MOSTEK_CREG, tmp);
693
694 spin_unlock_irq(&mostek_lock);
695 }
696 }
697
clock_probe(void)698 void __init clock_probe(void)
699 {
700 struct linux_prom_registers clk_reg[2];
701 char model[128];
702 int node, busnd = -1, err;
703 unsigned long flags;
704 struct linux_central *cbus;
705 #ifdef CONFIG_PCI
706 struct linux_ebus *ebus = NULL;
707 struct isa_bridge *isa_br = NULL;
708 #endif
709 static int invoked;
710
711 if (invoked)
712 return;
713 invoked = 1;
714
715
716 if (this_is_starfire) {
717 /* davem suggests we keep this within the 4M locked kernel image */
718 static char obp_gettod[256];
719 static u32 unix_tod;
720
721 sprintf(obp_gettod, "h# %08x unix-gettod",
722 (unsigned int) (long) &unix_tod);
723 prom_feval(obp_gettod);
724 xtime.tv_sec = unix_tod;
725 xtime.tv_usec = 0;
726 return;
727 }
728
729 __save_and_cli(flags);
730
731 cbus = central_bus;
732 if (cbus != NULL)
733 busnd = central_bus->child->prom_node;
734
735 /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
736 * That way we handle the presence of multiple properly.
737 *
738 * As a special case, machines with Central must provide the
739 * timer chip there.
740 */
741 #ifdef CONFIG_PCI
742 if (ebus_chain != NULL) {
743 ebus = ebus_chain;
744 if (busnd == -1)
745 busnd = ebus->prom_node;
746 }
747 if (isa_chain != NULL) {
748 isa_br = isa_chain;
749 if (busnd == -1)
750 busnd = isa_br->prom_node;
751 }
752 #endif
753 if (sbus_root != NULL && busnd == -1)
754 busnd = sbus_root->prom_node;
755
756 if (busnd == -1) {
757 prom_printf("clock_probe: problem, cannot find bus to search.\n");
758 prom_halt();
759 }
760
761 node = prom_getchild(busnd);
762
763 while (1) {
764 if (!node)
765 model[0] = 0;
766 else
767 prom_getstring(node, "model", model, sizeof(model));
768 if (strcmp(model, "mk48t02") &&
769 strcmp(model, "mk48t08") &&
770 strcmp(model, "mk48t59") &&
771 strcmp(model, "m5819") &&
772 strcmp(model, "m5819p") &&
773 strcmp(model, "m5823") &&
774 strcmp(model, "ds1287")) {
775 if (cbus != NULL) {
776 prom_printf("clock_probe: Central bus lacks timer chip.\n");
777 prom_halt();
778 }
779
780 if (node != 0)
781 node = prom_getsibling(node);
782 #ifdef CONFIG_PCI
783 while ((node == 0) && ebus != NULL) {
784 ebus = ebus->next;
785 if (ebus != NULL) {
786 busnd = ebus->prom_node;
787 node = prom_getchild(busnd);
788 }
789 }
790 while ((node == 0) && isa_br != NULL) {
791 isa_br = isa_br->next;
792 if (isa_br != NULL) {
793 busnd = isa_br->prom_node;
794 node = prom_getchild(busnd);
795 }
796 }
797 #endif
798 if (node == 0) {
799 prom_printf("clock_probe: Cannot find timer chip\n");
800 prom_halt();
801 }
802 continue;
803 }
804
805 err = prom_getproperty(node, "reg", (char *)clk_reg,
806 sizeof(clk_reg));
807 if(err == -1) {
808 prom_printf("clock_probe: Cannot get Mostek reg property\n");
809 prom_halt();
810 }
811
812 if (cbus != NULL) {
813 apply_fhc_ranges(central_bus->child, clk_reg, 1);
814 apply_central_ranges(central_bus, clk_reg, 1);
815 }
816 #ifdef CONFIG_PCI
817 else if (ebus != NULL) {
818 struct linux_ebus_device *edev;
819
820 for_each_ebusdev(edev, ebus)
821 if (edev->prom_node == node)
822 break;
823 if (edev == NULL) {
824 if (isa_chain != NULL)
825 goto try_isa_clock;
826 prom_printf("%s: Mostek not probed by EBUS\n",
827 __FUNCTION__);
828 prom_halt();
829 }
830
831 if (!strcmp(model, "ds1287") ||
832 !strcmp(model, "m5819") ||
833 !strcmp(model, "m5819p") ||
834 !strcmp(model, "m5823")) {
835 ds1287_regs = edev->resource[0].start;
836 } else {
837 mstk48t59_regs = edev->resource[0].start;
838 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
839 }
840 break;
841 }
842 else if (isa_br != NULL) {
843 struct isa_device *isadev;
844
845 try_isa_clock:
846 for_each_isadev(isadev, isa_br)
847 if (isadev->prom_node == node)
848 break;
849 if (isadev == NULL) {
850 prom_printf("%s: Mostek not probed by ISA\n");
851 prom_halt();
852 }
853 if (!strcmp(model, "ds1287") ||
854 !strcmp(model, "m5819") ||
855 !strcmp(model, "m5819p") ||
856 !strcmp(model, "m5823")) {
857 ds1287_regs = isadev->resource.start;
858 } else {
859 mstk48t59_regs = isadev->resource.start;
860 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
861 }
862 break;
863 }
864 #endif
865 else {
866 if (sbus_root->num_sbus_ranges) {
867 int nranges = sbus_root->num_sbus_ranges;
868 int rngc;
869
870 for (rngc = 0; rngc < nranges; rngc++)
871 if (clk_reg[0].which_io ==
872 sbus_root->sbus_ranges[rngc].ot_child_space)
873 break;
874 if (rngc == nranges) {
875 prom_printf("clock_probe: Cannot find ranges for "
876 "clock regs.\n");
877 prom_halt();
878 }
879 clk_reg[0].which_io =
880 sbus_root->sbus_ranges[rngc].ot_parent_space;
881 clk_reg[0].phys_addr +=
882 sbus_root->sbus_ranges[rngc].ot_parent_base;
883 }
884 }
885
886 if(model[5] == '0' && model[6] == '2') {
887 mstk48t02_regs = (((u64)clk_reg[0].phys_addr) |
888 (((u64)clk_reg[0].which_io)<<32UL));
889 } else if(model[5] == '0' && model[6] == '8') {
890 mstk48t08_regs = (((u64)clk_reg[0].phys_addr) |
891 (((u64)clk_reg[0].which_io)<<32UL));
892 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
893 } else {
894 mstk48t59_regs = (((u64)clk_reg[0].phys_addr) |
895 (((u64)clk_reg[0].which_io)<<32UL));
896 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
897 }
898 break;
899 }
900
901 if (mstk48t02_regs != 0UL) {
902 /* Report a low battery voltage condition. */
903 if (has_low_battery())
904 prom_printf("NVRAM: Low battery voltage!\n");
905
906 /* Kick start the clock if it is completely stopped. */
907 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
908 kick_start_clock();
909 }
910
911 set_system_time();
912
913 __restore_flags(flags);
914 }
915
916 /* This is gets the master TICK_INT timer going. */
sparc64_init_timers(void (* cfunc)(int,void *,struct pt_regs *))917 static unsigned long sparc64_init_timers(void (*cfunc)(int, void *, struct pt_regs *))
918 {
919 unsigned long pstate, clock;
920 int node, err;
921 #ifdef CONFIG_SMP
922 extern void smp_tick_init(void);
923 #endif
924
925 if (tlb_type == spitfire) {
926 unsigned long ver, manuf, impl;
927
928 __asm__ __volatile__ ("rdpr %%ver, %0"
929 : "=&r" (ver));
930 manuf = ((ver >> 48) & 0xffff);
931 impl = ((ver >> 32) & 0xffff);
932 if (manuf == 0x17 && impl == 0x13) {
933 /* Hummingbird, aka Ultra-IIe */
934 tick_ops = &hbtick_operations;
935 node = prom_root_node;
936 clock = prom_getint(node, "stick-frequency");
937 } else {
938 tick_ops = &tick_operations;
939 node = linux_cpus[0].prom_node;
940 clock = prom_getint(node, "clock-frequency");
941 }
942 } else {
943 tick_ops = &stick_operations;
944 node = prom_root_node;
945 clock = prom_getint(node, "stick-frequency");
946 }
947 timer_tick_offset = clock / HZ;
948
949 #ifdef CONFIG_SMP
950 smp_tick_init();
951 #endif
952
953 /* Register IRQ handler. */
954 err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, SA_STATIC_ALLOC,
955 "timer", NULL);
956
957 if(err) {
958 prom_printf("Serious problem, cannot register TICK_INT\n");
959 prom_halt();
960 }
961
962 /* Guarentee that the following sequences execute
963 * uninterrupted.
964 */
965 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
966 "wrpr %0, %1, %%pstate"
967 : "=r" (pstate)
968 : "i" (PSTATE_IE));
969
970 tick_ops->init_tick(timer_tick_offset);
971
972 /* Restore PSTATE_IE. */
973 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
974 : /* no outputs */
975 : "r" (pstate));
976
977 sti();
978
979 return clock;
980 }
981
982 /* The quotient formula is taken from the IA64 port. */
time_init(void)983 void __init time_init(void)
984 {
985 unsigned long clock = sparc64_init_timers(timer_interrupt);
986
987 timer_ticks_per_usec_quotient =
988 (((1000000UL << 30) +
989 (clock / 2)) / clock);
990 }
991
do_gettimeoffset(void)992 static __inline__ unsigned long do_gettimeoffset(void)
993 {
994 unsigned long ticks = tick_ops->get_tick();
995
996 ticks += timer_tick_offset;
997 ticks -= timer_tick_compare;
998
999 return (ticks * timer_ticks_per_usec_quotient) >> 30UL;
1000 }
1001
do_settimeofday(struct timeval * tv)1002 void do_settimeofday(struct timeval *tv)
1003 {
1004 if (this_is_starfire)
1005 return;
1006
1007 write_lock_irq(&xtime_lock);
1008
1009 tv->tv_usec -= do_gettimeoffset();
1010 tv->tv_usec -= (jiffies - wall_jiffies) * (1000000 / HZ);
1011
1012 while (tv->tv_usec < 0) {
1013 tv->tv_usec += 1000000;
1014 tv->tv_sec--;
1015 }
1016
1017 xtime = *tv;
1018 time_adjust = 0; /* stop active adjtime() */
1019 time_status |= STA_UNSYNC;
1020 time_maxerror = NTP_PHASE_LIMIT;
1021 time_esterror = NTP_PHASE_LIMIT;
1022
1023 write_unlock_irq(&xtime_lock);
1024 }
1025
do_gettimeofday(struct timeval * tv)1026 void do_gettimeofday(struct timeval *tv)
1027 {
1028 unsigned long flags;
1029 unsigned long usec, sec;
1030
1031 read_lock_irqsave(&xtime_lock, flags);
1032 usec = do_gettimeoffset();
1033 {
1034 unsigned long lost = jiffies - wall_jiffies;
1035 if (lost)
1036 usec += lost * (1000000 / HZ);
1037 }
1038 sec = xtime.tv_sec;
1039 usec += xtime.tv_usec;
1040 read_unlock_irqrestore(&xtime_lock, flags);
1041
1042 while (usec >= 1000000) {
1043 usec -= 1000000;
1044 sec++;
1045 }
1046
1047 tv->tv_sec = sec;
1048 tv->tv_usec = usec;
1049 }
1050
set_rtc_mmss(unsigned long nowtime)1051 static int set_rtc_mmss(unsigned long nowtime)
1052 {
1053 int real_seconds, real_minutes, chip_minutes;
1054 unsigned long mregs = mstk48t02_regs;
1055 #ifdef CONFIG_PCI
1056 unsigned long dregs = ds1287_regs;
1057 #else
1058 unsigned long dregs = 0UL;
1059 #endif
1060 unsigned long flags;
1061 u8 tmp;
1062
1063 /*
1064 * Not having a register set can lead to trouble.
1065 * Also starfire doesn't have a tod clock.
1066 */
1067 if (!mregs && !dregs)
1068 return -1;
1069
1070 if (mregs) {
1071 spin_lock_irqsave(&mostek_lock, flags);
1072
1073 /* Read the current RTC minutes. */
1074 tmp = mostek_read(mregs + MOSTEK_CREG);
1075 tmp |= MSTK_CREG_READ;
1076 mostek_write(mregs + MOSTEK_CREG, tmp);
1077
1078 chip_minutes = MSTK_REG_MIN(mregs);
1079
1080 tmp = mostek_read(mregs + MOSTEK_CREG);
1081 tmp &= ~MSTK_CREG_READ;
1082 mostek_write(mregs + MOSTEK_CREG, tmp);
1083
1084 /*
1085 * since we're only adjusting minutes and seconds,
1086 * don't interfere with hour overflow. This avoids
1087 * messing with unknown time zones but requires your
1088 * RTC not to be off by more than 15 minutes
1089 */
1090 real_seconds = nowtime % 60;
1091 real_minutes = nowtime / 60;
1092 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1093 real_minutes += 30; /* correct for half hour time zone */
1094 real_minutes %= 60;
1095
1096 if (abs(real_minutes - chip_minutes) < 30) {
1097 tmp = mostek_read(mregs + MOSTEK_CREG);
1098 tmp |= MSTK_CREG_WRITE;
1099 mostek_write(mregs + MOSTEK_CREG, tmp);
1100
1101 MSTK_SET_REG_SEC(mregs,real_seconds);
1102 MSTK_SET_REG_MIN(mregs,real_minutes);
1103
1104 tmp = mostek_read(mregs + MOSTEK_CREG);
1105 tmp &= ~MSTK_CREG_WRITE;
1106 mostek_write(mregs + MOSTEK_CREG, tmp);
1107
1108 spin_unlock_irqrestore(&mostek_lock, flags);
1109
1110 return 0;
1111 } else {
1112 spin_unlock_irqrestore(&mostek_lock, flags);
1113
1114 return -1;
1115 }
1116 } else {
1117 int retval = 0;
1118 unsigned char save_control, save_freq_select;
1119
1120 /* Stolen from arch/i386/kernel/time.c, see there for
1121 * credits and descriptive comments.
1122 */
1123 spin_lock_irqsave(&rtc_lock, flags);
1124 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1125 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1126
1127 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1128 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1129
1130 chip_minutes = CMOS_READ(RTC_MINUTES);
1131 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1132 BCD_TO_BIN(chip_minutes);
1133 real_seconds = nowtime % 60;
1134 real_minutes = nowtime / 60;
1135 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1136 real_minutes += 30;
1137 real_minutes %= 60;
1138
1139 if (abs(real_minutes - chip_minutes) < 30) {
1140 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1141 BIN_TO_BCD(real_seconds);
1142 BIN_TO_BCD(real_minutes);
1143 }
1144 CMOS_WRITE(real_seconds,RTC_SECONDS);
1145 CMOS_WRITE(real_minutes,RTC_MINUTES);
1146 } else {
1147 printk(KERN_WARNING
1148 "set_rtc_mmss: can't update from %d to %d\n",
1149 chip_minutes, real_minutes);
1150 retval = -1;
1151 }
1152
1153 CMOS_WRITE(save_control, RTC_CONTROL);
1154 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1155 spin_unlock_irqrestore(&rtc_lock, flags);
1156
1157 return retval;
1158 }
1159 }
1160