1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-sim/setup.c
7 *
8 * ST50 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * lethal@linux-sh.org: 15th May 2003
15 * Use the generic procfs cpuinfo interface, just return a valid board name.
16 */
17
18 #include <linux/stddef.h>
19 #include <linux/init.h>
20 #include <linux/config.h>
21 #include <linux/mm.h>
22 #include <linux/bootmem.h>
23 #include <linux/delay.h>
24 #include <linux/kernel.h>
25 #include <asm/addrspace.h>
26 #include <asm/processor.h>
27 #include <asm/platform.h>
28 #include <asm/io.h>
29 #include <asm/irq.h>
30 #include <asm/page.h>
31
32 #ifdef CONFIG_BLK_DEV_INITRD
33 #include "../rootfs/rootfs.h"
34 #endif
35
36 static __init void platform_monitor(void);
37 static __init void platform_setup(void);
38 static __init void platform_reserve(void);
39
40
41 #define PHYS_MEMORY CONFIG_MEMORY_SIZE_IN_MB*1024*1024
42
43 #if (PHYS_MEMORY < P1SEG_FOOTPRINT_RAM)
44 #error "Invalid kernel configuration. Physical memory below footprint requirements."
45 #endif
46
47 #define RAM_DISK_START CONFIG_MEMORY_START+P1SEG_INITRD_BLOCK /* Top of 4MB */
48 #ifdef PLATFORM_ROMFS_SIZE
49 #define RAM_DISK_SIZE (PAGE_ALIGN(PLATFORM_ROMFS_SIZE)) /* Variable Top */
50 #if ((RAM_DISK_START + RAM_DISK_SIZE) > (CONFIG_MEMORY_START + PHYS_MEMORY))
51 #error "Invalid kernel configuration. ROM RootFS exceeding physical memory."
52 #endif
53 #else
54 #define RAM_DISK_SIZE P1SEG_INITRD_BLOCK_SIZE /* Top of 4MB */
55 #endif
56
57 #define RES_COUNT(res) ((sizeof((res))/sizeof(struct resource)))
58
59 /*
60 * Platform Dependent Interrupt Priorities.
61 */
62
63 /* Using defaults defined in irq.h */
64 #define RES NO_PRIORITY /* Disabled */
65 #define IR0 IRL0_PRIORITY /* IRLs */
66 #define IR1 IRL1_PRIORITY
67 #define IR2 IRL2_PRIORITY
68 #define IR3 IRL3_PRIORITY
69 #define PCA INTA_PRIORITY /* PCI Ints */
70 #define PCB INTB_PRIORITY
71 #define PCC INTC_PRIORITY
72 #define PCD INTD_PRIORITY
73 #define SER TOP_PRIORITY
74 #define ERR TOP_PRIORITY
75 #define PW0 TOP_PRIORITY
76 #define PW1 TOP_PRIORITY
77 #define PW2 TOP_PRIORITY
78 #define PW3 TOP_PRIORITY
79 #define DM0 NO_PRIORITY /* DMA Ints */
80 #define DM1 NO_PRIORITY
81 #define DM2 NO_PRIORITY
82 #define DM3 NO_PRIORITY
83 #define DAE NO_PRIORITY
84 #define TU0 TIMER_PRIORITY /* TMU Ints */
85 #define TU1 NO_PRIORITY
86 #define TU2 NO_PRIORITY
87 #define TI2 NO_PRIORITY
88 #define ATI NO_PRIORITY /* RTC Ints */
89 #define PRI NO_PRIORITY
90 #define CUI RTC_PRIORITY
91 #define ERI SCIF_PRIORITY /* SCIF Ints */
92 #define RXI SCIF_PRIORITY
93 #define BRI SCIF_PRIORITY
94 #define TXI SCIF_PRIORITY
95 #define ITI TOP_PRIORITY /* WDT Ints */
96
97 /*
98 * Platform dependent structures: maps and parms block.
99 */
100 struct resource io_resources[] = {
101 /* Nothing yet .. */
102 };
103
104 struct resource kram_resources[] = {
105 { "Kernel code", 0, 0 }, /* These must be last in the array */
106 { "Kernel data", 0, 0 } /* These must be last in the array */
107 };
108
109 struct resource xram_resources[] = {
110 /* Nothing yet .. */
111 };
112
113 struct resource rom_resources[] = {
114 /* Nothing yet .. */
115 };
116
117 struct sh64_platform platform_parms = {
118 .readonly_rootfs = 1,
119 .initial_root_dev = 0x0100,
120 .loader_type = 1,
121 .initrd_start = RAM_DISK_START,
122 .initrd_size = RAM_DISK_SIZE,
123 .io_res_p = io_resources,
124 .io_res_count = RES_COUNT(io_resources),
125 .kram_res_p = kram_resources,
126 .kram_res_count = RES_COUNT(kram_resources),
127 .xram_res_p = xram_resources,
128 .xram_res_count = RES_COUNT(xram_resources),
129 .rom_res_p = rom_resources,
130 .rom_res_count = RES_COUNT(rom_resources),
131 };
132
133 int platform_int_priority[NR_IRQS] = {
134 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
135 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
136 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
137 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
138 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
139 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
140 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
141 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
142 };
143
platform_setup(void)144 void __init platform_setup(void)
145 {
146 /* Simulator platform leaves the decision to head.S */
147 platform_parms.fpu_flags = fpu_in_use;
148 }
149
platform_monitor(void)150 void __init platform_monitor(void)
151 {
152 /* Nothing yet .. */
153 }
154
platform_reserve(void)155 void __init platform_reserve(void)
156 {
157 /* Nothing yet .. */
158 }
159
get_system_type(void)160 const char *get_system_type(void)
161 {
162 return "SH-5 Simulator";
163 }
164
165