1 /*
2 * arch/ppc/platforms/pplus_setup.c
3 *
4 * Board setup routines for MCG PowerPlus
5 *
6 * Author: Randy Vinson <rvinson@mvista.com>
7 *
8 * Derived from original PowerPlus PReP work by
9 * Cort Dougan, Johnnie Peters, Matt Porter, and
10 * Troy Benjegerdes.
11 *
12 * Copyright 2001-2002 MontaVista Software Inc.
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the
16 * Free Software Foundation; either version 2 of the License, or (at your
17 * option) any later version.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/config.h>
25 #include <linux/delay.h>
26 #include <linux/module.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/kernel.h>
30 #include <linux/mm.h>
31 #include <linux/stddef.h>
32 #include <linux/unistd.h>
33 #include <linux/ptrace.h>
34 #include <linux/slab.h>
35 #include <linux/user.h>
36 #include <linux/a.out.h>
37 #include <linux/tty.h>
38 #include <linux/major.h>
39 #include <linux/interrupt.h>
40 #include <linux/reboot.h>
41 #include <linux/init.h>
42 #include <linux/blk.h>
43 #include <linux/ioport.h>
44 #include <linux/console.h>
45 #include <linux/timex.h>
46 #include <linux/pci.h>
47 #include <linux/irq.h>
48 #include <linux/ide.h>
49 #include <linux/kdev_t.h>
50 #include <linux/seq_file.h>
51 #include <linux/serial.h>
52 #include <linux/serialP.h>
53
54 #include <asm/sections.h>
55 #include <asm/mmu.h>
56 #include <asm/processor.h>
57 #include <asm/system.h>
58 #include <asm/residual.h>
59 #include <asm/io.h>
60 #include <asm/pgtable.h>
61 #include <asm/cache.h>
62 #include <asm/dma.h>
63 #include <asm/machdep.h>
64 #include <asm/mk48t59.h>
65 #include <asm/prep_nvram.h>
66 #include <asm/raven.h>
67 #include <asm/keyboard.h>
68 #include <asm/vga.h>
69 #include <asm/time.h>
70
71 #include <asm/i8259.h>
72 #include <asm/open_pic.h>
73 #include <asm/pplus.h>
74 #include <asm/todc.h>
75 #include <asm/bootinfo.h>
76 #include <asm/serial.h>
77
78 #undef DUMP_DBATS
79
80 TODC_ALLOC();
81
82 extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
83 extern int pckbd_getkeycode(unsigned int scancode);
84 extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
85 char raw_mode);
86 extern char pckbd_unexpected_up(unsigned char keycode);
87 extern void pckbd_leds(unsigned char leds);
88 extern void pckbd_init_hw(void);
89 extern unsigned char pckbd_sysrq_xlate[128];
90
91 extern char saved_command_line[];
92
93 extern void pplus_setup_hose(void);
94 extern void pplus_set_VIA_IDE_native(void);
95
96 extern unsigned long loops_per_jiffy;
97
98 extern void gen550_progress(char *, unsigned short);
99 extern void gen550_init(int, struct serial_struct *);
100
101 static int
pplus_show_cpuinfo(struct seq_file * m)102 pplus_show_cpuinfo(struct seq_file *m)
103 {
104 extern char *Motherboard_map_name;
105
106 seq_printf(m, "vendor\t\t: Motorola MCG\n");
107 seq_printf(m, "machine\t\t: %s\n", Motherboard_map_name);
108
109 return 0;
110 }
111
112 static void __init
pplus_setup_arch(void)113 pplus_setup_arch(void)
114 {
115 unsigned char reg;
116
117 if ( ppc_md.progress )
118 ppc_md.progress("pplus_setup_arch: enter", 0);
119
120 /* init to some ~sane value until calibrate_delay() runs */
121 loops_per_jiffy = 50000000;
122
123 if ( ppc_md.progress )
124 ppc_md.progress("pplus_setup_arch: find_bridges", 0);
125
126 /* Setup PCI host bridge */
127 pplus_setup_hose();
128
129 /* Set up floppy in PS/2 mode */
130 outb(0x09, SIO_CONFIG_RA);
131 reg = inb(SIO_CONFIG_RD);
132 reg = (reg & 0x3F) | 0x40;
133 outb(reg, SIO_CONFIG_RD);
134 outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
135
136 /* Enable L2. Assume we don't need to flush -- Cort*/
137 *(unsigned char *)(0x8000081c) |= 3;
138
139 #ifdef CONFIG_BLK_DEV_INITRD
140 if (initrd_start)
141 ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); /* /dev/ram */
142 else
143 #endif
144 #ifdef CONFIG_ROOT_NFS
145 ROOT_DEV = to_kdev_t(0x00ff); /* /dev/nfs */
146 #else
147 ROOT_DEV = to_kdev_t(0x0802); /* /dev/sda2 */
148 #endif
149
150 printk(KERN_INFO "Motorola PowerPlus Platform\n");
151 printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
152
153 if ( ppc_md.progress )
154 ppc_md.progress("pplus_setup_arch: raven_init", 0);
155
156 raven_init();
157
158 #ifdef CONFIG_VGA_CONSOLE
159 /* remap the VGA memory */
160 vgacon_remap_base = 0xf0000000;
161 conswitchp = &vga_con;
162 #elif defined(CONFIG_DUMMY_CONSOLE)
163 conswitchp = &dummy_con;
164 #endif
165 #ifdef CONFIG_PPCBUG_NVRAM
166 /* Read in NVRAM data */
167 init_prep_nvram();
168
169 /* if no bootargs, look in NVRAM */
170 if ( cmd_line[0] == '\0' ) {
171 char *bootargs;
172 bootargs = prep_nvram_get_var("bootargs");
173 if (bootargs != NULL) {
174 strcpy(cmd_line, bootargs);
175 /* again.. */
176 strcpy(saved_command_line, cmd_line);
177 }
178 }
179 #endif
180 if ( ppc_md.progress )
181 ppc_md.progress("pplus_setup_arch: exit", 0);
182 }
183
184 static void
pplus_restart(char * cmd)185 pplus_restart(char *cmd)
186 {
187 unsigned long i = 10000;
188
189 __cli();
190
191 /* set VIA IDE controller into native mode */
192 pplus_set_VIA_IDE_native();
193
194 /* set exception prefix high - to the prom */
195 _nmask_and_or_msr(0, MSR_IP);
196
197 /* make sure bit 0 (reset) is a 0 */
198 outb( inb(0x92) & ~1L , 0x92 );
199 /* signal a reset to system control port A - soft reset */
200 outb( inb(0x92) | 1 , 0x92 );
201
202 while ( i != 0 ) i++;
203 panic("restart failed\n");
204 }
205
206 static void
pplus_halt(void)207 pplus_halt(void)
208 {
209 unsigned long flags;
210 __cli();
211 /* set exception prefix high - to the prom */
212 save_flags( flags );
213 restore_flags( flags|MSR_IP );
214
215 /* make sure bit 0 (reset) is a 0 */
216 outb( inb(0x92) & ~1L , 0x92 );
217 /* signal a reset to system control port A - soft reset */
218 outb( inb(0x92) | 1 , 0x92 );
219
220 while ( 1 ) ;
221 /*
222 * Not reached
223 */
224 }
225
226 static void
pplus_power_off(void)227 pplus_power_off(void)
228 {
229 pplus_halt();
230 }
231
232 static unsigned int
pplus_irq_cannonicalize(u_int irq)233 pplus_irq_cannonicalize(u_int irq)
234 {
235 if (irq == 2)
236 {
237 return 9;
238 }
239 else
240 {
241 return irq;
242 }
243 }
244
245 static void __init
pplus_init_IRQ(void)246 pplus_init_IRQ(void)
247 {
248 int i;
249
250 if (OpenPIC_Addr != NULL) {
251 openpic_set_sources(0, 16, OpenPIC_Addr+0x10000);
252 openpic_init(NUM_8259_INTERRUPTS);
253 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
254 i8259_irq);
255 }
256
257 for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
258 irq_desc[i].handler = &i8259_pic;
259 i8259_init(0);
260 }
261
262 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
263 /*
264 * IDE stuff.
265 */
266 static int
pplus_ide_default_irq(ide_ioreg_t base)267 pplus_ide_default_irq(ide_ioreg_t base)
268 {
269 switch (base) {
270 case 0x1f0: return 14;
271 case 0x170: return 15;
272 default: return 0;
273 }
274 }
275
276 static ide_ioreg_t
pplus_ide_default_io_base(int index)277 pplus_ide_default_io_base(int index)
278 {
279 switch (index) {
280 case 0: return 0x1f0;
281 case 1: return 0x170;
282 default:
283 return 0;
284 }
285 }
286
287 static void __init
pplus_ide_init_hwif_ports(hw_regs_t * hw,ide_ioreg_t data_port,ide_ioreg_t ctrl_port,int * irq)288 pplus_ide_init_hwif_ports (hw_regs_t *hw, ide_ioreg_t data_port, ide_ioreg_t ctrl_port, int *irq)
289 {
290 ide_ioreg_t reg = data_port;
291 int i;
292
293 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
294 hw->io_ports[i] = reg;
295 reg += 1;
296 }
297 if (ctrl_port) {
298 hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
299 } else {
300 hw->io_ports[IDE_CONTROL_OFFSET] = hw->io_ports[IDE_DATA_OFFSET] + 0x206;
301 }
302 if (irq != NULL)
303 *irq = pplus_ide_default_irq(data_port);
304 }
305 #endif
306
307 #ifdef CONFIG_SMP
308 /* PowerPlus (MTX) support */
309 static int __init
smp_pplus_probe(void)310 smp_pplus_probe(void)
311 {
312 extern int mot_multi;
313
314 if (mot_multi) {
315 openpic_request_IPIs();
316 smp_hw_index[1] = 1;
317 return 2;
318 }
319
320 return 1;
321 }
322
323 static void __init
smp_pplus_kick_cpu(int nr)324 smp_pplus_kick_cpu(int nr)
325 {
326 *(unsigned long *)KERNELBASE = nr;
327 asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
328 printk("CPU1 reset, waiting\n");
329 }
330
331 static void __init
smp_pplus_setup_cpu(int cpu_nr)332 smp_pplus_setup_cpu(int cpu_nr)
333 {
334 if (OpenPIC_Addr)
335 do_openpic_setup_cpu();
336 }
337
338 static struct smp_ops_t pplus_smp_ops = {
339 smp_openpic_message_pass,
340 smp_pplus_probe,
341 smp_pplus_kick_cpu,
342 smp_pplus_setup_cpu,
343 };
344 #endif /* CONFIG_SMP */
345
346 #ifdef DUMP_DBATS
print_dbat(int idx,u32 bat)347 static void print_dbat(int idx, u32 bat) {
348
349 char str[64];
350
351 sprintf(str, "DBAT%c%c = 0x%08x\n",
352 (char)((idx - DBAT0U) / 2) + '0',
353 (idx & 1) ? 'L' : 'U', bat);
354 ppc_md.progress(str, 0);
355 }
356
357 #define DUMP_DBAT(x) \
358 do { \
359 u32 __temp = mfspr(x);\
360 print_dbat(x, __temp); \
361 } while (0)
362
dump_dbats(void)363 static void dump_dbats(void) {
364
365 if (ppc_md.progress) {
366 DUMP_DBAT(DBAT0U);
367 DUMP_DBAT(DBAT0L);
368 DUMP_DBAT(DBAT1U);
369 DUMP_DBAT(DBAT1L);
370 DUMP_DBAT(DBAT2U);
371 DUMP_DBAT(DBAT2L);
372 DUMP_DBAT(DBAT3U);
373 DUMP_DBAT(DBAT3L);
374 }
375 }
376 #endif
377
378 static unsigned long __init
pplus_find_end_of_memory(void)379 pplus_find_end_of_memory(void)
380 {
381 unsigned long total;
382
383 if (ppc_md.progress)
384 ppc_md.progress("pplus_find_end_of_memory",0);
385
386 #ifdef DUMP_DBATS
387 dump_dbats();
388 #endif
389
390 total = pplus_get_mem_size(0xfef80000);
391 return (total);
392 }
393
394 static void __init
pplus_map_io(void)395 pplus_map_io(void)
396 {
397 io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
398 io_block_mapping(0xf0000000, 0xc0000000, 0x08000000, _PAGE_IO);
399 }
400
401 static void __init
pplus_init2(void)402 pplus_init2(void)
403 {
404 #ifdef CONFIG_NVRAM
405 request_region(PREP_NVRAM_AS0, 0x8, "nvram");
406 #endif
407 request_region(0x20,0x20,"pic1");
408 request_region(0xa0,0x20,"pic2");
409 request_region(0x00,0x20,"dma1");
410 request_region(0x40,0x20,"timer");
411 request_region(0x80,0x10,"dma page reg");
412 request_region(0xc0,0x20,"dma2");
413 }
414
415 /*
416 * Set BAT 2 to access 0x8000000 so progress messages will work and set BAT 3
417 * to 0xf0000000 to access Falcon/Raven or Hawk registers
418 */
419 static __inline__ void
pplus_set_bat(void)420 pplus_set_bat(void)
421 {
422 static int mapping_set = 0;
423
424 if (!mapping_set) {
425
426 /* wait for all outstanding memory accesses to complete */
427 mb();
428
429 /* setup DBATs */
430 mtspr(DBAT2U, 0x80001ffe);
431 mtspr(DBAT2L, 0x8000002a);
432 mtspr(DBAT3U, 0xf0001ffe);
433 mtspr(DBAT3L, 0xf000002a);
434
435 /* wait for updates */
436 mb();
437
438 mapping_set = 1;
439 }
440
441 return;
442 }
443
444 #if defined(CONFIG_SERIAL) && \
445 (defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB))
446 extern struct serial_state rs_table[];
447
448 static void __init
pplus_early_serial_map(void)449 pplus_early_serial_map(void)
450 {
451 struct serial_struct serial_req;
452
453 /* Setup serial port access */
454 memset(&serial_req, 0, sizeof(serial_req));
455
456 /*
457 * rs_table[] already set up by <asm/pc_serial.h> so use that info for
458 * gen550_init(). This also means early_serial_setup() doesn't
459 * have to be called.
460 */
461 serial_req.port = rs_table[0].port;
462 serial_req.io_type = rs_table[0].io_type;
463 serial_req.iomem_reg_shift = rs_table[0].iomem_reg_shift;
464 #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
465 gen550_init(0, &serial_req);
466 #endif
467
468 serial_req.port = rs_table[1].port;
469 serial_req.io_type = rs_table[1].io_type;
470 serial_req.iomem_reg_shift = rs_table[1].iomem_reg_shift;
471 #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
472 gen550_init(1, &serial_req);
473 #endif
474 }
475 #endif
476
477 void __init
platform_init(unsigned long r3,unsigned long r4,unsigned long r5,unsigned long r6,unsigned long r7)478 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
479 unsigned long r6, unsigned long r7)
480 {
481 parse_bootinfo(find_bootinfo());
482
483 /* Map in board regs, etc. */
484 pplus_set_bat();
485
486 isa_io_base = PREP_ISA_IO_BASE;
487 isa_mem_base = PREP_ISA_MEM_BASE;
488 pci_dram_offset = PREP_PCI_DRAM_OFFSET;
489 ISA_DMA_THRESHOLD = 0x00ffffff;
490 DMA_MODE_READ = 0x44;
491 DMA_MODE_WRITE = 0x48;
492
493 ppc_md.setup_arch = pplus_setup_arch;
494 ppc_md.show_percpuinfo = NULL;
495 ppc_md.show_cpuinfo = pplus_show_cpuinfo;
496 ppc_md.irq_cannonicalize = pplus_irq_cannonicalize;
497 ppc_md.init_IRQ = pplus_init_IRQ;
498 /* this gets changed later on if we have an OpenPIC -- Cort */
499 ppc_md.get_irq = i8259_irq;
500 ppc_md.init = pplus_init2;
501
502 ppc_md.restart = pplus_restart;
503 ppc_md.power_off = pplus_power_off;
504 ppc_md.halt = pplus_halt;
505
506 TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
507 PREP_NVRAM_DATA, 8);
508
509 ppc_md.time_init = todc_time_init;
510 ppc_md.set_rtc_time = todc_set_rtc_time;
511 ppc_md.get_rtc_time = todc_get_rtc_time;
512 ppc_md.calibrate_decr = todc_calibrate_decr;
513 ppc_md.nvram_read_val = todc_m48txx_read_val;
514 ppc_md.nvram_write_val = todc_m48txx_write_val;
515
516 ppc_md.find_end_of_memory = pplus_find_end_of_memory;
517 ppc_md.setup_io_mappings = pplus_map_io;
518
519 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
520 ppc_ide_md.default_irq = pplus_ide_default_irq;
521 ppc_ide_md.default_io_base = pplus_ide_default_io_base;
522 ppc_ide_md.ide_init_hwif = pplus_ide_init_hwif_ports;
523 #endif
524
525 #ifdef CONFIG_VT
526 ppc_md.kbd_setkeycode = pckbd_setkeycode;
527 ppc_md.kbd_getkeycode = pckbd_getkeycode;
528 ppc_md.kbd_translate = pckbd_translate;
529 ppc_md.kbd_unexpected_up = pckbd_unexpected_up;
530 ppc_md.kbd_leds = pckbd_leds;
531 ppc_md.kbd_init_hw = pckbd_init_hw;
532 #ifdef CONFIG_MAGIC_SYSRQ
533 ppc_md.ppc_kbd_sysrq_xlate = pckbd_sysrq_xlate;
534 SYSRQ_KEY = 0x54;
535 #endif
536 #endif
537
538 #if defined(CONFIG_SERIAL) && \
539 (defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB))
540 pplus_early_serial_map();
541
542 #ifdef CONFIG_SERIAL_TEXT_DEBUG
543 ppc_md.progress = gen550_progress;
544 #endif /* CONFIG_SERIAL_TEXT_DEBUG */
545 #endif
546
547 #ifdef CONFIG_SMP
548 ppc_md.smp_ops = &pplus_smp_ops;
549 #endif /* CONFIG_SMP */
550 }
551