1/*
2 * arch/ppc/boot/simple/head.S
3 *
4 * Initial board bringup code for many different boards.
5 *
6 * Author: Tom Rini
7 *	   trini@mvista.com
8 * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
9 *
10 * 2001-2003 (c) MontaVista, Software, Inc.  This file is licensed under
11 * the terms of the GNU General Public License version 2.  This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 */
15
16#include <linux/config.h>
17#include <asm/processor.h>
18#include <asm/cache.h>
19#include <asm/ppc_asm.h>
20
21	.text
22
23/*
24 *      Begin at some arbitrary location in RAM or Flash
25 *	  Initialize core registers
26 *	  Configure memory controller (Not executing from RAM)
27 *	Move the boot code to the link address (8M)
28 *	  Setup C stack
29 *	  Initialize UART
30 *      Decompress the kernel to 0x0
31 *      Jump to the kernel entry
32 *
33 */
34
35	.globl	start
36start:
37	bl	start_
38#ifdef CONFIG_IBM_OPENBIOS
39	/* The IBM OpenBIOS bootroms know that the address of the bootrom
40	 * read only structure is 4 bytes after _start.
41	 */
42	.long	0x62726f6d		# structure ID - "brom"
43	.long	0x5f726f00		#              - "_ro\0"
44	.long	1			# structure version
45	.long	bootrom_cmdline		# address of *bootrom_cmdline
46#endif
47
48start_:
49#ifdef CONFIG_FORCE
50	/* We have some really bad firmware.  We must disable the L1
51	 * icache/dcache now or the board won't boot.
52	 */
53	li	r4,0x0000
54	isync
55	mtspr	HID0,r4
56	sync
57	isync
58#endif
59
60#if defined(CONFIG_MBX) || defined(CONFIG_RPX6)
61	mr	r29,r3	/* On the MBX860, r3 is the board info pointer.
62			 * On the RPXSUPER, r3 points to the
63			 * NVRAM configuration keys.
64			 */
65#endif
66
67	mflr	r3	/* Save our actual starting address. */
68
69	/* The following functions we call must not modify r3 or r4.....
70	*/
71#ifdef CONFIG_6xx
72	bl	disable_6xx_mmu
73	bl	disable_6xx_l1cache
74#if defined(CONFIG_FORCE) || defined(CONFIG_K2) || defined(CONFIG_EV64260)
75	bl	_setup_L2CR
76
77	/* If 745x, turn off L3CR as well */
78	mfspr	r8,PVR
79	srwi	r8,r8,16
80
81	cmpli	cr0,r8,0x8000			/* 7450 */
82	cmpli	cr1,r8,0x8001			/* 7455 */
83	cmpli	cr2,r8,0x8002			/* 7457 */
84	cror	4*cr0+eq,4*cr0+eq,4*cr1+eq	/* Now test if any are true. */
85	cror	4*cr0+eq,4*cr0+eq,4*cr2+eq
86	beql	_setup_L3CR
87#endif
88#endif
89
90#ifdef CONFIG_8xx
91	mfmsr	r8		/* Turn off interrupts */
92	li	r9,0
93	ori	r9,r9,MSR_EE
94	andc	r8,r8,r9
95	mtmsr	r8
96
97	/* We do this because some boot roms don't initialize the
98	 * processor correctly. Don't do this if you want to debug
99	 * using a BDM device.
100	 */
101	li	r4,0		/* Zero DER to prevent FRZ */
102	mtspr	SPRN_DER,r4
103#endif
104
105#ifdef CONFIG_REDWOOD_4
106	/* All of this Redwood 4 stuff will soon disappear when the
107	 * boot rom is straightened out.
108	 */
109	mr	r29, r3		/* Easier than changing the other code */
110	bl	HdwInit
111	mr	r3, r29
112#endif
113
114#if defined(CONFIG_MBX) || defined(CONFIG_RPX6)
115	mr	r4,r29	/* put the board info pointer where the relocate
116			 * routine will find it
117			 */
118#endif
119
120#ifdef	CONFIG_EV64260
121	/* Move 64260's base regs & CS window for external UART */
122	bl	ev64260_init
123#endif
124
125	/* Get the load address.
126	*/
127	subi	r3, r3, 4	/* Get the actual IP, not NIP */
128	b	relocate
129
130