1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
7 * Copyright (C) 1997, 1999, 2000, 2001, 2002, 2003 Ralf Baechle (ralf@gnu.org)
8 * Copyright (C) 1999 Silicon Graphics, Inc.
9 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
10 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
11 */
12 #include <linux/config.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/mm.h>
17 #include <linux/module.h>
18
19 #include <asm/bootinfo.h>
20 #include <asm/cpu.h>
21 #include <asm/page.h>
22 #include <asm/pgtable.h>
23 #include <asm/system.h>
24
25 /* Cache operations. */
26 void (*_flush_cache_all)(void);
27 void (*___flush_cache_all)(void);
28 void (*_flush_cache_mm)(struct mm_struct *mm);
29 void (*_flush_cache_range)(struct mm_struct *mm, unsigned long start,
30 unsigned long end);
31 void (*_flush_cache_page)(struct vm_area_struct *vma, unsigned long page);
32 void (*_flush_icache_range)(unsigned long start, unsigned long end);
33 void (*_flush_icache_page)(struct vm_area_struct *vma, struct page *page);
34
35 void (*_flush_cache_sigtramp)(unsigned long addr);
36 void (*_flush_data_cache_page)(unsigned long addr);
37 void (*_flush_icache_all)(void);
38
39 #ifdef CONFIG_NONCOHERENT_IO
40
41 /* DMA cache operations. */
42 void (*_dma_cache_wback_inv)(unsigned long start, unsigned long size);
43 void (*_dma_cache_wback)(unsigned long start, unsigned long size);
44 void (*_dma_cache_inv)(unsigned long start, unsigned long size);
45
46 EXPORT_SYMBOL(_dma_cache_wback_inv);
47 EXPORT_SYMBOL(_dma_cache_wback);
48 EXPORT_SYMBOL(_dma_cache_inv);
49
50 #endif /* CONFIG_NONCOHERENT_IO */
51
52 extern void ld_mmu_r23000(void);
53 extern void ld_mmu_r4xx0(void);
54 extern void ld_mmu_tx39(void);
55 extern void ld_mmu_r6000(void);
56 extern void ld_mmu_tfp(void);
57 extern void ld_mmu_andes(void);
58 extern void ld_mmu_sb1(void);
59 extern void sb1_tlb_init(void);
60 extern void r3k_tlb_init(void);
61 extern void r4k_tlb_init(void);
62 extern void sb1_tlb_init(void);
63
load_mmu(void)64 void __init load_mmu(void)
65 {
66 if (cpu_has_4ktlb) {
67 #if defined(CONFIG_CPU_R4X00) || defined(CONFIG_CPU_VR41XX) || \
68 defined(CONFIG_CPU_R4300) || defined(CONFIG_CPU_R5000) || \
69 defined(CONFIG_CPU_NEVADA) || defined(CONFIG_CPU_R5432) || \
70 defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_MIPS32) || \
71 defined(CONFIG_CPU_MIPS64) || defined(CONFIG_CPU_TX49XX) || \
72 defined(CONFIG_CPU_RM7000) || defined(CONFIG_CPU_RM9000)
73 ld_mmu_r4xx0();
74 r4k_tlb_init();
75 #endif
76 } else switch (current_cpu_data.cputype) {
77 #ifdef CONFIG_CPU_R3000
78 case CPU_R2000:
79 case CPU_R3000:
80 case CPU_R3000A:
81 case CPU_R3081E:
82 ld_mmu_r23000();
83 r3k_tlb_init();
84 break;
85 #endif
86 #ifdef CONFIG_CPU_TX39XX
87 case CPU_TX3912:
88 case CPU_TX3922:
89 case CPU_TX3927:
90 ld_mmu_tx39();
91 r3k_tlb_init();
92 break;
93 #endif
94 #ifdef CONFIG_CPU_R10000
95 case CPU_R10000:
96 case CPU_R12000:
97 ld_mmu_r4xx0();
98 andes_tlb_init();
99 break;
100 #endif
101 #ifdef CONFIG_CPU_SB1
102 case CPU_SB1:
103 ld_mmu_sb1();
104 sb1_tlb_init();
105 break;
106 #endif
107
108 case CPU_R8000:
109 panic("R8000 is unsupported");
110 break;
111
112 default:
113 panic("Yeee, unsupported mmu/cache architecture.");
114 }
115 }
116