1 /*
2 * Dump R4x00 TLB for debugging purposes.
3 *
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */
7 #include <linux/kernel.h>
8 #include <linux/mm.h>
9 #include <linux/sched.h>
10 #include <linux/string.h>
11
12 #include <asm/bootinfo.h>
13 #include <asm/cachectl.h>
14 #include <asm/cpu.h>
15 #include <asm/mipsregs.h>
16 #include <asm/page.h>
17 #include <asm/pgtable.h>
18
msk2str(unsigned int mask)19 static inline const char *msk2str(unsigned int mask)
20 {
21 switch (mask) {
22 case PM_4K: return "4kb";
23 case PM_16K: return "16kb";
24 case PM_64K: return "64kb";
25 case PM_256K: return "256kb";
26 case PM_1M: return "1Mb";
27 case PM_4M: return "4Mb";
28 case PM_16M: return "16Mb";
29 case PM_64M: return "64Mb";
30 case PM_256M: return "256Mb";
31 }
32 }
33
dump_tlb(int first,int last)34 void dump_tlb(int first, int last)
35 {
36 unsigned long s_entryhi, entryhi, entrylo0, entrylo1, asid;
37 unsigned int s_index, pagemask, c0, c1, i;
38
39 s_entryhi = read_c0_entryhi();
40 s_index = read_c0_index();
41 asid = s_entryhi & 0xff;
42
43 for (i = first; i <= last; i++) {
44 write_c0_index(i);
45 __asm__ __volatile__(
46 ".set\tnoreorder\n\t"
47 "nop;nop;nop;nop\n\t"
48 "tlbr\n\t"
49 "nop;nop;nop;nop\n\t"
50 ".set\treorder");
51 pagemask = read_c0_pagemask();
52 entryhi = read_c0_entryhi();
53 entrylo0 = read_c0_entrylo0();
54 entrylo1 = read_c0_entrylo1();
55
56 /* Unused entries have a virtual address of CKSEG0. */
57 if ((entryhi & ~0x1ffffUL) != CKSEG0
58 && (entryhi & 0xff) == asid) {
59 /*
60 * Only print entries in use
61 */
62 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
63
64 c0 = (entrylo0 >> 3) & 7;
65 c1 = (entrylo1 >> 3) & 7;
66
67 printk("va=%011lx asid=%02lx\n",
68 (entryhi & ~0x1fffUL),
69 entryhi & 0xff);
70 printk("\t[pa=%011lx c=%d d=%d v=%d g=%ld] ",
71 (entrylo0 << 6) & PAGE_MASK, c0,
72 (entrylo0 & 4) ? 1 : 0,
73 (entrylo0 & 2) ? 1 : 0,
74 (entrylo0 & 1));
75 printk("[pa=%011lx c=%d d=%d v=%d g=%ld]\n",
76 (entrylo1 << 6) & PAGE_MASK, c1,
77 (entrylo1 & 4) ? 1 : 0,
78 (entrylo1 & 2) ? 1 : 0,
79 (entrylo1 & 1));
80 }
81 }
82 printk("\n");
83
84 write_c0_entryhi(s_entryhi);
85 write_c0_index(s_index);
86 }
87
dump_tlb_all(void)88 void dump_tlb_all(void)
89 {
90 dump_tlb(0, current_cpu_data.tlbsize - 1);
91 }
92
dump_tlb_wired(void)93 void dump_tlb_wired(void)
94 {
95 int wired;
96
97 wired = read_c0_wired();
98 printk("Wired: %d", wired);
99 dump_tlb(0, read_c0_wired());
100 }
101
102 #define BARRIER \
103 __asm__ __volatile__( \
104 ".set\tnoreorder\n\t" \
105 "nop;nop;nop;nop;nop;nop;nop\n\t" \
106 ".set\treorder");
107
dump_tlb_addr(unsigned long addr)108 void dump_tlb_addr(unsigned long addr)
109 {
110 unsigned long flags, oldpid;
111 int index;
112
113 local_irq_save(flags);
114 oldpid = read_c0_entryhi() & 0xff;
115 BARRIER;
116 write_c0_entryhi((addr & PAGE_MASK) | oldpid);
117 BARRIER;
118 tlb_probe();
119 BARRIER;
120 index = read_c0_index();
121 write_c0_entryhi(oldpid);
122 local_irq_restore(flags);
123
124 if (index < 0) {
125 printk("No entry for address 0x%08lx in TLB\n", addr);
126 return;
127 }
128
129 printk("Entry %d maps address 0x%08lx\n", index, addr);
130 dump_tlb(index, index);
131 }
132
dump_tlb_nonwired(void)133 void dump_tlb_nonwired(void)
134 {
135 dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
136 }
137
dump_list_process(struct task_struct * t,void * address)138 void dump_list_process(struct task_struct *t, void *address)
139 {
140 pgd_t *page_dir, *pgd;
141 pmd_t *pmd;
142 pte_t *pte, page;
143 unsigned long addr;
144 unsigned long val;
145
146 addr = (unsigned long) address;
147
148 printk("Addr == %08lx\n", addr);
149 printk("tasks->mm.pgd == %08lx\n", (unsigned long) t->mm->pgd);
150
151 page_dir = pgd_offset(t->mm, 0);
152 printk("page_dir == %08lx\n", (unsigned long) page_dir);
153
154 pgd = pgd_offset(t->mm, addr);
155 printk("pgd == %08lx, ", (unsigned long) pgd);
156
157 pmd = pmd_offset(pgd, addr);
158 printk("pmd == %08lx, ", (unsigned long) pmd);
159
160 pte = pte_offset(pmd, addr);
161 printk("pte == %08lx, ", (unsigned long) pte);
162
163 page = *pte;
164 printk("page == %08lx\n", pte_val(page));
165
166 val = pte_val(page);
167 if (val & _PAGE_PRESENT) printk("present ");
168 if (val & _PAGE_READ) printk("read ");
169 if (val & _PAGE_WRITE) printk("write ");
170 if (val & _PAGE_ACCESSED) printk("accessed ");
171 if (val & _PAGE_MODIFIED) printk("modified ");
172 if (val & _PAGE_R4KBUG) printk("r4kbug ");
173 if (val & _PAGE_GLOBAL) printk("global ");
174 if (val & _PAGE_VALID) printk("valid ");
175 printk("\n");
176 }
177
dump_list_current(void * address)178 void dump_list_current(void *address)
179 {
180 dump_list_process(current, address);
181 }
182
vtop(void * address)183 unsigned int vtop(void *address)
184 {
185 pgd_t *pgd;
186 pmd_t *pmd;
187 pte_t *pte;
188 unsigned int addr, paddr;
189
190 addr = (unsigned long) address;
191 pgd = pgd_offset(current->mm, addr);
192 pmd = pmd_offset(pgd, addr);
193 pte = pte_offset(pmd, addr);
194 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
195 paddr |= (addr & ~PAGE_MASK);
196
197 return paddr;
198 }
199
dump16(unsigned long * p)200 void dump16(unsigned long *p)
201 {
202 int i;
203
204 for (i = 0; i < 8; i++) {
205 printk("*%08lx == %08lx, ", (unsigned long)p, *p);
206 p++;
207 printk("*%08lx == %08lx\n", (unsigned long)p, *p);
208 p++;
209 }
210 }
211