1 /*
2 * FILE NAME
3 * arch/mips/vr41xx/nec-eagle/vrc4173.c
4 *
5 * BRIEF MODULE DESCRIPTION
6 * Pre-setup for NEC VRC4173.
7 *
8 * Author: Yoichi Yuasa
9 * yyuasa@mvista.com or source@mvista.com
10 *
11 * Copyright 2001,2002 MontaVista Software Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
24 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
26 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
27 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */
33 #include <linux/config.h>
34
35 #ifdef CONFIG_PCI
36 #include <linux/init.h>
37 #include <linux/pci.h>
38 #include <linux/module.h>
39
40 #include <asm/io.h>
41 #include <asm/vr41xx/eagle.h>
42 #include <asm/vr41xx/vrc4173.h>
43
44 #define PCI_CONFIG_ADDR KSEG1ADDR(0x0f000c18)
45 #define PCI_CONFIG_DATA KSEG1ADDR(0x0f000c14)
46
config_writeb(u8 reg,u8 val)47 static inline void config_writeb(u8 reg, u8 val)
48 {
49 u32 data;
50 int shift;
51
52 writel((1UL << 0x1e) | (reg & 0xfc), PCI_CONFIG_ADDR);
53 data = readl(PCI_CONFIG_DATA);
54
55 shift = (reg & 3) << 3;
56 data &= ~(0xff << shift);
57 data |= (((u32)val) << shift);
58
59 writel(data, PCI_CONFIG_DATA);
60 }
61
config_readw(u8 reg)62 static inline u16 config_readw(u8 reg)
63 {
64 u32 data;
65
66 writel(((1UL << 30) | (reg & 0xfc)) , PCI_CONFIG_ADDR);
67 data = readl(PCI_CONFIG_DATA);
68
69 return (u16)(data >> ((reg & 2) << 3));
70 }
71
config_readl(u8 reg)72 static inline u32 config_readl(u8 reg)
73 {
74 writel(((1UL << 30) | (reg & 0xfc)) , PCI_CONFIG_ADDR);
75
76 return readl(PCI_CONFIG_DATA);
77 }
78
config_writel(u8 reg,u32 val)79 static inline void config_writel(u8 reg, u32 val)
80 {
81 writel((1UL << 0x1e) | (reg & 0xfc), PCI_CONFIG_ADDR);
82 writel(val, PCI_CONFIG_DATA);
83 }
84
vrc4173_preinit(void)85 void __init vrc4173_preinit(void)
86 {
87 u32 cmdsts, base;
88 u16 cmu_mask;
89
90
91 if ((config_readw(PCI_VENDOR_ID) == PCI_VENDOR_ID_NEC) &&
92 (config_readw(PCI_DEVICE_ID) == PCI_DEVICE_ID_NEC_VRC4173)) {
93 /*
94 * Initialized NEC VRC4173 Bus Control Unit
95 */
96 cmdsts = config_readl(PCI_COMMAND);
97 config_writel(PCI_COMMAND,
98 cmdsts |
99 PCI_COMMAND_IO |
100 PCI_COMMAND_MEMORY |
101 PCI_COMMAND_MASTER);
102
103 config_writeb(PCI_LATENCY_TIMER, 0x80);
104
105 config_writel(PCI_BASE_ADDRESS_0, VR41XX_PCI_IO_START);
106 base = config_readl(PCI_BASE_ADDRESS_0);
107 base &= PCI_BASE_ADDRESS_IO_MASK;
108 config_writeb(0x40, 0x01);
109
110 /* CARDU1 IDSEL = AD12, CARDU2 IDSEL = AD13 */
111 config_writeb(0x41, 0);
112
113 cmu_mask = 0x1000;
114 outw(cmu_mask, base + 0x040);
115 cmu_mask |= 0x0800;
116 outw(cmu_mask, base + 0x040);
117
118 outw(0x000f, base + 0x042); /* Soft reset of CMU */
119 cmu_mask |= 0x05e0;
120 outw(cmu_mask, base + 0x040);
121 cmu_mask = inw(base + 0x040); /* dummy read */
122 outw(0x0000, base + 0x042);
123 }
124 }
125
126 #endif
127