1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1992 Linus Torvalds
7 * Copyright (C) 1994 - 2000 Ralf Baechle
8 */
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/kernel.h>
14 #include <linux/spinlock.h>
15
16 #include <asm/i8259.h>
17 #include <asm/io.h>
18 #include <asm/sni.h>
19
20 spinlock_t pciasic_lock = SPIN_LOCK_UNLOCKED;
21
22 extern asmlinkage void sni_rm200_pci_handle_int(void);
23
24 static void enable_pciasic_irq(unsigned int irq);
25
startup_pciasic_irq(unsigned int irq)26 static unsigned int startup_pciasic_irq(unsigned int irq)
27 {
28 enable_pciasic_irq(irq);
29 return 0; /* never anything pending */
30 }
31
32 #define shutdown_pciasic_irq disable_pciasic_irq
33
disable_pciasic_irq(unsigned int irq)34 void disable_pciasic_irq(unsigned int irq)
35 {
36 unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2));
37 unsigned long flags;
38
39 spin_lock_irqsave(&pciasic_lock, flags);
40 *(volatile u8 *) PCIMT_IRQSEL &= mask;
41 spin_unlock_irqrestore(&pciasic_lock, flags);
42 }
43
enable_pciasic_irq(unsigned int irq)44 static void enable_pciasic_irq(unsigned int irq)
45 {
46 unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
47 unsigned long flags;
48
49 spin_lock_irqsave(&pciasic_lock, flags);
50 *(volatile u8 *) PCIMT_IRQSEL |= mask;
51 spin_unlock_irqrestore(&pciasic_lock, flags);
52 }
53
54 #define mask_and_ack_pciasic_irq disable_pciasic_irq
55
end_pciasic_irq(unsigned int irq)56 static void end_pciasic_irq(unsigned int irq)
57 {
58 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
59 enable_pciasic_irq(irq);
60 }
61
62 static struct hw_interrupt_type pciasic_irq_type = {
63 "PCIASIC",
64 startup_pciasic_irq,
65 shutdown_pciasic_irq,
66 enable_pciasic_irq,
67 disable_pciasic_irq,
68 mask_and_ack_pciasic_irq,
69 end_pciasic_irq,
70 NULL
71 };
72
73 /*
74 * hwint0 should deal with MP agent, ASIC PCI, EISA NMI and debug
75 * button interrupts. Later ...
76 */
pciasic_hwint0(struct pt_regs * regs)77 void pciasic_hwint0(struct pt_regs *regs)
78 {
79 panic("Received int0 but no handler yet ...");
80 }
81
82 /* This interrupt was used for the com1 console on the first prototypes. */
pciasic_hwint2(struct pt_regs * regs)83 void pciasic_hwint2(struct pt_regs *regs)
84 {
85 /* I think this shouldn't happen on production machines. */
86 panic("hwint2 and no handler yet");
87 }
88
89 /* hwint5 is the r4k count / compare interrupt */
pciasic_hwint5(struct pt_regs * regs)90 void pciasic_hwint5(struct pt_regs *regs)
91 {
92 panic("hwint5 and no handler yet");
93 }
94
ls1bit8(unsigned int x)95 static inline int ls1bit8(unsigned int x)
96 {
97 int b = 8, s;
98
99 x <<= 24;
100 s = 4; if ((x & 0x0f) == 0) s = 0; b -= s; x <<= s;
101 s = 2; if ((x & 0x03) == 0) s = 0; b -= s; x <<= s;
102 s = 1; if ((x & 0x01) == 0) s = 0; b -= s;
103
104 return b;
105 }
106
107 /*
108 * hwint 1 deals with EISA and SCSI interrupts,
109 * hwint 3 should deal with the PCI A - D interrupts,
110 * hwint 4 is used for only the onboard PCnet 32.
111 */
pciasic_hwint134(struct pt_regs * regs)112 void pciasic_hwint134(struct pt_regs *regs)
113 {
114 u8 pend = *(volatile char *)PCIMT_CSITPEND;
115 int irq;
116
117 irq = PCIMT_IRQ_INT2 + ls1bit8(pend);
118 if (irq == PCIMT_IRQ_EISA) {
119 pend = *(volatile char *)PCIMT_INT_ACKNOWLEDGE;
120 if (!(pend ^ 0xff))
121 return;
122 }
123 do_IRQ(irq, regs);
124 return;
125 }
126
init_pciasic(void)127 void __init init_pciasic(void)
128 {
129 unsigned long flags;
130
131 spin_lock_irqsave(&pciasic_lock, flags);
132 * (volatile u8 *) PCIMT_IRQSEL =
133 IT_EISA | IT_INTA | IT_INTB | IT_INTC | IT_INTD;
134 spin_unlock_irqrestore(&pciasic_lock, flags);
135 }
136
137 /*
138 * On systems with i8259-style interrupt controllers we assume for
139 * driver compatibility reasons interrupts 0 - 15 to be the i8295
140 * interrupts even if the hardware uses a different interrupt numbering.
141 */
init_IRQ(void)142 void __init init_IRQ (void)
143 {
144 int i;
145
146 set_except_vector(0, sni_rm200_pci_handle_int);
147
148 init_generic_irq();
149 init_i8259_irqs(); /* Integrated i8259 */
150 init_pciasic();
151
152 /* Actually we've got more interrupts to handle ... */
153 for (i = PCIMT_IRQ_INT2; i <= PCIMT_IRQ_ETHERNET; i++) {
154 irq_desc[i].status = IRQ_DISABLED;
155 irq_desc[i].action = 0;
156 irq_desc[i].depth = 1;
157 irq_desc[i].handler = &pciasic_irq_type;
158 }
159 }
160