1 /*
2  * Copyright (C) 2001, 2002, 2003 Broadcom Corporation
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
17  */
18 
19 #define SBPROF_TB_DEBUG 0
20 
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/types.h>
24 #include <linux/init.h>
25 #include <linux/slab.h>
26 #include <linux/vmalloc.h>
27 #include <linux/fs.h>
28 #include <linux/errno.h>
29 #include <linux/reboot.h>
30 #include <linux/devfs_fs_kernel.h>
31 #include <asm/uaccess.h>
32 #include <asm/smplock.h>
33 #include <asm/sibyte/sb1250.h>
34 #include <asm/sibyte/sb1250_regs.h>
35 #include <asm/sibyte/sb1250_scd.h>
36 #include <asm/sibyte/sb1250_int.h>
37 #include <asm/sibyte/64bit.h>
38 #include <asm/sibyte/trace_prof.h>
39 
40 #define DEVNAME "bcm1250_tbprof"
41 
42 static struct sbprof_tb sbp;
43 
44 #define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
45 
46 /************************************************************************
47  * Support for ZBbus sampling using the trace buffer
48  *
49  * We use the SCD performance counter interrupt, caused by a Zclk counter
50  * overflow, to trigger the start of tracing.
51  *
52  * We set the trace buffer to sample everything and freeze on
53  * overflow.
54  *
55  * We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
56  *
57  ************************************************************************/
58 
59 static u_int64_t tb_period;
60 
arm_tb(void)61 static void arm_tb(void)
62 {
63         u_int64_t scdperfcnt;
64 	u_int64_t next = (1ULL << 40) - tb_period;
65 	/* Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
66 	   trigger start of trace.  XXX vary sampling period */
67 	out64(0, KSEG1 + A_SCD_PERF_CNT_1);
68 	scdperfcnt = in64(KSEG1 + A_SCD_PERF_CNT_CFG);
69 	/* Unfortunately, in Pass 2 we must clear all counters to knock down
70 	   a previous interrupt request.  This means that bus profiling
71 	   requires ALL of the SCD perf counters. */
72 	out64((scdperfcnt & ~M_SPC_CFG_SRC1) | // keep counters 0,2,3 as is
73 		   M_SPC_CFG_ENABLE |		 // enable counting
74 		   M_SPC_CFG_CLEAR |		 // clear all counters
75 		   V_SPC_CFG_SRC1(1),		 // counter 1 counts cycles
76 	      KSEG1 + A_SCD_PERF_CNT_CFG);
77 	out64(next, KSEG1 + A_SCD_PERF_CNT_1);
78 	/* Reset the trace buffer */
79 	out64(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
80 	out64(M_SCD_TRACE_CFG_FREEZE_FULL
81 #if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
82 	      /* XXXKW may want to expose control to the data-collector */
83 	      | M_SCD_TRACE_CFG_FORCECNT
84 #endif
85 	      , KSEG1 + A_SCD_TRACE_CFG);
86 	sbp.tb_armed = 1;
87 }
88 
sbprof_tb_intr(int irq,void * dev_id,struct pt_regs * regs)89 static void sbprof_tb_intr(int irq, void *dev_id, struct pt_regs *regs)
90 {
91 	int i;
92 	DBG(printk(DEVNAME ": tb_intr\n"));
93 	if (sbp.next_tb_sample < MAX_TB_SAMPLES) {
94 		/* XXX should use XKPHYS to make writes bypass L2 */
95 		u_int64_t *p = sbp.sbprof_tbbuf[sbp.next_tb_sample++];
96 		/* Read out trace */
97 		out64(M_SCD_TRACE_CFG_START_READ, KSEG1 + A_SCD_TRACE_CFG);
98 		__asm__ __volatile__ ("sync" : : : "memory");
99 		/* Loop runs backwards because bundles are read out in reverse order */
100 		for (i = 256 * 6; i > 0; i -= 6) {
101 			// Subscripts decrease to put bundle in the order
102 			//   t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi
103 			p[i-1] = in64(KSEG1 + A_SCD_TRACE_READ); // read t2 hi
104 			p[i-2] = in64(KSEG1 + A_SCD_TRACE_READ); // read t2 lo
105 			p[i-3] = in64(KSEG1 + A_SCD_TRACE_READ); // read t1 hi
106 			p[i-4] = in64(KSEG1 + A_SCD_TRACE_READ); // read t1 lo
107 			p[i-5] = in64(KSEG1 + A_SCD_TRACE_READ); // read t0 hi
108 			p[i-6] = in64(KSEG1 + A_SCD_TRACE_READ); // read t0 lo
109 		}
110 		if (!sbp.tb_enable) {
111 			DBG(printk(DEVNAME ": tb_intr shutdown\n"));
112 			out64(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
113 			sbp.tb_armed = 0;
114 			wake_up(&sbp.tb_sync);
115 		} else {
116 			arm_tb();	// knock down current interrupt and get another one later
117 		}
118 	} else {
119 		/* No more trace buffer samples */
120 		DBG(printk(DEVNAME ": tb_intr full\n"));
121 		out64(M_SCD_TRACE_CFG_RESET, KSEG1 + A_SCD_TRACE_CFG);
122 		sbp.tb_armed = 0;
123 		if (!sbp.tb_enable) {
124 			wake_up(&sbp.tb_sync);
125 		}
126 		wake_up(&sbp.tb_read);
127 	}
128 }
129 
sbprof_pc_intr(int irq,void * dev_id,struct pt_regs * regs)130 static void sbprof_pc_intr(int irq, void *dev_id, struct pt_regs *regs)
131 {
132 	printk(DEVNAME ": unexpected pc_intr");
133 }
134 
sbprof_zbprof_start(struct file * filp)135 static int sbprof_zbprof_start(struct file *filp)
136 {
137 	u_int64_t scdperfcnt;
138 
139 	if (sbp.tb_enable)
140 		return -EBUSY;
141 
142 	DBG(printk(DEVNAME ": starting\n"));
143 
144 	sbp.tb_enable = 1;
145 	sbp.next_tb_sample = 0;
146 	filp->f_pos = 0;
147 
148 	if (request_irq
149 	    (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0, DEVNAME " trace freeze", &sbp)) {
150 		return -EBUSY;
151 	}
152 	/* Make sure there isn't a perf-cnt interrupt waiting */
153 	scdperfcnt = in64(KSEG1 + A_SCD_PERF_CNT_CFG);
154 	/* Disable and clear counters, override SRC_1 */
155 	out64((scdperfcnt & ~(M_SPC_CFG_SRC1 | M_SPC_CFG_ENABLE)) |
156 		   M_SPC_CFG_ENABLE |
157 		   M_SPC_CFG_CLEAR |
158 		   V_SPC_CFG_SRC1(1),
159 	      KSEG1 + A_SCD_PERF_CNT_CFG);
160 
161 	/* We grab this interrupt to prevent others from trying to use
162            it, even though we don't want to service the interrupts
163            (they only feed into the trace-on-interrupt mechanism) */
164 	if (request_irq
165 	    (K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
166 		free_irq(K_INT_TRACE_FREEZE, &sbp);
167 		return -EBUSY;
168 	}
169 
170 	/* I need the core to mask these, but the interrupt mapper to
171 	   pass them through.  I am exploiting my knowledge that
172 	   cp0_status masks out IP[5]. krw */
173 	out64(K_INT_MAP_I3,
174 	      KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + (K_INT_PERF_CNT<<3));
175 
176 	/* Initialize address traps */
177 	out64(0, KSEG1 + A_ADDR_TRAP_UP_0);
178 	out64(0, KSEG1 + A_ADDR_TRAP_UP_1);
179 	out64(0, KSEG1 + A_ADDR_TRAP_UP_2);
180 	out64(0, KSEG1 + A_ADDR_TRAP_UP_3);
181 
182 	out64(0, KSEG1 + A_ADDR_TRAP_DOWN_0);
183 	out64(0, KSEG1 + A_ADDR_TRAP_DOWN_1);
184 	out64(0, KSEG1 + A_ADDR_TRAP_DOWN_2);
185 	out64(0, KSEG1 + A_ADDR_TRAP_DOWN_3);
186 
187 	out64(0, KSEG1 + A_ADDR_TRAP_CFG_0);
188 	out64(0, KSEG1 + A_ADDR_TRAP_CFG_1);
189 	out64(0, KSEG1 + A_ADDR_TRAP_CFG_2);
190 	out64(0, KSEG1 + A_ADDR_TRAP_CFG_3);
191 
192 	/* Initialize Trace Event 0-7 */
193 	//				when interrupt
194 	out64(M_SCD_TREVT_INTERRUPT, KSEG1 + A_SCD_TRACE_EVENT_0);
195 	out64(0, KSEG1 + A_SCD_TRACE_EVENT_1);
196 	out64(0, KSEG1 + A_SCD_TRACE_EVENT_2);
197 	out64(0, KSEG1 + A_SCD_TRACE_EVENT_3);
198 	out64(0, KSEG1 + A_SCD_TRACE_EVENT_4);
199 	out64(0, KSEG1 + A_SCD_TRACE_EVENT_5);
200 	out64(0, KSEG1 + A_SCD_TRACE_EVENT_6);
201 	out64(0, KSEG1 + A_SCD_TRACE_EVENT_7);
202 
203 	/* Initialize Trace Sequence 0-7 */
204 	//				     Start on event 0 (interrupt)
205 	out64(V_SCD_TRSEQ_FUNC_START|0x0fff,
206 	      KSEG1 + A_SCD_TRACE_SEQUENCE_0);
207 	//			  dsamp when d used | asamp when a used
208 	out64(M_SCD_TRSEQ_ASAMPLE|M_SCD_TRSEQ_DSAMPLE|K_SCD_TRSEQ_TRIGGER_ALL,
209 	      KSEG1 + A_SCD_TRACE_SEQUENCE_1);
210 	out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_2);
211 	out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_3);
212 	out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_4);
213 	out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_5);
214 	out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_6);
215 	out64(0, KSEG1 + A_SCD_TRACE_SEQUENCE_7);
216 
217 	/* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
218 	out64((1ULL << K_INT_PERF_CNT), KSEG1 + A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE));
219 
220 	arm_tb();
221 
222 	DBG(printk(DEVNAME ": done starting\n"));
223 
224 	return 0;
225 }
226 
sbprof_zbprof_stop(void)227 static int sbprof_zbprof_stop(void)
228 {
229 	DBG(printk(DEVNAME ": stopping\n"));
230 
231 	if (sbp.tb_enable) {
232 		sbp.tb_enable = 0;
233 		/* XXXKW there is a window here where the intr handler
234 		   may run, see the disable, and do the wake_up before
235 		   this sleep happens. */
236 		if (sbp.tb_armed) {
237 			DBG(printk(DEVNAME ": wait for disarm\n"));
238 			interruptible_sleep_on(&sbp.tb_sync);
239 			DBG(printk(DEVNAME ": disarm complete\n"));
240 		}
241 		free_irq(K_INT_TRACE_FREEZE, &sbp);
242 		free_irq(K_INT_PERF_CNT, &sbp);
243 	}
244 
245 	DBG(printk(DEVNAME ": done stopping\n"));
246 
247 	return 0;
248 }
249 
sbprof_tb_open(struct inode * inode,struct file * filp)250 static int sbprof_tb_open(struct inode *inode, struct file *filp)
251 {
252 	int minor;
253 
254 	minor = MINOR(inode->i_rdev);
255 	if (minor != 0) {
256 		return -ENODEV;
257 	}
258 	if (sbp.open) {
259 		return -EBUSY;
260 	}
261 
262 	memset(&sbp, 0, sizeof(struct sbprof_tb));
263 	sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
264 	if (!sbp.sbprof_tbbuf) {
265 		return -ENOMEM;
266 	}
267 	memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
268 	init_waitqueue_head(&sbp.tb_sync);
269 	init_waitqueue_head(&sbp.tb_read);
270 	sbp.open = 1;
271 
272 	return 0;
273 }
274 
sbprof_tb_release(struct inode * inode,struct file * filp)275 static int sbprof_tb_release(struct inode *inode, struct file *filp)
276 {
277 	int minor;
278 
279 	minor = MINOR(inode->i_rdev);
280 	if (minor != 0 || !sbp.open) {
281 		return -ENODEV;
282 	}
283 
284 	if (sbp.tb_armed || sbp.tb_enable) {
285 		sbprof_zbprof_stop();
286 	}
287 
288 	vfree(sbp.sbprof_tbbuf);
289 	sbp.open = 0;
290 
291 	return 0;
292 }
293 
sbprof_tb_read(struct file * filp,char * buf,size_t size,loff_t * offp)294 static ssize_t sbprof_tb_read(struct file *filp, char *buf,
295 			      size_t size, loff_t *offp)
296 {
297 	int cur_sample, sample_off, cur_count, sample_left;
298 	char *src;
299 	int   count   =	 0;
300 	char *dest    =	 buf;
301 	long  cur_off = *offp;
302 
303 	if (cur_off < 0)
304 		return -EINVAL;
305 
306 	count = 0;
307 	cur_sample = cur_off / TB_SAMPLE_SIZE;
308 	sample_off = cur_off % TB_SAMPLE_SIZE;
309 	sample_left = TB_SAMPLE_SIZE - sample_off;
310 	while (size && (cur_sample < sbp.next_tb_sample)) {
311 		cur_count = size < sample_left ? size : sample_left;
312 		src = (char *)(((long)sbp.sbprof_tbbuf[cur_sample])+sample_off);
313 		copy_to_user(dest, src, cur_count);
314 		DBG(printk(DEVNAME ": read from sample %d, %d bytes\n", cur_sample, cur_count));
315 		size -= cur_count;
316 		sample_left -= cur_count;
317 		if (!sample_left) {
318 			cur_sample++;
319 			sample_off = 0;
320 			sample_left = TB_SAMPLE_SIZE;
321 		} else {
322 			sample_off += cur_count;
323 		}
324 		cur_off += cur_count;
325 		dest += cur_count;
326 		count += cur_count;
327 	}
328 	*offp = cur_off;
329 
330 	return count;
331 }
332 
sbprof_tb_ioctl(struct inode * inode,struct file * filp,unsigned int command,unsigned long arg)333 static int sbprof_tb_ioctl(struct inode *inode,
334 			   struct file *filp,
335 			   unsigned int command,
336 			   unsigned long arg)
337 {
338 	int error = 0;
339 
340 	switch (command) {
341 	case SBPROF_ZBSTART:
342 		error = sbprof_zbprof_start(filp);
343 		break;
344 	case SBPROF_ZBSTOP:
345 		error = sbprof_zbprof_stop();
346 		break;
347 	case SBPROF_ZBWAITFULL:
348 		interruptible_sleep_on(&sbp.tb_read);
349 		/* XXXKW check if interrupted? */
350 		return put_user(TB_FULL, (int *) arg);
351 	default:
352 		error = -EINVAL;
353 		break;
354 	}
355 
356 	return error;
357 }
358 
359 static struct file_operations sbprof_tb_fops = {
360 	.owner		= THIS_MODULE,
361 	.open		= sbprof_tb_open,
362 	.release	= sbprof_tb_release,
363 	.read		= sbprof_tb_read,
364 	.ioctl		= sbprof_tb_ioctl,
365 	.mmap		= NULL,
366 };
367 
368 static devfs_handle_t devfs_handle;
369 
sbprof_tb_init(void)370 static int __init sbprof_tb_init(void)
371 {
372 	if (devfs_register_chrdev(SBPROF_TB_MAJOR, DEVNAME, &sbprof_tb_fops)) {
373 		printk(KERN_WARNING DEVNAME ": initialization failed (dev %d)\n",
374 		       SBPROF_TB_MAJOR);
375 		return -EIO;
376 	}
377 	devfs_handle = devfs_register(NULL, DEVNAME,
378 				      DEVFS_FL_DEFAULT, SBPROF_TB_MAJOR, 0,
379 				      S_IFCHR | S_IRUGO | S_IWUGO,
380 				      &sbprof_tb_fops, NULL);
381 	sbp.open = 0;
382 	tb_period = zbbus_mhz * 10000LL;
383 	printk(KERN_INFO DEVNAME ": initialized - tb_period = %lld\n", tb_period);
384 	return 0;
385 }
386 
sbprof_tb_cleanup(void)387 static void __exit sbprof_tb_cleanup(void)
388 {
389 	devfs_unregister_chrdev(SBPROF_TB_MAJOR, DEVNAME);
390 	devfs_unregister(devfs_handle);
391 }
392 
393 module_init(sbprof_tb_init);
394 module_exit(sbprof_tb_cleanup);
395