1 /*
2 * Copyright (C) 2002 Momentum Computer, Inc.
3 * Author: Matthew Dharm, mdharm@momenco.com
4 *
5 * Based on work by:
6 * Copyright (C) 2000 RidgeRun, Inc.
7 * Author: RidgeRun, Inc.
8 * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
9 *
10 * Copyright 2001 MontaVista Software Inc.
11 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
12 *
13 * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
35 #include <linux/errno.h>
36 #include <linux/init.h>
37 #include <linux/kernel_stat.h>
38 #include <linux/module.h>
39 #include <linux/signal.h>
40 #include <linux/sched.h>
41 #include <linux/types.h>
42 #include <linux/interrupt.h>
43 #include <linux/ioport.h>
44 #include <linux/timex.h>
45 #include <linux/slab.h>
46 #include <linux/random.h>
47 #include <asm/bitops.h>
48 #include <asm/bootinfo.h>
49 #include <asm/io.h>
50 #include <asm/irq.h>
51 #include <asm/mipsregs.h>
52 #include <asm/system.h>
53
54 #define read_32bit_cp0_set1_register(source) \
55 ({ int __res; \
56 __asm__ __volatile__( \
57 ".set\tpush\n\t" \
58 ".set\treorder\n\t" \
59 "cfc0\t%0,"STR(source)"\n\t" \
60 ".set\tpop" \
61 : "=r" (__res)); \
62 __res;})
63
64 #define write_32bit_cp0_set1_register(register,value) \
65 __asm__ __volatile__( \
66 "ctc0\t%0,"STR(register)"\n\t" \
67 "nop" \
68 : : "r" (value));
69
70 static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED;
71
72 /* Function for careful CP0 interrupt mask access */
modify_cp0_intmask(unsigned clr_mask_in,unsigned set_mask_in)73 static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in)
74 {
75 unsigned long status;
76 unsigned clr_mask;
77 unsigned set_mask;
78
79 /* do the low 8 bits first */
80 clr_mask = 0xff & clr_mask_in;
81 set_mask = 0xff & set_mask_in;
82 status = read_c0_status();
83 status &= ~((clr_mask & 0xFF) << 8);
84 status |= (set_mask & 0xFF) << 8;
85 write_c0_status(status);
86
87 /* do the high 8 bits */
88 clr_mask = 0xff & (clr_mask_in >> 8);
89 set_mask = 0xff & (set_mask_in >> 8);
90 status = read_32bit_cp0_set1_register(CP0_S1_INTCONTROL);
91 status &= ~((clr_mask & 0xFF) << 8);
92 status |= (set_mask & 0xFF) << 8;
93 write_32bit_cp0_set1_register(CP0_S1_INTCONTROL, status);
94 }
95
mask_irq(unsigned int irq)96 static inline void mask_irq(unsigned int irq)
97 {
98 modify_cp0_intmask(irq, 0);
99 }
100
unmask_irq(unsigned int irq)101 static inline void unmask_irq(unsigned int irq)
102 {
103 modify_cp0_intmask(0, irq);
104 }
105
enable_rm9000_irq(unsigned int irq)106 static void enable_rm9000_irq(unsigned int irq)
107 {
108 unsigned long flags;
109
110 spin_lock_irqsave(&irq_lock, flags);
111 unmask_irq(1 << (irq-1));
112 spin_unlock_irqrestore(&irq_lock, flags);
113 }
114
startup_rm9000_irq(unsigned int irq)115 static unsigned int startup_rm9000_irq(unsigned int irq)
116 {
117 enable_rm9000_irq(irq);
118
119 return 0; /* never anything pending */
120 }
121
disable_rm9000_irq(unsigned int irq)122 static void disable_rm9000_irq(unsigned int irq)
123 {
124 unsigned long flags;
125
126 spin_lock_irqsave(&irq_lock, flags);
127 mask_irq(1 << (irq-1));
128 spin_unlock_irqrestore(&irq_lock, flags);
129 }
130
131 #define shutdown_rm9000_irq disable_rm9000_irq
132
mask_and_ack_rm9000_irq(unsigned int irq)133 static void mask_and_ack_rm9000_irq(unsigned int irq)
134 {
135 mask_irq(1 << (irq-1));
136 }
137
end_rm9000_irq(unsigned int irq)138 static void end_rm9000_irq(unsigned int irq)
139 {
140 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
141 unmask_irq(1 << (irq-1));
142 }
143
144 static struct hw_interrupt_type rm9000_hpcdma_irq_type = {
145 "RM9000",
146 startup_rm9000_irq,
147 shutdown_rm9000_irq,
148 enable_rm9000_irq,
149 disable_rm9000_irq,
150 mask_and_ack_rm9000_irq,
151 end_rm9000_irq,
152 NULL
153 };
154
155 extern void wired_reset(void);
156 extern void PMON_v2_setup(void);
157 extern asmlinkage void jaguar_handle_int(void);
158 extern void mv64340_irq_init(void);
159
160 static struct irqaction cascade_mv64340 =
161 { no_action, SA_INTERRUPT, 0, "cascade via MV64340", NULL, NULL };
162 static struct irqaction unused_irq =
163 { no_action, SA_INTERRUPT, 0, "unused", NULL, NULL };
164
init_IRQ(void)165 void __init init_IRQ(void)
166 {
167 int i;
168
169 /*
170 * Clear all of the interrupts while we change the able around a bit.
171 * int-handler is not on bootstrap
172 */
173 clear_c0_status(ST0_IM | ST0_BEV);
174 __cli();
175
176 /* Sets the first-level interrupt dispatcher. */
177 set_except_vector(0, jaguar_handle_int);
178 init_generic_irq();
179
180 /* set up handler for first 12 IRQs as the CPU */
181 for (i = 0; i < 13; i++) {
182 irq_desc[i].status = IRQ_DISABLED;
183 irq_desc[i].action = 0;
184 irq_desc[i].depth = 1;
185 irq_desc[i].handler = &rm9000_hpcdma_irq_type;
186 }
187
188 /* set up the cascading interrupts */
189 setup_irq(9, &cascade_mv64340);
190
191 /* mark unconnected IRQs as unconnected */
192 setup_irq(10, &unused_irq);
193
194 /* mark un-used IRQ numbers as unconnected */
195 setup_irq(13, &unused_irq);
196 setup_irq(14, &unused_irq);
197 setup_irq(15, &unused_irq);
198
199 mv64340_irq_init();
200
201 #ifdef CONFIG_REMOTE_DEBUG
202 printk("start kgdb ...\n");
203 set_debug_traps();
204 breakpoint(); /* you may move this line to whereever you want :-) */
205 #endif
206 #ifdef CONFIG_GDB_CONSOLE
207 register_gdb_console();
208 #endif
209
210 }
211