1 /*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * ########################################################################
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * ########################################################################
21 *
22 * Setting up the clock on the MIPS boards.
23 *
24 */
25
26 #include <linux/types.h>
27 #include <linux/config.h>
28 #include <linux/init.h>
29 #include <linux/kernel_stat.h>
30 #include <linux/sched.h>
31 #include <linux/spinlock.h>
32
33 #include <asm/mipsregs.h>
34 #include <asm/ptrace.h>
35 #include <asm/hardirq.h>
36 #include <asm/div64.h>
37 #include <asm/cpu.h>
38 #include <asm/time.h>
39
40 #include <linux/interrupt.h>
41 #include <linux/mc146818rtc.h>
42 #include <linux/timex.h>
43
44 #include <asm/mips-boards/generic.h>
45 #include <asm/mips-boards/prom.h>
46
47 static unsigned int r4k_offset; /* Amount to increment compare reg each time */
48 static unsigned int r4k_cur; /* What counter should be at next timer irq */
49
50 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
51
52 #if defined(CONFIG_MIPS_ATLAS)
53 static char display_string[] = " LINUX ON ATLAS ";
54 #endif
55 #if defined(CONFIG_MIPS_MALTA)
56 static char display_string[] = " LINUX ON MALTA ";
57 #endif
58 static unsigned int display_count = 0;
59 #define MAX_DISPLAY_COUNT (sizeof(display_string) - 8)
60
61 #define MIPS_CPU_TIMER_IRQ 7
62
63 static unsigned int timer_tick_count=0;
64
65
ack_r4ktimer(unsigned int newval)66 static inline void ack_r4ktimer(unsigned int newval)
67 {
68 write_c0_compare(newval);
69 }
70
mips_timer_interrupt(struct pt_regs * regs)71 void mips_timer_interrupt(struct pt_regs *regs)
72 {
73 if ((timer_tick_count++ % HZ) == 0) {
74 mips_display_message(&display_string[display_count++]);
75 if (display_count == MAX_DISPLAY_COUNT)
76 display_count = 0;
77
78 }
79
80 ll_timer_interrupt(MIPS_CPU_TIMER_IRQ, regs);
81 }
82
83 /*
84 * Figure out the r4k offset, the amount to increment the compare
85 * register for each time tick.
86 * Use the RTC to calculate offset.
87 */
cal_r4koff(void)88 static unsigned int __init cal_r4koff(void)
89 {
90 unsigned long flags;
91
92 local_irq_save(flags);
93
94 /* Start counter exactly on falling edge of update flag */
95 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
96 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
97
98 /* Start r4k counter. */
99 write_c0_count(0);
100
101 /* Read counter exactly on falling edge of update flag */
102 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
103 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
104
105 mips_hpt_frequency = read_c0_count();
106
107 /* restore interrupts */
108 local_irq_restore(flags);
109
110 return (mips_hpt_frequency / HZ);
111 }
112
mips_rtc_get_time(void)113 unsigned long __init mips_rtc_get_time(void)
114 {
115 unsigned int year, mon, day, hour, min, sec;
116 unsigned char save_control;
117
118 save_control = CMOS_READ(RTC_CONTROL);
119
120 /* Freeze it. */
121 CMOS_WRITE(save_control | RTC_SET, RTC_CONTROL);
122
123 /* Read regs. */
124 sec = CMOS_READ(RTC_SECONDS);
125 min = CMOS_READ(RTC_MINUTES);
126 hour = CMOS_READ(RTC_HOURS);
127
128 if (!(save_control & RTC_24H))
129 {
130 if ((hour & 0xf) == 0xc)
131 hour &= 0x80;
132 if (hour & 0x80)
133 hour = (hour & 0xf) + 12;
134 }
135 day = CMOS_READ(RTC_DAY_OF_MONTH);
136 mon = CMOS_READ(RTC_MONTH);
137 year = CMOS_READ(RTC_YEAR);
138
139 /* Unfreeze clock. */
140 CMOS_WRITE(save_control, RTC_CONTROL);
141
142 if ((year += 1900) < 1970)
143 year += 100;
144
145 return mktime(year, mon, day, hour, min, sec);
146 }
147
mips_time_init(void)148 void __init mips_time_init(void)
149 {
150 unsigned long flags;
151 unsigned int est_freq;
152
153 local_irq_save(flags);
154
155 /* Set Data mode - binary. */
156 CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
157
158 printk("calculating r4koff... ");
159 r4k_offset = cal_r4koff();
160 printk("%08x(%d)\n", r4k_offset, r4k_offset);
161
162 if ((read_c0_prid() & 0xffff00) ==
163 (PRID_COMP_MIPS | PRID_IMP_20KC))
164 est_freq = r4k_offset*HZ;
165 else
166 est_freq = 2*r4k_offset*HZ;
167
168 est_freq += 5000; /* round */
169 est_freq -= est_freq%10000;
170 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
171 (est_freq%1000000)*100/1000000);
172
173 local_irq_restore(flags);
174 }
175
mips_timer_setup(struct irqaction * irq)176 void __init mips_timer_setup(struct irqaction *irq)
177 {
178 /* we are using the cpu counter for timer interrupts */
179 irq->handler = no_action; /* we use our own handler */
180 setup_irq(MIPS_CPU_TIMER_IRQ, irq);
181
182 /* to generate the first timer interrupt */
183 r4k_cur = (read_c0_count() + r4k_offset);
184 write_c0_compare(r4k_cur);
185 set_c0_status(ALLINTS);
186 }
187