1 /*
2 * Dump R4x00 TLB for debugging purposes.
3 *
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */
7 #include <linux/config.h>
8 #include <linux/kernel.h>
9 #include <linux/mm.h>
10 #include <linux/sched.h>
11 #include <linux/string.h>
12
13 #include <asm/bootinfo.h>
14 #include <asm/cachectl.h>
15 #include <asm/cpu.h>
16 #include <asm/mipsregs.h>
17 #include <asm/page.h>
18 #include <asm/pgtable.h>
19
msk2str(unsigned int mask)20 static inline const char *msk2str(unsigned int mask)
21 {
22 switch (mask) {
23 case PM_4K: return "4kb";
24 case PM_16K: return "16kb";
25 case PM_64K: return "64kb";
26 case PM_256K: return "256kb";
27 #ifndef CONFIG_CPU_VR41XX
28 case PM_1M: return "1Mb";
29 case PM_4M: return "4Mb";
30 case PM_16M: return "16Mb";
31 case PM_64M: return "64Mb";
32 case PM_256M: return "256Mb";
33 #endif
34 }
35 }
36
dump_tlb(int first,int last)37 void dump_tlb(int first, int last)
38 {
39 unsigned int pagemask, c0, c1, asid;
40 unsigned long long entrylo0, entrylo1;
41 unsigned long entryhi;
42 int i;
43
44 asid = read_c0_entryhi() & 0xff;
45
46 printk("\n");
47 for (i = first; i <= last; i++) {
48 write_c0_index(i);
49 __asm__ __volatile__(
50 ".set\tmips3\n\t"
51 ".set\tnoreorder\n\t"
52 "nop;nop;nop;nop\n\t"
53 "tlbr\n\t"
54 "nop;nop;nop;nop\n\t"
55 ".set\treorder\n\t"
56 ".set\tmips0\n\t");
57 pagemask = read_c0_pagemask();
58 entryhi = read_c0_entryhi();
59 entrylo0 = read_c0_entrylo0();
60 entrylo1 = read_c0_entrylo1();
61
62 /* Unused entries have a virtual address in KSEG0. */
63 if ((entryhi & 0xf0000000) != 0x80000000
64 && (entryhi & 0xff) == asid) {
65 /*
66 * Only print entries in use
67 */
68 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
69
70 c0 = (entrylo0 >> 3) & 7;
71 c1 = (entrylo1 >> 3) & 7;
72
73 printk("va=%08lx asid=%02lx\n",
74 (entryhi & 0xffffe000), (entryhi & 0xff));
75 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
76 (entrylo0 << 6) & PAGE_MASK, c0,
77 (entrylo0 & 4) ? 1 : 0,
78 (entrylo0 & 2) ? 1 : 0,
79 (entrylo0 & 1));
80 printk("\t\t\t[pa=%08Lx c=%d d=%d v=%d g=%Ld]\n",
81 (entrylo1 << 6) & PAGE_MASK, c1,
82 (entrylo1 & 4) ? 1 : 0,
83 (entrylo1 & 2) ? 1 : 0,
84 (entrylo1 & 1));
85 printk("\n");
86 }
87 }
88
89 write_c0_entryhi(asid);
90 }
91
dump_tlb_all(void)92 void dump_tlb_all(void)
93 {
94 dump_tlb(0, current_cpu_data.tlbsize - 1);
95 }
96
dump_tlb_wired(void)97 void dump_tlb_wired(void)
98 {
99 int wired;
100
101 wired = read_c0_wired();
102 printk("Wired: %d", wired);
103 dump_tlb(0, read_c0_wired());
104 }
105
106 #define BARRIER \
107 __asm__ __volatile__( \
108 ".set\tnoreorder\n\t" \
109 "nop;nop;nop;nop;nop;nop;nop\n\t" \
110 ".set\treorder");
111
dump_tlb_addr(unsigned long addr)112 void dump_tlb_addr(unsigned long addr)
113 {
114 unsigned long flags, oldpid;
115 int index;
116
117 local_irq_save(flags);
118 oldpid = read_c0_entryhi() & 0xff;
119 BARRIER;
120 write_c0_entryhi((addr & PAGE_MASK) | oldpid);
121 BARRIER;
122 tlb_probe();
123 BARRIER;
124 index = read_c0_index();
125 write_c0_entryhi(oldpid);
126 local_irq_restore(flags);
127
128 if (index < 0) {
129 printk("No entry for address 0x%08lx in TLB\n", addr);
130 return;
131 }
132
133 printk("Entry %d maps address 0x%08lx\n", index, addr);
134 dump_tlb(index, index);
135 }
136
dump_tlb_nonwired(void)137 void dump_tlb_nonwired(void)
138 {
139 dump_tlb(read_c0_wired(), current_cpu_data.tlbsize - 1);
140 }
141
dump_list_process(struct task_struct * t,void * address)142 void dump_list_process(struct task_struct *t, void *address)
143 {
144 pgd_t *page_dir, *pgd;
145 pmd_t *pmd;
146 pte_t *pte, page;
147 unsigned int addr;
148 unsigned long val;
149
150 addr = (unsigned int) address;
151
152 printk("Addr == %08x\n", addr);
153 printk("task == %8p\n", t);
154 printk("task->mm == %8p\n", t->mm);
155 //printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd);
156
157 if (addr > KSEG0)
158 page_dir = pgd_offset_k(0);
159 else
160 page_dir = pgd_offset(t->mm, 0);
161 printk("page_dir == %08x\n", (unsigned int) page_dir);
162
163 if (addr > KSEG0)
164 pgd = pgd_offset_k(addr);
165 else
166 pgd = pgd_offset(t->mm, addr);
167 printk("pgd == %08x, ", (unsigned int) pgd);
168
169 pmd = pmd_offset(pgd, addr);
170 printk("pmd == %08x, ", (unsigned int) pmd);
171
172 pte = pte_offset(pmd, addr);
173 printk("pte == %08x, ", (unsigned int) pte);
174
175 page = *pte;
176 #ifdef CONFIG_64BIT_PHYS_ADDR
177 printk("page == %08Lx\n", pte_val(page));
178 #else
179 printk("page == %08lx\n", pte_val(page));
180 #endif
181
182 val = pte_val(page);
183 if (val & _PAGE_PRESENT) printk("present ");
184 if (val & _PAGE_READ) printk("read ");
185 if (val & _PAGE_WRITE) printk("write ");
186 if (val & _PAGE_ACCESSED) printk("accessed ");
187 if (val & _PAGE_MODIFIED) printk("modified ");
188 if (val & _PAGE_R4KBUG) printk("r4kbug ");
189 if (val & _PAGE_GLOBAL) printk("global ");
190 if (val & _PAGE_VALID) printk("valid ");
191 printk("\n");
192 }
193
dump_list_current(void * address)194 void dump_list_current(void *address)
195 {
196 dump_list_process(current, address);
197 }
198
vtop(void * address)199 unsigned int vtop(void *address)
200 {
201 pgd_t *pgd;
202 pmd_t *pmd;
203 pte_t *pte;
204 unsigned int addr, paddr;
205
206 addr = (unsigned long) address;
207 pgd = pgd_offset(current->mm, addr);
208 pmd = pmd_offset(pgd, addr);
209 pte = pte_offset(pmd, addr);
210 paddr = (KSEG1 | (unsigned int) pte_val(*pte)) & PAGE_MASK;
211 paddr |= (addr & ~PAGE_MASK);
212
213 return paddr;
214 }
215
dump16(unsigned long * p)216 void dump16(unsigned long *p)
217 {
218 int i;
219
220 for (i = 0; i < 8; i++) {
221 printk("*%08lx == %08lx, ", (unsigned long)p, *p);
222 p++;
223 printk("*%08lx == %08lx\n", (unsigned long)p, *p);
224 p++;
225 }
226 }
227